45 lines
1.0 KiB
C
45 lines
1.0 KiB
C
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/*
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* Copyright (c) 2006-2022, RT-Thread Development Team
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Change Logs:
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* Date Author Notes
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* 2022-12-19 BruceOu first version
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*/
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#ifndef __BOARD_H__
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#define __BOARD_H__
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#include "n32g4fr.h"
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#include "drv_gpio.h"
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#define N32_FLASH_START_ADRESS ((uint32_t)0x08000000)
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#define N32_FLASH_SIZE (512 * 1024)
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#define N32_FLASH_END_ADDRESS ((uint32_t)(N32_FLASH_START_ADRESS + N32_FLASH_SIZE))
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/* Internal SRAM memory size[Kbytes] <144>, Default: 144*/
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#define N32_SRAM_SIZE (144)
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#define N32_SRAM_END (0x20000000 + N32_SRAM_SIZE * 1024)
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void rt_hw_board_init(void);
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#if defined(__ARMCC_VERSION)
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extern int Image$$RW_IRAM1$$ZI$$Limit;
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#define HEAP_BEGIN ((void *)&Image$$RW_IRAM1$$ZI$$Limit)
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#elif __ICCARM__
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#pragma section="CSTACK"
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#define HEAP_BEGIN (__segment_end("CSTACK"))
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#else
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extern int __bss_end;
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#define HEAP_BEGIN ((void *)&__bss_end)
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#endif
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#define HEAP_END N32_SRAM_END
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#endif /* __BOARD_H__ */
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