2022-04-05 19:34:30 +08:00
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/*
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* Copyright (c) 2006-2022, RT-Thread Development Team
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Change Logs:
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2021-03-27 15:16:57 +08:00
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* Date Author Notes
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* 2011-02-21 onelife Initial creation for EFM32
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* 2011-07-14 onelife Add multiple channels support for scan mode
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2022-04-05 19:34:30 +08:00
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*/
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2013-01-08 22:40:58 +08:00
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#ifndef __DRV_ADC_H__
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#define __DRV_ADC_H__
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/* Includes ------------------------------------------------------------------*/
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/* Exported types ------------------------------------------------------------*/
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struct efm32_adc_device_t
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{
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2021-03-27 15:16:57 +08:00
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ADC_TypeDef *adc_device;
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rt_uint8_t mode;
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rt_uint8_t singleCount;
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rt_uint8_t singleDmaChannel;
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rt_uint8_t scanCount;
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rt_uint8_t scanDmaChannel;
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2013-01-08 22:40:58 +08:00
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};
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struct efm32_adc_control_single_t
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{
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2021-03-27 15:16:57 +08:00
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rt_uint8_t count;
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rt_uint8_t dmaChannel;
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ADC_InitSingle_TypeDef *init;
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2013-01-08 22:40:58 +08:00
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};
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struct efm32_adc_control_scan_t
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{
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2021-03-27 15:16:57 +08:00
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rt_uint8_t count;
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rt_uint8_t dmaChannel;
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ADC_InitScan_TypeDef *init;
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2013-01-08 22:40:58 +08:00
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};
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struct efm32_adc_control_t
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{
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2021-03-27 15:16:57 +08:00
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rt_uint8_t mode;
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struct efm32_adc_control_scan_t scan;
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struct efm32_adc_control_single_t single;
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2013-01-08 22:40:58 +08:00
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};
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struct efm32_adc_result_t
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{
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2021-03-27 15:16:57 +08:00
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rt_uint8_t mode;
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void *buffer;
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2013-01-08 22:40:58 +08:00
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};
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/* Exported constants --------------------------------------------------------*/
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/* Exported macro ------------------------------------------------------------*/
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2021-03-27 15:16:57 +08:00
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#define ADC_MODE_SINGLE (0x01)
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#define ADC_MODE_SCAN (0x02)
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#define ADC_MODE_TAILGATE (0x04)
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#define ADC_OP_SINGLE_REPEAT (0x10)
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#define ADC_OP_SCAN_REPEAT (0x20)
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#define ADC_MASK_MODE (0x0f)
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#define ADC_MASK_OP (0xf0)
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2013-01-08 22:40:58 +08:00
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/* Exported functions ------------------------------------------------------- */
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void rt_hw_adc_init(void);
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#endif /*__DRV_ADC_H__ */
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