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rt-thread-official/bsp/qemu-virt64-riscv/Kconfig

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add qemu-riscv-virt64 bsp add qemu-riscv-virt64 bsp
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mainmenu "RT-Thread Project Configuration"
bsp中option env语句替换为新语句，并同步更新了source "$xxx"语句
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BSP_DIR := .
add qemu-riscv-virt64 bsp add qemu-riscv-virt64 bsp
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bsp中option env语句替换为新语句，并同步更新了source "$xxx"语句
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RTT_DIR := ../../
add qemu-riscv-virt64 bsp add qemu-riscv-virt64 bsp
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bsp中option env语句替换为新语句，并同步更新了source "$xxx"语句
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PKGS_DIR := packages
add qemu-riscv-virt64 bsp add qemu-riscv-virt64 bsp
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bsp中option env语句替换为新语句，并同步更新了source "$xxx"语句
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source "$(RTT_DIR)/Kconfig"
osource "$PKGS_DIR/Kconfig"
rsource "driver/Kconfig"
add qemu-riscv-virt64 bsp add qemu-riscv-virt64 bsp
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sync branch rt-smart. (#6641) * Synchronize the code of the rt mart branch to the master branch. * TTY device * Add lwP code from rt-smart * Add vnode in DFS, but DFS will be re-write for rt-smart * There are three libcpu for rt-smart: * arm/cortex-a, arm/aarch64 * riscv64 Co-authored-by: Rbb666 <zhangbingru@rt-thread.com> Co-authored-by: zhkag <zhkag@foxmail.com>
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config BOARD_QEMU_VIRT_RV64
add qemu-riscv-virt64 bsp add qemu-riscv-virt64 bsp
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bool
select ARCH_RISCV64
sync branch rt-smart. (#6641) * Synchronize the code of the rt mart branch to the master branch. * TTY device * Add lwP code from rt-smart * Add vnode in DFS, but DFS will be re-write for rt-smart * There are three libcpu for rt-smart: * arm/cortex-a, arm/aarch64 * riscv64 Co-authored-by: Rbb666 <zhangbingru@rt-thread.com> Co-authored-by: zhkag <zhkag@foxmail.com>
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select ARCH_CONTEXT_EXTEND
add qemu-riscv-virt64 bsp add qemu-riscv-virt64 bsp
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select RT_USING_COMPONENTS_INIT
select RT_USING_USER_MAIN
sync branch rt-smart. (#6641) * Synchronize the code of the rt mart branch to the master branch. * TTY device * Add lwP code from rt-smart * Add vnode in DFS, but DFS will be re-write for rt-smart * There are three libcpu for rt-smart: * arm/cortex-a, arm/aarch64 * riscv64 Co-authored-by: Rbb666 <zhangbingru@rt-thread.com> Co-authored-by: zhkag <zhkag@foxmail.com>
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select RT_USING_CACHE
select ARCH_MM_MMU
[libcpu] rv64: support for ARCH_REMAP_KERNEL (#9067) * [libcpu] support for ARCH_REMAP_KERNEL These changes introduce support for the ARCH_REMAP_KERNEL configuration, which isolates kernel space in high virtual address regions. This feature is necessary to enhance memory protection and management by segregating user and kernel spaces more effectively. Changes: - Updated conditional macros to check for ARCH_REMAP_KERNEL instead of ARCH_KERNEL_IN_HIGH_VA in board initialization files to reflect the new configuration option. - Modified qemu-virt64-riscv Kconfig and SConstruct files to include and utilize ARCH_REMAP_KERNEL. - Created a new linker script `link_smart.lds` for smart linking in qemu-virt64-riscv. - Updated rtconfig.py to use a more flexible execution path setup. - Enhanced user address space definitions in `lwp_arch.h` to support the new virtual address mappings. - Adjusted kernel memory initialization and mapping logic in `c906/mmu.c` and `virt64/mmu.c` to account for high virtual address regions. - Added Kconfig option to enable ARCH_REMAP_KERNEL for RISCV64 architectures. - Enhanced memory setup functions to support new mapping scheme, including updates to early page table setup and address relocation logic. These modifications ensure that the system can utilize high memory addresses for the kernel, improving memory isolation and system stability. Signed-off-by: Shell <smokewood@qq.com> * fixup: CI run failed * bsp: default config without using smart * fixup: static checks * restore rt_hw_mmu_kernel_map_init for D1 --------- Signed-off-by: Shell <smokewood@qq.com>
2024-06-18 11:15:59 +08:00
select ARCH_REMAP_KERNEL
[atomic]添加arm与risc-v下的常用原子操作函数 (#7053) * Update Kconfig * Update trap_gcc.S * Update bsp/hifive1/drivers/SConscript Co-authored-by: Man, Jianting (Meco) <920369182@qq.com> * Update SConscript * [atomic]提交一份arm与risc-v架构下的常用原子操作函数 * 修改变量类型 * 更新rtatomic.h与atomic_port.c * 更新rt-thread\libcpu\arm\common\atomic_port.c * 更新include/rtatomic.h与libcpu/arm/common/SConscript * 更新include/rtatomic.h * 修正格式与Kconfig * 修正格式与文件结构 * 规范文件格式与文件重命名 * 添加测试用例与CI * 添加函数声明 * 修改virt64/SConscript 添加atomic_riscv.c * 1.规范代码风格 * 2.添加RISC-V64原子指令支持 解决在RV64下编译器将32-bit运算结果扩展为64-bit 导致判断错误 * 添加C11标准库原子操作测试 --------- Co-authored-by: Man, Jianting (Meco) <920369182@qq.com>
2023-03-23 20:06:50 +08:00
select RT_USING_HW_ATOMIC
add qemu-riscv-virt64 bsp add qemu-riscv-virt64 bsp
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default y
sync branch rt-smart. (#6641) * Synchronize the code of the rt mart branch to the master branch. * TTY device * Add lwP code from rt-smart * Add vnode in DFS, but DFS will be re-write for rt-smart * There are three libcpu for rt-smart: * arm/cortex-a, arm/aarch64 * riscv64 Co-authored-by: Rbb666 <zhangbingru@rt-thread.com> Co-authored-by: zhkag <zhkag@foxmail.com>
2022-12-03 12:07:44 +08:00
config ENABLE_FPU
bool "Enable FPU"
default y
config ENABLE_VECTOR
bool "Using RISC-V Vector Extension"
default n
if ENABLE_VECTOR
choice
prompt "Vector Registers Length in Bits"
default ARCH_VECTOR_VLEN_128
format Kconfig and sconscript
2023-01-09 10:14:23 +08:00
sync branch rt-smart. (#6641) * Synchronize the code of the rt mart branch to the master branch. * TTY device * Add lwP code from rt-smart * Add vnode in DFS, but DFS will be re-write for rt-smart * There are three libcpu for rt-smart: * arm/cortex-a, arm/aarch64 * riscv64 Co-authored-by: Rbb666 <zhangbingru@rt-thread.com> Co-authored-by: zhkag <zhkag@foxmail.com>
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config ARCH_VECTOR_VLEN_128
bool "128"
config ARCH_VECTOR_VLEN_256
bool "256"
endchoice
endif
config RT_USING_USERSPACE_32BIT_LIMIT
bool "Enable userspace 32bit limit"
default n
config RT_USING_VIRTIO_MMIO_ALIGN
bool "Open packed attribution, this may caused an error on virtio"
default n
config ARCH_USING_NEW_CTX_SWITCH
bool
default y
add qemu-riscv-virt64 bsp add qemu-riscv-virt64 bsp
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config __STACKSIZE__
int "stack size for interrupt"
default 4096