65 lines
1.4 KiB
ArmAsm
65 lines
1.4 KiB
ArmAsm
/**
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* This file has no copyright assigned and is placed in the Public Domain.
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* This file is part of the mingw-w64 runtime package.
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* No warranty is given; refer to the file DISCLAIMER.PD within this package.
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*/
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#include <_mingw_mac.h>
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.file "ceill.S"
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.text
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#ifdef __x86_64__
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.align 8
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#else
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.align 4
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#endif
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.globl __MINGW_USYMBOL(ceill)
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.def __MINGW_USYMBOL(ceill); .scl 2; .type 32; .endef
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__MINGW_USYMBOL(ceill):
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#if defined(_AMD64_) || defined(__x86_64__)
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fldt (%rdx)
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subq $24,%rsp
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fstcw 8(%rsp) /* store fpu control word */
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/* We use here %edx although only the low 1 bits are defined.
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But none of the operations should care and they are faster
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than the 16 bit operations. */
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movl $0x0800,%edx /* round towards +oo */
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orl 8(%rsp),%edx
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andl $0xfbff,%edx
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movl %edx,(%rsp)
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fldcw (%rsp) /* load modified control word */
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frndint /* round */
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fldcw 8(%rsp) /* restore original control word */
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addq $24,%rsp
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movq %rcx,%rax
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movq $0,8(%rcx)
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fstpt (%rcx)
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ret
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#elif defined(_ARM_) || defined(__arm__)
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vmrs r1, fpscr
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bic r0, r1, #0x00c00000
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orr r0, r0, #0x00400000 /* Round towards Plus Infinity */
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vmsr fpscr, r0
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vcvtr.s32.f64 s0, d0
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vcvt.f64.s32 d0, s0
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vmsr fpscr, r1
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bx lr
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#elif defined(_X86_) || defined(__i386__)
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fldt 4(%esp)
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subl $8,%esp
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fstcw 4(%esp)
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movl $0x0800,%edx
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orl 4(%esp),%edx
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andl $0xfbff,%edx
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movl %edx,(%esp)
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fldcw (%esp)
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frndint
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fldcw 4(%esp)
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addl $8,%esp
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ret
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#endif
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