253 lines
5.8 KiB
ArmAsm
253 lines
5.8 KiB
ArmAsm
/*
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* Copyright (c) 2014
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* Imagination Technologies Limited.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. Neither the name of the MIPS Technologies, Inc., nor the names of its
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* contributors may be used to endorse or promote products derived from
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* this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY IMAGINATION TECHNOLOGIES LIMITED ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL IMAGINATION TECHNOLOGIES LIMITED BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*/
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#ifdef ANDROID_CHANGES
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# include "machine/asm.h"
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# include "machine/regdef.h"
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#elif _LIBC
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# include "machine/asm.h"
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# include "machine/regdef.h"
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#else
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# include <regdef.h>
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# include <sys/asm.h>
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#endif
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/* Technically strcmp should not read past the end of the strings being
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compared. We will read a full word that may contain excess bits beyond
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the NULL string terminator but unless ENABLE_READAHEAD is set, we will not
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read the next word after the end of string. Setting ENABLE_READAHEAD will
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improve performance but is technically illegal based on the definition of
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strcmp. */
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#ifdef ENABLE_READAHEAD
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# define DELAY_READ
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#else
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# define DELAY_READ nop
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#endif
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/* Testing on a little endian machine showed using CLZ was a
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performance loss, so we are not turning it on by default. */
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#if defined(ENABLE_CLZ) && (__mips_isa_rev > 1)
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# define USE_CLZ
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#endif
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/* Some asm.h files do not have the L macro definition. */
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#ifndef L
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# if _MIPS_SIM == _ABIO32
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# define L(label) $L ## label
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# else
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# define L(label) .L ## label
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# endif
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#endif
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/* Some asm.h files do not have the PTR_ADDIU macro definition. */
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#ifndef PTR_ADDIU
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# ifdef USE_DOUBLE
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# define PTR_ADDIU daddiu
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# else
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# define PTR_ADDIU addiu
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# endif
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#endif
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/* Allow the routine to be named something else if desired. */
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#ifndef STRCMP_NAME
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# define STRCMP_NAME strcmp
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#endif
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#ifdef ANDROID_CHANGES
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LEAF(STRCMP_NAME, 0)
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#else
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LEAF(STRCMP_NAME)
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#endif
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.set nomips16
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.set noreorder
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or t0, a0, a1
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andi t0,0x3
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bne t0, zero, L(byteloop)
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/* Both strings are 4 byte aligned at this point. */
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lui t8, 0x0101
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ori t8, t8, 0x0101
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lui t9, 0x7f7f
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ori t9, 0x7f7f
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#define STRCMP32(OFFSET) \
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lw v0, OFFSET(a0); \
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lw v1, OFFSET(a1); \
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subu t0, v0, t8; \
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bne v0, v1, L(worddiff); \
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nor t1, v0, t9; \
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and t0, t0, t1; \
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bne t0, zero, L(returnzero)
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L(wordloop):
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STRCMP32(0)
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DELAY_READ
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STRCMP32(4)
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DELAY_READ
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STRCMP32(8)
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DELAY_READ
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STRCMP32(12)
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DELAY_READ
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STRCMP32(16)
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DELAY_READ
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STRCMP32(20)
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DELAY_READ
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STRCMP32(24)
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DELAY_READ
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STRCMP32(28)
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PTR_ADDIU a0, a0, 32
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b L(wordloop)
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PTR_ADDIU a1, a1, 32
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L(returnzero):
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j ra
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move v0, zero
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L(worddiff):
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#ifdef USE_CLZ
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subu t0, v0, t8
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nor t1, v0, t9
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and t1, t0, t1
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xor t0, v0, v1
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or t0, t0, t1
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# if __BYTE_ORDER__ == __ORDER_LITTLE_ENDIAN__
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wsbh t0, t0
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rotr t0, t0, 16
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# endif
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clz t1, t0
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and t1, 0xf8
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# if __BYTE_ORDER__ == __ORDER_BIG_ENDIAN__
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neg t1
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addu t1, 24
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# endif
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rotrv v0, v0, t1
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rotrv v1, v1, t1
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and v0, v0, 0xff
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and v1, v1, 0xff
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j ra
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subu v0, v0, v1
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#else /* USE_CLZ */
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# if __BYTE_ORDER__ == __ORDER_LITTLE_ENDIAN__
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andi t0, v0, 0xff
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beq t0, zero, L(wexit01)
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andi t1, v1, 0xff
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bne t0, t1, L(wexit01)
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srl t8, v0, 8
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srl t9, v1, 8
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andi t8, t8, 0xff
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beq t8, zero, L(wexit89)
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andi t9, t9, 0xff
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bne t8, t9, L(wexit89)
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srl t0, v0, 16
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srl t1, v1, 16
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andi t0, t0, 0xff
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beq t0, zero, L(wexit01)
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andi t1, t1, 0xff
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bne t0, t1, L(wexit01)
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srl t8, v0, 24
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srl t9, v1, 24
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# else /* __BYTE_ORDER__ == __ORDER_LITTLE_ENDIAN__ */
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srl t0, v0, 24
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beq t0, zero, L(wexit01)
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srl t1, v1, 24
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bne t0, t1, L(wexit01)
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srl t8, v0, 16
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srl t9, v1, 16
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andi t8, t8, 0xff
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beq t8, zero, L(wexit89)
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andi t9, t9, 0xff
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bne t8, t9, L(wexit89)
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srl t0, v0, 8
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srl t1, v1, 8
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andi t0, t0, 0xff
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beq t0, zero, L(wexit01)
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andi t1, t1, 0xff
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bne t0, t1, L(wexit01)
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andi t8, v0, 0xff
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andi t9, v1, 0xff
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# endif /* __BYTE_ORDER__ == __ORDER_LITTLE_ENDIAN__ */
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L(wexit89):
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j ra
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subu v0, t8, t9
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L(wexit01):
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j ra
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subu v0, t0, t1
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#endif /* USE_CLZ */
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/* It might seem better to do the 'beq' instruction between the two 'lbu'
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instructions so that the nop is not needed but testing showed that this
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code is actually faster (based on glibc strcmp test). */
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#define BYTECMP01(OFFSET) \
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lbu v0, OFFSET(a0); \
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lbu v1, OFFSET(a1); \
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beq v0, zero, L(bexit01); \
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nop; \
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bne v0, v1, L(bexit01)
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#define BYTECMP89(OFFSET) \
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lbu t8, OFFSET(a0); \
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lbu t9, OFFSET(a1); \
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beq t8, zero, L(bexit89); \
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nop; \
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bne t8, t9, L(bexit89)
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L(byteloop):
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BYTECMP01(0)
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BYTECMP89(1)
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BYTECMP01(2)
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BYTECMP89(3)
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BYTECMP01(4)
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BYTECMP89(5)
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BYTECMP01(6)
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BYTECMP89(7)
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PTR_ADDIU a0, a0, 8
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b L(byteloop)
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PTR_ADDIU a1, a1, 8
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L(bexit01):
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j ra
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subu v0, v0, v1
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L(bexit89):
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j ra
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subu v0, t8, t9
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.set at
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.set reorder
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END(STRCMP_NAME)
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