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5d3ad3b123
Intel MCU System V ABI are incompartible with i386 System V ABI: o Minimum instruction set is Intel Pentium ISA minus x87 instructions o No x87 or vector registers o First three args are passed in %eax, %edx and %ecx o Full specification available here: https://github.com/hjl-tools/x86-psABI/wiki/iamcu-psABI-0.7.pdf newlib/ * configure.host: Add new ix86-*-elfiamcu target newlib/libc/include/ * setjmp.h: Change _JBLEN for Intel MCU target newlib/libc/machine/i386/ * memchr.S: (memchr) Target-specific size-optimized version * memcmp.S: (memcmp) Likewise * memcpy.S: (memcpy) Likewise * memmove.S: (memmove) Likewise * memset.S: (memset) Likewise * setjmp.S: (setjmp) Likewise * strchr.S: (strchr) Likewise * strlen.S: (strlen) Likewise newlib/libc/stdlib/ * srtold.c: (__flt_rounds) Disable for Intel MCU
133 lines
2.3 KiB
ArmAsm
133 lines
2.3 KiB
ArmAsm
/* This is file is a merger of SETJMP.S and LONGJMP.S */
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/*
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* This file was modified to use the __USER_LABEL_PREFIX__ and
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* __REGISTER_PREFIX__ macros defined by later versions of GNU cpp by
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* Joel Sherrill (joel@OARcorp.com)
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* Slight change: now includes i386mach.h for this (Werner Almesberger)
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*
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* Copyright (C) 1991 DJ Delorie
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* All rights reserved.
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*
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* Redistribution, modification, and use in source and binary forms is permitted
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* provided that the above copyright notice and following paragraph are
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* duplicated in all such forms.
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*
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* This file is distributed WITHOUT ANY WARRANTY; without even the implied
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* warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
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*/
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/*
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** jmp_buf:
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** eax ebx ecx edx esi edi ebp esp eip
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** 0 4 8 12 16 20 24 28 32
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**
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** Intel MCU jmp_buf:
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** ebx esi edi ebp esp eip
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** 0 4 8 12 16 20
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*/
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#include "i386mach.h"
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.global SYM (setjmp)
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.global SYM (longjmp)
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SOTYPE_FUNCTION(setjmp)
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SOTYPE_FUNCTION(longjmp)
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SYM (setjmp):
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#ifdef __iamcu__
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/* Store EIP. */
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movl 0(esp),ecx
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movl ecx,20(eax)
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movl ebx,0 (eax)
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movl esi,4 (eax)
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movl edi,8 (eax)
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movl ebp,12(eax)
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/* Skip return address, which will be pushed onto stack in
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longjmp, and store SP. */
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leal 4(esp),ecx
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movl ecx,16(eax)
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xorl eax,eax
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#else
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pushl ebp
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movl esp,ebp
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pushl edi
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movl 8 (ebp),edi
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movl eax,0 (edi)
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movl ebx,4 (edi)
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movl ecx,8 (edi)
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movl edx,12 (edi)
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movl esi,16 (edi)
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movl -4 (ebp),eax
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movl eax,20 (edi)
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movl 0 (ebp),eax
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movl eax,24 (edi)
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movl esp,eax
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addl $12,eax
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movl eax,28 (edi)
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movl 4 (ebp),eax
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movl eax,32 (edi)
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popl edi
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movl $0,eax
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leave
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#endif
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ret
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SYM (longjmp):
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#ifdef __iamcu__
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/* Check retval. */
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testl edx,edx
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jne 0f
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incl edx
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0:
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/* Restore stack first. */
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movl 16(eax),esp
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/* Put return address on stack. */
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pushl 20(eax)
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movl 0(eax),ebx
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movl 4(eax),esi
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movl 8(eax),edi
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movl 12(eax),ebp
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movl edx,eax
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#else
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pushl ebp
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movl esp,ebp
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movl 8(ebp),edi /* get jmp_buf */
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movl 12(ebp),eax /* store retval in j->eax */
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testl eax,eax
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jne 0f
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incl eax
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0:
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movl eax,0(edi)
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movl 24(edi),ebp
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__CLI
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movl 28(edi),esp
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pushl 32(edi)
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movl 0(edi),eax
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movl 4(edi),ebx
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movl 8(edi),ecx
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movl 12(edi),edx
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movl 16(edi),esi
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movl 20(edi),edi
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__STI
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#endif
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ret
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