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git://sourceware.org/git/newlib-cygwin.git
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5d3ad3b123
Intel MCU System V ABI are incompartible with i386 System V ABI: o Minimum instruction set is Intel Pentium ISA minus x87 instructions o No x87 or vector registers o First three args are passed in %eax, %edx and %ecx o Full specification available here: https://github.com/hjl-tools/x86-psABI/wiki/iamcu-psABI-0.7.pdf newlib/ * configure.host: Add new ix86-*-elfiamcu target newlib/libc/include/ * setjmp.h: Change _JBLEN for Intel MCU target newlib/libc/machine/i386/ * memchr.S: (memchr) Target-specific size-optimized version * memcmp.S: (memcmp) Likewise * memcpy.S: (memcpy) Likewise * memmove.S: (memmove) Likewise * memset.S: (memset) Likewise * setjmp.S: (setjmp) Likewise * strchr.S: (strchr) Likewise * strlen.S: (strlen) Likewise newlib/libc/stdlib/ * srtold.c: (__flt_rounds) Disable for Intel MCU
87 lines
1.2 KiB
ArmAsm
87 lines
1.2 KiB
ArmAsm
/*
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* ====================================================
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* Copyright (C) 1998, 2002 by Red Hat Inc. All rights reserved.
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*
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* Permission to use, copy, modify, and distribute this
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* software is freely granted, provided that this notice
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* is preserved.
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* ====================================================
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*/
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#include "i386mach.h"
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.global SYM (memcpy)
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SOTYPE_FUNCTION(memcpy)
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SYM (memcpy):
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#ifdef __iamcu__
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pushl esi
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pushl edi
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movl eax,edi
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movl edx,esi
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rep movsb
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popl edi
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popl esi
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#else
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pushl ebp
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movl esp,ebp
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pushl esi
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pushl edi
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pushl ebx
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movl 8(ebp),edi
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movl 16(ebp),ecx
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movl 12(ebp),esi
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cld
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#ifndef __OPTIMIZE_SIZE__
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cmpl $8,ecx
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jbe .L3
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/* move any preceding bytes until destination address is long word aligned */
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movl edi,edx
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movl ecx,ebx
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andl $3,edx
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jz .L11
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movl $4,ecx
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subl edx,ecx
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andl $3,ecx
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subl ecx,ebx
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rep
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movsb
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mov ebx,ecx
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/* move bytes a long word at a time */
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.L11:
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shrl $2,ecx
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.p2align 2
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rep
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movsl
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movl ebx,ecx
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andl $3,ecx
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#endif /* !__OPTIMIZE_SIZE__ */
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/* handle any remaining bytes */
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.L3:
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rep
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movsb
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.L5:
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movl 8(ebp),eax
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leal -12(ebp),esp
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popl ebx
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popl edi
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popl esi
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leave
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#endif
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ret
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