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958e329d59
Add a floating point environment for SPU (cell): * configure.host: add libm_machine_dir=spu. * libm/machine/configure: Add spu. * libm/machine/configure.in: regenerated with spu added. * libc/machine/spu/include/fenv.h: New file. * libc/machine/spu/sys/fenv.h: Ditto. * libm/machine/spu/Makefile.am: Ditto. * libm/machine/spu/Makefile.in: Ditto. * libm/machine/spu/aclocal.m4: Ditto. * libm/machine/spu/configure: Ditto. * libm/machine/spu/configure.in: Ditto. * libm/machine/spu/fe_dfl_env.c: Ditto. * libm/machine/spu/feclearexcept.c: Ditto. * libm/machine/spu/fegetenv.c: Ditto. * libm/machine/spu/fegetexceptflag.c: Ditto. * libm/machine/spu/fegetround.c: Ditto. * libm/machine/spu/feholdexcept.c: Ditto. * libm/machine/spu/feraiseexcept.c: Ditto. * libm/machine/spu/fesetenv.c: Ditto. * libm/machine/spu/fesetexceptflag.c: Ditto. * libm/machine/spu/fesetround.c: Ditto. * libm/machine/spu/fetestexcept.c: Ditto. * libm/machine/spu/feupdateenv.c: Ditto. * libm/machine/spu/headers/feclearexcept.h: Ditto. * libm/machine/spu/headers/fefpscr.h: Ditto. * libm/machine/spu/headers/fegetenv.h: Ditto. * libm/machine/spu/headers/fegetexceptflag.h: Ditto. * libm/machine/spu/headers/fegetround.h: Ditto. * libm/machine/spu/headers/feholdexcept.h: Ditto. * libm/machine/spu/headers/feraiseexcept.h: Ditto. * libm/machine/spu/headers/fesetenv.h: Ditto. * libm/machine/spu/headers/fesetexceptflag.h: Ditto. * libm/machine/spu/headers/fesetround.h: Ditto. * libm/machine/spu/headers/fetestexcept.h: Ditto. * libm/machine/spu/headers/feupdateenv.h: Ditto.
80 lines
3.0 KiB
C
80 lines
3.0 KiB
C
/*
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(C) Copyright 2001,2006,
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International Business Machines Corporation,
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Sony Computer Entertainment, Incorporated,
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Toshiba Corporation,
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All rights reserved.
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Redistribution and use in source and binary forms, with or without
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modification, are permitted provided that the following conditions are met:
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* Redistributions of source code must retain the above copyright notice,
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this list of conditions and the following disclaimer.
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* Redistributions in binary form must reproduce the above copyright
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notice, this list of conditions and the following disclaimer in the
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documentation and/or other materials provided with the distribution.
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* Neither the names of the copyright holders nor the names of their
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contributors may be used to endorse or promote products derived from this
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software without specific prior written permission.
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THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS
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IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
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TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
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PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER
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OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
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EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
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PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
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PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
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LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
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NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
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SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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/*
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* Functions to pack/unpack the 128 bit fpscr to/from the 32 bit fenv_t.
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* The fpscr currently has 32 of 128 bits defined.
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*/
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#ifndef _FEFPSCR_H_
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#define _FEFPSCR_H_ 1
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#include <spu_intrinsics.h>
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#include <fenv.h>
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static __inline vec_uint4 __unpack_fpscr(fenv_t word)
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{
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vec_uint4 fpscr;
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vec_uchar16 splat = { 0, 1, 0, 1, 0, 1, 0, 1, 2, 3, 2, 3, 2, 3, 2, 3 };
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vec_short8 rotm = { -12, -9, -3, 0, -10, -7, -3, 0 };
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vec_uint4 mask = { 0x00000f07, 0x00003f07, 0x00003f07, 0x00000f07 };
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fpscr = spu_promote (word, 0);
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fpscr = spu_shuffle (fpscr, fpscr, splat);
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/*
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* The casts here are important, so we generate different code.
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*/
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fpscr = (vec_uint4) spu_rlmask ((vec_short8) fpscr, rotm);
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fpscr = (vec_uint4) spu_and ((vec_short8) fpscr, 0xff);
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fpscr = spu_or (spu_rlmask(fpscr, -8), fpscr);
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fpscr = spu_and (fpscr, mask);
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return fpscr;
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}
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static __inline fenv_t __pack_fpscr(vec_uint4 fpscr)
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{
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vec_uchar16 pat = { 0x80, 2, 0x80, 10, 0x80, 3, 0x80, 11,
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0x80, 6, 0x80, 14, 0x80, 7, 0x80, 15 };
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vec_ushort8 shl = { 12, 10, 9, 7, 3, 3, 0, 0 };
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vec_uint4 mask = { 0x00000f07, 0x00003f07, 0x00003f07, 0x00000f07 };
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vec_uint4 word;
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word = spu_and (fpscr, mask);
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word = spu_shuffle (word, word, pat);
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word = (vec_uint4) spu_sl ((vec_short8) word, shl);
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word = spu_orx (word);
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return spu_extract (word, 0);
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}
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#endif
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