118 lines
3.3 KiB
ArmAsm
118 lines
3.3 KiB
ArmAsm
/*
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* strchrnul - find a character or nul in a string
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*
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* Copyright (c) 2014-2022, Arm Limited.
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* SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception
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*/
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#if (defined (__OPTIMIZE_SIZE__) || defined (PREFER_SIZE_OVER_SPEED))
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/* See strchrnul-stub.c */
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#else
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/* Assumptions:
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*
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* ARMv8-a, AArch64
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* Neon Available.
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*/
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#include "asmdefs.h"
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/* Arguments and results. */
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#define srcin x0
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#define chrin w1
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#define result x0
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#define src x2
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#define tmp1 x3
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#define wtmp2 w4
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#define tmp3 x5
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#define vrepchr v0
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#define vdata1 v1
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#define vdata2 v2
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#define vhas_nul1 v3
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#define vhas_nul2 v4
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#define vhas_chr1 v5
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#define vhas_chr2 v6
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#define vrepmask v7
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#define vend1 v16
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/* Core algorithm.
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For each 32-byte hunk we calculate a 64-bit syndrome value, with
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two bits per byte (LSB is always in bits 0 and 1, for both big
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and little-endian systems). For each tuple, bit 0 is set iff
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the relevant byte matched the requested character or nul. Since the
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bits in the syndrome reflect exactly the order in which things occur
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in the original string a count_trailing_zeros() operation will
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identify exactly which byte is causing the termination. */
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/* Locals and temporaries. */
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ENTRY (strchrnul)
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PTR_ARG (0)
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/* Magic constant 0x40100401 to allow us to identify which lane
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matches the termination condition. */
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mov wtmp2, #0x0401
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movk wtmp2, #0x4010, lsl #16
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dup vrepchr.16b, chrin
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bic src, srcin, #31 /* Work with aligned 32-byte hunks. */
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dup vrepmask.4s, wtmp2
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ands tmp1, srcin, #31
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b.eq L(loop)
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/* Input string is not 32-byte aligned. Rather than forcing
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the padding bytes to a safe value, we calculate the syndrome
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for all the bytes, but then mask off those bits of the
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syndrome that are related to the padding. */
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ld1 {vdata1.16b, vdata2.16b}, [src], #32
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neg tmp1, tmp1
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cmeq vhas_chr1.16b, vdata1.16b, vrepchr.16b
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cmeq vhas_chr2.16b, vdata2.16b, vrepchr.16b
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cmhs vhas_nul1.16b, vhas_chr1.16b, vdata1.16b
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cmhs vhas_nul2.16b, vhas_chr2.16b, vdata2.16b
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and vhas_chr1.16b, vhas_nul1.16b, vrepmask.16b
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and vhas_chr2.16b, vhas_nul2.16b, vrepmask.16b
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lsl tmp1, tmp1, #1
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addp vend1.16b, vhas_chr1.16b, vhas_chr2.16b // 256->128
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mov tmp3, #~0
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addp vend1.16b, vend1.16b, vend1.16b // 128->64
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lsr tmp1, tmp3, tmp1
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mov tmp3, vend1.d[0]
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bic tmp1, tmp3, tmp1 // Mask padding bits.
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cbnz tmp1, L(tail)
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.p2align 4
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L(loop):
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ld1 {vdata1.16b, vdata2.16b}, [src], #32
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cmeq vhas_chr1.16b, vdata1.16b, vrepchr.16b
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cmeq vhas_chr2.16b, vdata2.16b, vrepchr.16b
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cmhs vhas_nul1.16b, vhas_chr1.16b, vdata1.16b
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cmhs vhas_nul2.16b, vhas_chr2.16b, vdata2.16b
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orr vend1.16b, vhas_nul1.16b, vhas_nul2.16b
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umaxp vend1.16b, vend1.16b, vend1.16b
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mov tmp1, vend1.d[0]
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cbz tmp1, L(loop)
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/* Termination condition found. Now need to establish exactly why
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we terminated. */
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and vhas_chr1.16b, vhas_nul1.16b, vrepmask.16b
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and vhas_chr2.16b, vhas_nul2.16b, vrepmask.16b
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addp vend1.16b, vhas_chr1.16b, vhas_chr2.16b // 256->128
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addp vend1.16b, vend1.16b, vend1.16b // 128->64
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mov tmp1, vend1.d[0]
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L(tail):
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/* Count the trailing zeros, by bit reversing... */
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rbit tmp1, tmp1
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/* Re-bias source. */
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sub src, src, #32
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clz tmp1, tmp1 /* ... and counting the leading zeros. */
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/* tmp1 is twice the offset into the fragment. */
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add result, src, tmp1, lsr #1
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ret
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END (strchrnul)
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#endif
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