212 lines
6.3 KiB
ArmAsm
212 lines
6.3 KiB
ArmAsm
/* exceptions-asm.S -- exception handling for OpenRISC 1000.
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*
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* Copyright (c) 2011, 2014 Authors
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*
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* Contributor Julius Baxter <juliusbaxter@gmail.com>
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* Contributor Stefan Wallentowitz <stefan.wallentowitz@tum.de>
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*
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* The authors hereby grant permission to use, copy, modify, distribute,
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* and license this software and its documentation for any purpose, provided
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* that existing copyright notices are retained in all copies and that this
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* notice is included verbatim in any distributions. No written agreement,
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* license, or royalty fee is required for any of the authorized uses.
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* Modifications to this software may be copyrighted by their authors
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* and need not follow the licensing terms described here, provided that
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* the new terms are clearly indicated on the first page of each file where
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* they apply.
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*/
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#include "include/or1k-asm.h"
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#include "include/or1k-sprs.h"
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/* -------------------------------------------------------------------------- */
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/*!Generic exception handler function
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*/
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/* -------------------------------------------------------------------------- */
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// Warning - this must be the same as specified in crt0.S
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#define EXCEPTION_STACK_SIZE 136
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.extern _or1k_exception_handler_table
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/* -------------------------------------------------------------------------- */
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/*!Function to call appropriate exception handler
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*/
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/* -------------------------------------------------------------------------- */
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.section .text
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.global _or1k_exception_handler
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.type _or1k_exception_handler,@function
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/*
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r3 = address of exception vector
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r4 = address where exception occurred
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*/
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#define GPR_BUF_OFFSET(x) (x << 2)
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_or1k_exception_handler:
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/* Store remainder of state (r3,r4 stored in vector entry)*/
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l.sw GPR_BUF_OFFSET(2)(r1),r2
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l.sw GPR_BUF_OFFSET(5)(r1),r5
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l.sw GPR_BUF_OFFSET(6)(r1),r6
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l.sw GPR_BUF_OFFSET(7)(r1),r7
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l.sw GPR_BUF_OFFSET(8)(r1),r8
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l.sw GPR_BUF_OFFSET(9)(r1),r9
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l.sw GPR_BUF_OFFSET(10)(r1),r10
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l.sw GPR_BUF_OFFSET(11)(r1),r11
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l.sw GPR_BUF_OFFSET(12)(r1),r12
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l.sw GPR_BUF_OFFSET(13)(r1),r13
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l.sw GPR_BUF_OFFSET(14)(r1),r14
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l.sw GPR_BUF_OFFSET(15)(r1),r15
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l.sw GPR_BUF_OFFSET(16)(r1),r16
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l.sw GPR_BUF_OFFSET(17)(r1),r17
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l.sw GPR_BUF_OFFSET(18)(r1),r18
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l.sw GPR_BUF_OFFSET(19)(r1),r19
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l.sw GPR_BUF_OFFSET(20)(r1),r20
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l.sw GPR_BUF_OFFSET(21)(r1),r21
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l.sw GPR_BUF_OFFSET(22)(r1),r22
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l.sw GPR_BUF_OFFSET(23)(r1),r23
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l.sw GPR_BUF_OFFSET(24)(r1),r24
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l.sw GPR_BUF_OFFSET(25)(r1),r25
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l.sw GPR_BUF_OFFSET(26)(r1),r26
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l.sw GPR_BUF_OFFSET(27)(r1),r27
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l.sw GPR_BUF_OFFSET(28)(r1),r28
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l.sw GPR_BUF_OFFSET(29)(r1),r29
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l.sw GPR_BUF_OFFSET(30)(r1),r30
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l.sw GPR_BUF_OFFSET(31)(r1),r31
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l.mfspr r14,r0,OR1K_SPR_SYS_EPCR_BASE
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l.sw 0x80(r1),r14
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l.mfspr r14,r0,OR1K_SPR_SYS_ESR_BASE
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l.sw 0x84(r1),r14
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/* Replace impure pointer for exception */
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l.movhi r20,hi(_or1k_exception_impure_ptr)
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l.ori r20,r20,lo(_or1k_exception_impure_ptr)
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#ifdef __OR1K_MULTICORE__
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l.lwz r20,0(r20)
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l.mfspr r22,r0,OR1K_SPR_SYS_COREID_ADDR
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l.slli r22,r22,2
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l.add r20,r20,r22
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#endif
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l.lwz r20,0(r20)
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l.movhi r21,hi(_or1k_current_impure_ptr)
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l.ori r21,r21,lo(_or1k_current_impure_ptr)
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#ifdef __OR1K_MULTICORE__
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l.lwz r21,0(r21)
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l.add r21,r21,r22
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#endif
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l.sw 0(r21),r20
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/* Determine offset in table of exception handler using r3*/
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l.andi r13,r3,0xff00
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l.srli r13,r13,6
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/* Substract 2 words, as we have no vector at 0 and no reset handler */
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l.addi r13,r13,-8
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/* r13 now contains offset in or1k_exception_handler_table for
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function
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*/
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/* Get or1k_exception_handler_table address */
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l.movhi r14,hi(_or1k_exception_handler_table)
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l.ori r14,r14,lo(_or1k_exception_handler_table)
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#ifdef __OR1K_MULTICORE__
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/* Read the address of the array of cores */
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/* r14 = (*or1k_exception_handler_table) */
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l.lwz r14,0(r14)
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/* Generate core offset in array (off = coreid*30*4 = coreid*120) */
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/* r15 = coreid */
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l.mfspr r15,r0,OR1K_SPR_SYS_COREID_ADDR
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/* r16 = coreid * 128 */
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l.slli r16,r15,7
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/* r15 = coreid * 8 */
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l.slli r15,r15,3
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/* r15 = coreid*128 - coreid*8 = coreid*120 = off */
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l.sub r15,r16,r15
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/* r14 = (*or1k_exception_handler_table)[coreid] = r14 + off */
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l.add r14,r14,r15
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#endif
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/* r14 now contains base of exception handler table */
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/* add offset of exception vector */
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l.add r14,r14,r13
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/* load handler address from table */
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l.lwz r13, 0(r14)
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/* Check to see if this handler has been set yet */
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l.sfne r13,r0
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OR1K_DELAYED_NOP(OR1K_INST(l.bnf exception_exit))
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/* Call exception handler, copy EPCR to r3 */
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OR1K_DELAYED(
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OR1K_INST(l.or r3,r4,r4),
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OR1K_INST(l.jalr r13)
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)
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/* Restore impure pointer */
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l.movhi r20,hi(_or1k_impure_ptr)
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l.ori r20,r20,lo(_or1k_impure_ptr)
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#ifdef __OR1K_MULTICORE__
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l.lwz r20,0(r20)
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l.mfspr r22,r0,OR1K_SPR_SYS_COREID_ADDR
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l.slli r22,r22,2
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l.add r20,r20,r22
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#endif
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l.lwz r20,0(r20)
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l.movhi r21,hi(_or1k_current_impure_ptr)
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l.ori r21,r21,lo(_or1k_current_impure_ptr)
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#ifdef __OR1K_MULTICORE__
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l.lwz r21,0(r21)
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l.add r21,r21,r22
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#endif
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l.sw 0(r21),r20
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/* Restore state */
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l.lwz r2,0x80(r1)
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l.mtspr r0,r2,OR1K_SPR_SYS_EPCR_BASE
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l.lwz r2,0x84(r1)
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l.mtspr r0,r2,OR1K_SPR_SYS_ESR_BASE
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l.lwz r2,GPR_BUF_OFFSET(2)(r1)
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l.lwz r3,GPR_BUF_OFFSET(3)(r1)
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l.lwz r4,GPR_BUF_OFFSET(4)(r1)
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l.lwz r5,GPR_BUF_OFFSET(5)(r1)
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l.lwz r6,GPR_BUF_OFFSET(6)(r1)
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l.lwz r7,GPR_BUF_OFFSET(7)(r1)
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l.lwz r8,GPR_BUF_OFFSET(8)(r1)
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l.lwz r9,GPR_BUF_OFFSET(9)(r1)
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l.lwz r10,GPR_BUF_OFFSET(10)(r1)
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l.lwz r11,GPR_BUF_OFFSET(11)(r1)
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l.lwz r12,GPR_BUF_OFFSET(12)(r1)
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l.lwz r13,GPR_BUF_OFFSET(13)(r1)
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l.lwz r14,GPR_BUF_OFFSET(14)(r1)
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l.lwz r15,GPR_BUF_OFFSET(15)(r1)
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l.lwz r16,GPR_BUF_OFFSET(16)(r1)
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l.lwz r17,GPR_BUF_OFFSET(17)(r1)
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l.lwz r18,GPR_BUF_OFFSET(18)(r1)
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l.lwz r19,GPR_BUF_OFFSET(19)(r1)
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l.lwz r20,GPR_BUF_OFFSET(20)(r1)
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l.lwz r21,GPR_BUF_OFFSET(21)(r1)
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l.lwz r22,GPR_BUF_OFFSET(22)(r1)
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l.lwz r23,GPR_BUF_OFFSET(23)(r1)
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l.lwz r24,GPR_BUF_OFFSET(24)(r1)
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l.lwz r25,GPR_BUF_OFFSET(25)(r1)
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l.lwz r26,GPR_BUF_OFFSET(26)(r1)
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l.lwz r27,GPR_BUF_OFFSET(27)(r1)
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l.lwz r28,GPR_BUF_OFFSET(28)(r1)
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l.lwz r29,GPR_BUF_OFFSET(29)(r1)
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l.lwz r30,GPR_BUF_OFFSET(30)(r1)
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l.lwz r31,GPR_BUF_OFFSET(31)(r1)
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// Restore original stack
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l.lwz r1,GPR_BUF_OFFSET(1)(r1)
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l.rfe
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l.nop
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exception_exit:
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/* Exception handler not set, exit */
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OR1K_DELAYED(
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OR1K_INST(l.or r3,r4,r4),
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OR1K_INST(l.jal exit)
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)
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