271 lines
7.4 KiB
ArmAsm
271 lines
7.4 KiB
ArmAsm
/* crt0.S -- startup file for frv.
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*
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* Copyright (c) 2002, 2003 Red Hat, Inc
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*
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* The authors hereby grant permission to use, copy, modify, distribute,
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* and license this software and its documentation for any purpose, provided
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* that existing copyright notices are retained in all copies and that this
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* notice is included verbatim in any distributions. No written agreement,
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* license, or royalty fee is required for any of the authorized uses.
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* Modifications to this software may be copyrighted by their authors
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* and need not follow the licensing terms described here, provided that
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* the new terms are clearly indicated on the first page of each file where
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* they apply.
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*/
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#include <frv-asm.h>
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/* statically store .Lcall's address so we can see if we are running
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at the location we were linked for or a different location. */
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.data
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.type EXT(__start_cmp),@object
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.size EXT(__start_cmp),4
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.p2align 2
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EXT(__start_cmp):
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.picptr .Lcall
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.globl __start
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.weak _start
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.text
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.type __start,@function
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__start:
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_start:
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call .Lcall /* set up _gp in a pic-friendly manor */
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.Lcall: movsg lr, gr4
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P(sethi) #gprelhi(.Lcall), gr5
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setlo #gprello(.Lcall), gr5
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P(sub) gr4, gr5, gr16
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#if ! __FRV_FDPIC__
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sethi #gprelhi(EXT(_stack)), sp /* load up stack pointer */
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P(setlo) #gprello(EXT(_stack)), sp
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setlos #0, fp /* zero fp to allow unwinders to stop */
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P(add) sp, gr16, sp
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#define FDPIC(...)
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#else
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#define FDPIC(...) __VA_ARGS__
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/* The assembler will rightfully claim that
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#hi/lo(__stacksize) are unsafe for PIC, but since __stacksize
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is absolute, and we don't want it to be relocated, we should
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be fine. */
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sethi #gprelhi(EXT(__end)), gr6
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P(sethi) #hi(EXT(__stacksize+7)), gr5
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setlo #gprello(EXT(__end)), gr6
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P(setlo) #lo(EXT(__stacksize+7)), gr5
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add gr6, gr16, gr6
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add gr6, gr5, gr5
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andi gr5, -8, sp
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/* Using GPREL to compute _GLOBAL_OFFSET_TABLE_'s will force
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the entire program to relocate as a unit, which is fine for
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frv-elf. */
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P(sethi) #gprelhi(EXT(_GLOBAL_OFFSET_TABLE_)), gr15
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setlo #gprello(EXT(_GLOBAL_OFFSET_TABLE_)), gr15
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/* We compute the value in a call-saved register (that happens
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to be the PIC register in the EABI, and copy it to gr15 before
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every call. */
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add gr15, gr16, gr17
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#endif
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sethi #gprelhi(EXT(__start_cmp)), gr5
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setlo #gprello(EXT(__start_cmp)), gr5
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ld @(gr5,gr16), gr6
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subcc gr4, gr6, gr8, icc0
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beq icc0, 0, .Lfixed
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P(st) gr4, @(gr5, gr16) /* update so if we restart no need to fixup */
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setlos 4, gr11
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#if ! __FRV_FDPIC__
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/* fixup the .ctors list */
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sethi #gprelhi(EXT(__CTOR_LIST__)), gr9
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P(sethi) #gprelhi(EXT(__CTOR_END__)), gr10
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setlo #gprello(EXT(__CTOR_LIST__)), gr9
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P(setlo) #gprello(EXT(__CTOR_END__)), gr10
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add gr9, gr16, gr9
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P(add) gr10, gr16, gr10
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addi gr9, 4, gr9
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P(subi) gr10, 4, gr10
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call EXT(__frv_fixptrs)
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/* fixup the .dtors list */
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P(sethi) #gprelhi(EXT(__DTOR_LIST__)), gr9
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sethi #gprelhi(EXT(__DTOR_END__)), gr10
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P(setlo) #gprello(EXT(__DTOR_LIST__)), gr9
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setlo #gprello(EXT(__DTOR_END__)), gr10
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P(add) gr9, gr16, gr9
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add gr10, gr16, gr10
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P(addi) gr9, 4, gr9
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subi gr10, 4, gr10
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call EXT(__frv_fixptrs)
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#endif /* ! __FRV_FDPIC__ */
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/* fixup the .dtors list */
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P(sethi) #gprelhi(EXT(__ROFIXUP_LIST__)), gr9
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sethi #gprelhi(EXT(__ROFIXUP_END__)), gr10
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P(setlo) #gprello(EXT(__ROFIXUP_LIST__)), gr9
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setlo #gprello(EXT(__ROFIXUP_END__)), gr10
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P(add) gr9, gr16, gr9
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add gr10, gr16, gr10
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FDPIC(mov gr17, gr15)
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call EXT(__frv_fix_usrptrs)
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.Lfixed:
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/* HSR flags */
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#define HSR_ICE 0x80000000 /* Instruction cache enable */
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#define HSR_DCE 0x40000000 /* Data cache enable */
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#define HSR_CBM 0x08000000 /* Cache copy back mode */
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#define HSR_EIMM 0x04000000 /* Enable Instruction MMU */
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#define HSR_EDMM 0x02000000 /* Enable Data MMU */
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#define HSR_EMEM 0x00800000 /* Enable MMU miss exception mask */
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#define HSR_RME 0x00400000 /* Ram mode enable */
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#define HSR_SA 0x00001000 /* Start address */
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#define HSR_FRN 0x00000800 /* Number of FPRs */
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#define HSR_GRN 0x00000400 /* Number of GPRs */
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#define HSR_FRHE 0x00000200 /* FR Higher Enable */
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#define HSR_FRLE 0x00000100 /* FR Lower Enable */
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#define HSR_GRHE 0x00000080 /* GR Higher Enable */
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#define HSR_GRLE 0x00000040 /* GR Lower Enable */
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#ifndef HSR_CLEAR
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#define HSR_CLEAR 0
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#endif
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#ifndef HSR_SET
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#ifndef FRV_NO_CACHE
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#define HSR_SET (HSR_ICE|HSR_DCE|HSR_FRHE|HSR_FRLE|HSR_GRHE|HSR_GRLE)
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#else
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#define HSR_SET (HSR_FRHE|HSR_FRLE|HSR_GRHE|HSR_GRLE)
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#endif
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#endif
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/* PSR flags */
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#define PSR_ICE 0x00010000 /* In circuit emulation mode */
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#define PSR_NEM 0x00004000 /* Non-exception mode */
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#define PSR_CM 0x00002000 /* Conditional mode */
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#define PSR_BE 0x00001000 /* Big endian mode */
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#define PSR_EF 0x00000100 /* Enable floating point */
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#define PSR_EM 0x00000080 /* Enable media instructions */
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#define PSR_S 0x00000004 /* Enable supervisor mode */
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#define PSR_PS 0x00000002 /* Previous supervisor mode */
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#define PSR_ET 0x00000001 /* Enable interrupts */
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#ifndef PSR_CLEAR
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#if __FRV_FPR__
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#define PSR_CLEAR 0
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#else
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#define PSR_CLEAR (PSR_EF|PSR_EM)
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#endif
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#endif
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#ifndef PSR_SET
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#if __FRV_FPR__
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#define PSR_SET (PSR_NEM|PSR_CM|PSR_EF|PSR_EM)
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#else
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#define PSR_SET (PSR_NEM|PSR_CM)
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#endif
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#endif
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/* Enable floating point */
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movsg hsr0, gr4
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P(sethi) #hi(HSR_SET), gr5
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setlo #lo(HSR_SET), gr5
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P(sethi) #hi(~HSR_CLEAR), gr6
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setlo #lo(~HSR_CLEAR), gr6
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or gr4, gr5, gr4
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and gr4, gr6, gr4
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movgs gr4, hsr0
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movsg psr, gr4
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P(sethi) #hi(PSR_SET), gr5
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setlo #lo(PSR_SET), gr5
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P(sethi) #hi(~PSR_CLEAR), gr6
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setlo #lo(~PSR_CLEAR), gr6
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or gr4, gr5, gr4
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and gr4, gr6, gr4
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movgs gr4, psr
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/* zero the bss area */
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P(sethi) #gprelhi(__bss_start), gr8
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sethi #gprelhi(__end), gr4
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P(setlo) #gprello(__bss_start), gr8
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setlo #gprello(__end), gr4
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P(add) gr8, gr16, gr8
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add gr4, gr16, gr4
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P(setlos) #0, gr9
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sub gr4, gr8, gr10
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FDPIC(mov gr17, gr15)
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call EXT(memset)
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P(setlos) #0, gr8 /* zero argc, argv, envp */
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setlos #0, gr9
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P(setlos) #0, gr10
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FDPIC(mov gr17, gr15)
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call EXT(main)
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FDPIC(mov gr17, gr15)
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call EXT(exit)
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.Lend:
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.size __start,(.Lend-__start)
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#if ! __FRV_FDPIC__
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/* Routine to adjust pointers
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gr8 = difference to adjust by
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gr9 = starting address
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gr10 = ending address + 4
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gr11 = amount to add to the pointer each iteration. */
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.globl EXT(__frv_fixptrs)
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.type EXT(__frv_fixptrs),@function
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EXT(__frv_fixptrs):
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P(sub) gr9, gr11, gr9
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sub gr10, gr11, gr10
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.Lloop2:
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cmp gr10, gr9, icc0
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bls icc0, 0, .Lret2
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ldu @(gr9,gr11), gr5
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add gr8, gr5, gr5
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P(st) gr5, @(gr9,gr0)
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bra .Lloop2
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.Lret2: ret
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.Lend2:
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.size EXT(__frv_fixptrs),.Lend2-EXT(__frv_fixptrs)
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#endif /* ! __FRV_FDPIC__ */
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/* Routine to adjust statically initialized pointers
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Note since these are pointers to pointers, they
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need to be adjusted themsevles.
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gr8 = difference to adjust by
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gr9 = starting address
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gr10 = ending address + 4
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gr11 = amount to add to the pointer each iteration. */
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.globl EXT(__frv_fix_usrptrs)
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.type EXT(__frv_fix_usrptrs),@function
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EXT(__frv_fix_usrptrs):
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P(sub) gr9, gr11, gr9
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sub gr10, gr11, gr10
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.Lloop3:
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cmp gr10, gr9, icc0
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bls icc0, 0, .Lret3
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ldu @(gr9,gr11), gr5
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ld @(gr5, gr8), gr6
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cmp gr6, gr0, icc0 /* skip pointers initialized to 0 */
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beq icc0, 0, .Lloop3
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add gr8, gr6, gr6
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P(st) gr6, @(gr5,gr8)
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bra .Lloop3
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.Lret3: ret
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.Lend3:
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.size EXT(__frv_fix_usrptrs),.Lend2-EXT(__frv_fix_usrptrs)
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