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11afe8f6b6
crt0.S for ARC used to use instruction "asr.f lp_count, r3, 2" for all cores
except ARC601. However instructions which shift more than 1 bit are
optional, so this crt0.S didn't worked for all ARC cores.
Luckily this is a shift just by 2 bits on all occassions, so fix is trivial
- use two single-bit shifts.
libgloss/ChangeLog
2016-04-29 Anton Kolesov <anton.kolesov@synopsys.com>
* arc/crt0.S: Fix support for processors without barrel-shifter.
Signed-off-by: Anton Kolesov <Anton.Kolesov@synopsys.com>