5 Commits

Author	SHA1	Message	Date
Kito Cheng	f685416883	RISC-V: Implment finite and fpclassify	2020-10-27 10:50:46 -04:00
Kito Cheng	245b6f20d5	RISC-V: Add fabs[f], fmax[f] and fmin[f].	2020-10-27 10:50:46 -04:00
Keith Packard via Newlib	f9c1c0a860	libm/riscv: Fix machine-specific sqrt build process ... Like ARM, some RISC-V implementations have hardware sqrt. Support for that can be detected at compile time, which the code did. However, the filenames were incorrect so that both the risc-v specific and general code were getting included in the resulting library. Fix this by following the ARM model and #include'ing the general code when the architecture-specific support is not available. Signed-off-by: Keith Packard <keithp@keithp.com>	2020-10-14 10:54:30 -04:00
Keith Packard via Newlib	89536c0234	libm/machine/riscv: Add custom fma/sqrt functions when supported [v2] ... Check for HW FMA and SQRT support and use those instructions in place of software implementations. Signed-off-by: Keith Packard <keithp@keithp.com>	2020-10-14 10:54:27 -04:00
Kito Cheng	7040b2de08	Add RISC-V port for libm ... Contributor list: - Michael Neilly <mneilly@yahoo.com> - Kito Cheng <kito.cheng@gmail.com>	2017-08-17 12:54:56 -04:00