Commit Graph

348 Commits

Author SHA1 Message Date
Nick Clifton 853f446a98 Add support for attiny261, attiny461, attiny861, attiny25, attiny45,
attiny85, attiny24, attiny44, attiny84, at90pwm2, at90pwm3, atmega164,
atmega324, atmega644, atmega329, atmega3290, atmega649, atmega6490,
atmega406, atmega640, atmega1280, atmega1281, at90can32, at90can64,
at90usb646, at90usb647, at90usb1286 and at90usb1287.
Move atmega48 and atmega88 from AVR_ISA_M8 to AVR_ISA_PWMx.
2006-04-07 15:18:08 +00:00
Nathan Sidwell cdc2256b76 gas:
* config/tc-m68k.c (m68000_control_regs, m68010_control_regs,
	m68020_control_regs, m68040_control_regs, m68060_control_regs,
	mcf_control_regs, mcf5208_control_regs, mcf5213_control_regs,
	mcf5329_control_regs, mcf5249_control_regs, mcf528x_control_regs,
	mcfv4e_control_regs, m68010_control_regs): Rename and reorder to ...
	(m68000_ctrl, m68010_ctrl, m68020_ctrl, m68040_ctrl, m68060_ctrl,
	mcf_ctrl, mcf5208_ctrl, mcf5213_ctrl, mcf5235_ctrl, mcf5249_ctrl,
	mcf5216_ctrl, mcf5250_ctrl, mcf5271_ctrl, mcf5272_ctrl,
	mcf5282_ctrl, mcfv4e_ctrl): ... these.
	(mcf5275_ctrl, mcf5329_ctrl, mcf5373_ctrl): New.
	(struct m68k_cpu): Change chip field to control_regs.
	(current_chip): Remove.
	(control_regs): New.
	(m68k_archs, m68k_extensions): Adjust.
	(m68k_cpus): Reorder to be in cpu number order.  Adjust.
	(CPU_ALLOW_MC, CPU_ALLOW_NEGATION): Remove.
	(find_cf_chip): Reimplement for new organization of cpu table.
	(select_control_regs): Remove.
	(mri_chip): Adjust.
	(struct save_opts): Save control regs, not chip.
	(s_save, s_restore): Adjust.
	(m68k_lookup_cpu): Give deprecated warning when necessary.
	(m68k_init_arch): Adjust.
	(md_show_usage): Adjust for new cpu table organization.

	include/opcodes:
	* m68k.h (cpu_m68k, cpu_cf, cpu_m68000, cpu_m68008, cpu_m68010,
	cpu_m68020, cpu_m68ec030, cpu_m68040, cpu_m68060, cpu_m68851,
	cpu_m68881, cpu_m68882, cpu_cpu32, cpu_cf5200, cpu_cf5206e,
	cpu_cf5208, cpu_cf521x, cpu_cf5213, cpu_cf5249, cpu_cf528x,
	cpu_cf5307, cpu_cf5329, cpu_cf5407, cpu_cf547x, cpu_cf548x): Remove.
2006-03-28 07:19:16 +00:00
Paul Brook dd665069d7 2006-03-10 Paul Brook <paul@codesourcery.com>
include/opcode/
	* arm.h (ARM_AEXT_V7_ARM): Include v6ZK extensions.
2006-03-10 17:16:49 +00:00
Nathan Sidwell 9c39dc2a8c missing changelog entry for my 2006-02-07 patch
* m68k.h (m68008, m68ec030, m68882): Remove.
	(m68k_mask): New.
	(cpu_m68k, cpu_cf): New.
	(mcf5200, mcf5206e, mcf521x, mcf5249, mcf528x, mcf5307, mcf5407
2006-03-06 13:46:53 +00:00
John David Anglin 8b48d53f29 * hppa.h (pa_opcodes): Reorder bb opcodes so that pa10 opcodes come
first.  Correct mask of bb "B" opcode.
2006-03-04 22:11:48 +00:00
H.J. Lu e3ff04608e gas/
2006-02-27  H.J. Lu <hongjiu.lu@intel.com>

	* gas/config/tc-i386.c (output_insn): Support Intel Merom New
	Instructions.

	* gas/config/tc-i386.h (CpuMNI): New.
	(CpuUnknownFlags): Add CpuMNI.

gas/testsuite/

2006-02-27  H.J. Lu <hongjiu.lu@intel.com>

	* gas/i386/i386.exp: Add merom and x86-64-merom.

	* gas/i386/merom.d: New file.
	* gas/i386/merom.s: Likewise.
	* gas/i386/x86-64-merom.d: Likewise.
	* gas/i386/x86-64-merom.s: Likewise.

include/opcode/

2006-02-27  H.J. Lu <hongjiu.lu@intel.com>

	* i386.h (i386_optab): Support Intel Merom New Instructions.

opcodes/

2006-02-27  H.J. Lu <hongjiu.lu@intel.com>

	* i386-dis.c (IS_3BYTE_OPCODE): New for 3-byte opcodes used by
	Intel Merom New Instructions.
	(THREE_BYTE_0): Likewise.
	(THREE_BYTE_1): Likewise.
	(three_byte_table): Likewise.
	(dis386_twobyte): Use THREE_BYTE_0 for entry 0x38. Use
	THREE_BYTE_1 for entry 0x3a.
	(twobyte_has_modrm): Updated.
	(twobyte_uses_SSE_prefix): Likewise.
	(print_insn): Handle 3-byte opcodes used by Intel Merom New
	Instructions.
2006-02-27 15:35:37 +00:00
Paul Brook 70b232636f 2006-02-24 Paul Brook <paul@codesourcery.com>
gas/
	* config/arm/tc-arm.c (arm_ext_v6_notm, arm_ext_div, arm_ext_v7,
	arm_ext_v7a, arm_ext_v7r, arm_ext_v7m): New variables.
	(struct asm_barrier_opt): Define.
	(arm_v7m_psr_hsh, arm_barrier_opt_hsh): New variables.
	(parse_psr): Accept V7M psr names.
	(parse_barrier): New function.
	(enum operand_parse_code): Add OP_oBARRIER.
	(parse_operands): Implement OP_oBARRIER.
	(do_barrier): New function.
	(do_dbg, do_pli, do_t_barrier, do_t_dbg, do_t_div): New functions.
	(do_t_cpsi): Add V7M restrictions.
	(do_t_mrs, do_t_msr): Validate V7M variants.
	(md_assemble): Check for NULL variants.
	(v7m_psrs, barrier_opt_names): New tables.
	(insns): Add V7 instructions.  Mark V6 instructions absent from V7M.
	(md_begin): Initialize arm_v7m_psr_hsh and arm_barrier_opt_hsh.
	(arm_cpu_option_table): Add Cortex-M3, R4 and A8.
	(arm_arch_option_table): Add armv7, armv7a, armv7r and armv7m.
	(struct cpu_arch_ver_table): Define.
	(cpu_arch_ver): New.
	(aeabi_set_public_attributes): Use cpu_arch_ver.  Set
	Tag_CPU_arch_profile.
	* doc/c-arm.texi: Document new cpu and arch options.
gas/testsuite/
	* gas/arm/thumb32.d: Fix expected msr and mrs output.
	* gas/arm/arch7.d: New test.
	* gas/arm/arch7.s: New test.
	* gas/arm/arch7m-bad.l: New test.
	* gas/arm/arch7m-bad.d: New test.
	* gas/arm/arch7m-bad.s: New test.
include/opcode/
	* arm.h: Add V7 feature bits.
opcodes/
	* arm-dis.c (arm_opcodes): Add V7 instructions.
	(thumb32_opcodes): Ditto.  Handle V7M MSR/MRS variants.
	(print_arm_address): New function.
	(print_insn_arm): Use it.  Add 'P' and 'U' cases.
	(psr_name): New function.
	(print_insn_thumb32): Add 'U', 'C' and 'D' cases.
2006-02-24 15:36:36 +00:00
H.J. Lu 67f0a0341c bfd/
2006-02-23  H.J. Lu  <hongjiu.lu@intel.com>

	* cpu-ia64-opc.c (ins_immu5b): New.
	(ext_immu5b): Likewise.
	(elf64_ia64_operands): Add IMMU5b.

gas/

2006-02-23  H.J. Lu  <hongjiu.lu@intel.com>

	* config/tc-ia64.c (operand_match): Handle IA64_OPND_IMMU5b.

gas/testsuite/

2006-02-23  H.J. Lu  <hongjiu.lu@intel.com>

	* gas/ia64/opc-i.s: Add tests for tf.
	* gas/ia64/pseudo.s: Likewise.
	* gas/ia64/opc-i.d: Updated.
	* gas/ia64/pseudo.d: Likewise.

include/opcode/

2006-02-23  H.J. Lu  <hongjiu.lu@intel.com>

	* ia64.h (ia64_opnd): Add IA64_OPND_IMMU5b.

opcodes/

2006-02-23  H.J. Lu  <hongjiu.lu@intel.com>

	* ia64-opc-i.c (bXc): New.
	(mXc): Likewise.
	(OpX2TaTbYaXcC): Likewise.
	(TF). Likewise.
	(TFCM). Likewise.
	(ia64_opcodes_i): Add instructions for tf.

	* ia64-opc.h (IMMU5b): New.

	* ia64-asmtab.c: Regenerated.
2006-02-23 21:36:17 +00:00
Nathan Sidwell 86fdf2166a * bfd/archures.c (bfd_mach_mcf5200, bfd_mach_mcf5206e,
bfd_mach_mcf5307, bfd_mach_mcf5407, bfd_mach_mcf528x,
	bfd_mach_mcfv4e, bfd_mach_mcf521x, bfd_mach_mcf5249,
	bfd_mach_mcf547x, bfd_mach_mcf548x): Remove.
	(bfd_mach_mcf_isa_a, bfd_mach_mcf_isa_a_div,
	bfd_mach_mcf_isa_a_div_mac, bfd_mach_mcf_isa_a_div_emac,
	bfd_mach_mcf_isa_aplus, bfd_mach_mcf_isa_aplus_mac,
	bfd_mach_mcf_isa_aplus_emac, bfd_mach_mcf_isa_aplus_usp,
	bfd_mach_mcf_isa_aplus_usp_mac, bfd_mach_mcf_isa_aplus_usp_emac,
	bfd_mach_mcf_isa_b, bfd_mach_mcf_isa_b_mac, bfd_mach_mcf_isa_b_emac,
	bfd_mach_mcf_isa_b_usp_float, bfd_mach_mcf_isa_b_usp_float_mac,
	bfd_mach_mcf_isa_b_usp_float_emac): New.
	(bfd_default_scan): Update coldfire mapping.
	* bfd/bfd-in.h (bfd_m68k_mach_to_features,
	bfd_m68k_features_to_mach): Declare.
	* bfd/bfd-in2.h: Rebuilt.
	* bfd/cpu-m68k.c (arch_info_struct): Add new coldfire machines,
	adjust legacy names.
	(m68k_arch_features): New.
	(bfd_m68k_mach_to_features,
	bfd_m68k_features_to_mach): Define.
	* bfd/elf32-m68k.c (elf32_m68k_object_p): New.
	(elf32_m68k_merge_private_bfd_data): Merge the CF EF flags.
	(elf32_m68k_print_private_bfd_data): Print the CF EF flags.
	(elf_backend_object_p): Define.
	* bfd/ieee.c (ieee_write_processor): Update coldfire machines.
	* bfd/libbfd.h: Rebuilt.

	* gas/config/tc-m68k.c (mcf5208_control_regs, mcf5213_control_regs,
	mcf5329_control_regs): New.
	(not_current_architecture, selected_arch, selected_cpu): New.
	(m68k_archs, m68k_extensions): New.
	(archs): Renamed to ...
	(m68k_cpus): ... here.  Adjust.
	(n_arches): Remove.
	(md_pseudo_table): Add arch and cpu directives.
	(find_cf_chip, m68k_ip): Adjust table scanning.
	(no_68851, no_68881): Remove.
	(md_assemble): Lazily initialize.
	(select_control_regs): Adjust cpu names. Add 5208, 5213, 5329.
	(md_init_after_args): Move functionality to m68k_init_arch.
	(mri_chip): Adjust table scanning.
	(md_parse_option): Reimplement 'm' processing to add -march & -mcpu
	options with saner parsing.
	(m68k_lookup_cpu, m68k_set_arch, m68k_set_cpu, m68k_set_extension,
	m68k_init_arch): New.
	(s_m68k_cpu, s_m68k_arch): New.
	(md_show_usage): Adjust.
	(m68k_elf_final_processing): Set CF EF flags.
	* gas/config/tc-m68k.h (m68k_init_after_args): Remove.
	(tc_init_after_args): Remove.
	* gas/doc/c-m68k.texi (M68K-Opts): Document -march, -mcpu options.
	(M68k-Directives): Document .arch and .cpu directives.

	* gas/testsuite/gas/m68k/all.exp: Add arch-cpu-1 test.
	* gas/testsuite/gas/m68k/arch-cpu-1.[sd]: New.

	* include/elf/m68k.h (EF_CPU32, EF_M68000, EF_CFV4E): Rename to ...
	(EF_M68K_CPU32, EF_M68K_M68000, EF_M68K_CFV4E): ... here.
	(EF_M68K_ISA_MASK, EF_M68K_ISA_A, EF_M68K_M68K_ISA_A_PLUS,
	EF_M68K_ISA_B, EF_M68K_HW_DIV, EF_M68K_MAC_MASK, EF_M68K_MAC,
	EF_M68K_EMAC, EF_M68K_USP, EF_M68K_FLOAT): New.

	* include/opcode/m68k.h (m68008, m68ec030, m68882): Remove.
	(m68k_mask): New.
	(cpu_m68k, cpu_cf): New.
	(mcf5200, mcf5206e, mcf521x, mcf5249, mcf528x, mcf5307, mcf5407,
	mcf5470, mcf5480): Rename to cpu_<foo>. Add m680x0 variants.

	* opcodes/m68k-dis.c (print_insn_m68k): Use
	bfd_m68k_mach_to_features.

	* binutils/readelf.c (get_machine_flags): Add logic for EF_M68K flags.
2006-02-07 19:01:10 +00:00
Paul Brook 82cac98f3e 2006-01-31 Paul Brook <paul@codesourcery.com>
Richard Earnshaw <rearnsha@arm.com>

	* gas/config/tc-arm.c: Use arm_feature_set.
	(arm_ext_*, arm_arch_full, arm_arch_t2, arm_arch_none,
	arm_cext_iwmmxt, arm_cext_xscale, arm_cext_maverick, fpu_fpa_ext_v1,
	fpu_fpa_ext_v2, fpu_vfp_ext_v1xd, fpu_vfp_ext_v1, fpu_vfp_ext_v2):
	New variables.
	(insns): Use them.
	(md_atof, opcode_select, opcode_select, md_assemble, md_assemble,
	md_begin, arm_parse_extension, arm_parse_cpu, arm_parse_arch,
	arm_parse_fpu, arm_parse_float_abi, aeabi_set_public_attributes,
	s_arm_cpu, s_arm_arch, s_arm_fpu): Use macros for accessing CPU
	feature flags.
	(arm_legacy_option_table, arm_option_cpu_value_table): New types.
	(arm_opts): Move old cpu/arch options from here...
	(arm_legacy_opts): ... to here.
	(md_parse_option): Search arm_legacy_opts.
	(arm_cpus, arm_archs, arm_extensions, arm_fpus)
	(arm_float_abis, arm_eabis): Make const.

	* include/opcode/arm.h: Use ARM_CPU_FEATURE.
	(ARM_AEXT_*, FPU_ENDIAN_PURE, FPU_VFP_HARD): New.
	(arm_feature_set): Change to a structure.
	(ARM_CPU_HAS_FEATURE, ARM_MERGE_FEATURE_SETS, ARM_CLEAR_FEATURE,
	ARM_FEATURE): New macros.
2006-01-31 14:11:13 +00:00
Hans-Peter Nilsson 1094df9f2d * cris.h (MOVE_M_TO_PREG_OPCODE, MOVE_M_TO_PREG_ZBITS)
(MOVE_PC_INCR_OPCODE_PREFIX, MOVE_PC_INCR_OPCODE_SUFFIX): New macros.
	(ADD_PC_INCR_OPCODE): Don't define.
2005-12-07 12:53:57 +00:00
H.J. Lu 466fc394b8 gas/
2005-12-06  H.J. Lu  <hongjiu.lu@intel.com>

	PR gas/1874
	* config/tc-i386.c (match_template): Handle monitor.
	(process_suffix): Likewise.

gas/testsuite/

2005-12-06  H.J. Lu  <hongjiu.lu@intel.com>

	PR gas/1874
	* gas/i386/i386.exp: Add x86-64-prescott for 64bit.

	* gas/i386/prescott.s: Test address size override for monitor.
	* gas/i386/prescott.d: Updated.

	* gas/i386/x86-64-prescott.d: New file.
	* gas/i386/x86-64-prescott.s: Likewise.

include/opcode/

2005-12-06  H.J. Lu  <hongjiu.lu@intel.com>

	PR gas/1874
	* i386.h (i386_optab): Add 64bit support for monitor and mwait.

opcodes/

2005-12-06  H.J. Lu  <hongjiu.lu@intel.com>

	PR gas/1874
	* i386-dis.c (address_mode): New enum type.
	(address_mode): New variable.
	(mode_64bit): Removed.
	(ckprefix): Updated to check address_mode instead of mode_64bit.
	(prefix_name): Likewise.
	(print_insn): Likewise.
	(putop): Likewise.
	(print_operand_value): Likewise.
	(intel_operand_size): Likewise.
	(OP_E): Likewise.
	(OP_G): Likewise.
	(set_op): Likewise.
	(OP_REG): Likewise.
	(OP_I): Likewise.
	(OP_I64): Likewise.
	(OP_OFF): Likewise.
	(OP_OFF64): Likewise.
	(ptr_reg): Likewise.
	(OP_C): Likewise.
	(SVME_Fixup): Likewise.
	(print_insn): Set address_mode.
	(PNI_Fixup): Add 64bit and address size override support for
	monitor and mwait.
2005-12-06 12:40:57 +00:00
Thiemo Seufer 70c500b343 * mips.h: Assign 'm'/'M' codes to MIPS16e save/restore
instructions.  Define MIPS16_ALL_ARGS and MIPS16_ALL_STATICS for
        save/restore encoding of the args field.

        * mips16-opc.c: Add MIPS16e save/restore opcodes.
        * mips-dis.c (print_mips16_insn_arg): Handle printing of 'm'/'M'
        codes for save/restore.

        * config/tc-mips.c (mips16_ip): Add handling of 'm' and 'M' codes
        for the MIPS16e save/restore instructions.

        * gas/mips/mips.exp: Run new save/restore tests.
        * gas/testsuite/gas/mips/mips16e-save.s: New test for generating
        different styles of save/restore instructions.
        * gas/testsuite/gas/mips/mips16e-save.d: New.
2005-11-14 02:25:39 +00:00
Dave Brolley 39e9e2b0c9 2005-10-28 Dave Brolley <brolley@redhat.com>
Contribute the following changes:
        2003-09-29  Dave Brolley  <brolley@redhat.com>

        * dis-asm.h (disassemble_info): insn_sets now (void *) to allow for
        more exotic underlying types to be used.
2005-10-28 19:41:01 +00:00
Dave Brolley 2f8b2203e3 2005-10-28 Dave Brolley <brolley@redhat.com>
Contribute the following changes:
        2005-02-16  Dave Brolley  <brolley@redhat.com>

        * cgen-bitset.h: Rename CGEN_ISA_MASK to CGEN_BITSET. Rename
        cgen_isa_mask_* to cgen_bitset_*.
        * cgen.h: Likewise.
2005-10-28 19:38:59 +00:00
Nick Clifton 4aa1b05777 Add support for the Z80 processor family 2005-10-25 17:40:19 +00:00
Jan Beulich 95baaf8819 include/opcode/
2005-10-24  Jan Beulich  <jbeulich@novell.com>

	* ia64.h (enum ia64_opnd): Move memory operand out of set of
	indirect operands.

bfd/
2005-10-24  Jan Beulich  <jbeulich@novell.com>

	* cpu-ia64-opc.c (elf64_ia64_operands): Move memory operand out of
	set of indirect operands.

gas/
2005-10-24  Jan Beulich  <jbeulich@novell.com>

	* config/tc-ia64.c (enum reg_symbol): Delete IND_MEM.
	(dot_rot): Change type of num_* variables. Check for positive count.
	(ia64_optimize_expr): Re-structure.
	(md_operand): Check for general register.

gas/testsuite/
2005-10-24  Jan Beulich  <jbeulich@novell.com>

	* gas/ia64/index.[sl]: New.
	* gas/ia64/rotX.[sl]: New.
	* gas/ia64/ia64.exp: Run new tests.

opcodes/
2005-10-24  Jan Beulich  <jbeulich@novell.com>

	* ia64-asmtab.c: Regenerate.
2005-10-24 07:42:50 +00:00
John David Anglin e68354936d * hppa.h (pa_opcodes): Add two fcmp opcodes. Reorder ftest opcodes.
Add FLAG_STRICT to pa10 ftest opcode.
2005-10-16 20:42:14 +00:00
John David Anglin 0e7712aeeb * gas/hppa/basic/basic.exp (do_system): Adjust for removal of lha
instructions from system.s.
	* gas/hppa/basic/system.s (lha): Remove.

	* hppa.h (pa_opcodes): Remove lha entries.
2005-10-13 02:26:34 +00:00
John David Anglin 6be079435f * config/tc-hppa.c (strict): Don't initialize. Update comment.
(pa_ip): Promote from PA 1.0 to 1.1 immediately when 1.1 match is
	found.  Simplify handling of "ma" and "mb" completers.

	* hppa.h (FLAG_STRICT): Revise comment.
	(pa_opcode): Revise ordering rules.  Add/move strict pa10 variants
	before corresponding pa11 opcodes.  Add strict pa10 register-immediate
	entries for "fdc".
2005-10-08 19:01:29 +00:00
Catherine Moore fd45a7909b * dis-asm.h (print_insn_bfin): Declare.
* elf/bfin.h: New file.
	* elf/common.h (EM_BLACKFIN): Define.
	* opcode/bfin.h: New file.
2005-09-30 15:12:52 +00:00
John David Anglin bcf84bf3aa * hppa.h (pa_opcodes): Add new "fdc" and "fic" opcode entries. 2005-09-25 02:33:54 +00:00
Andreas Schwab b9984de10d Remove extraneous line. 2005-09-08 10:08:34 +00:00
Chao-ying Fu 5843726e51 * mips.h (OP_SH_MT_U, OP_MASK_MT_U, OP_SH_MT_H, OP_MASK_MT_H,
OP_SH_MTACC_T, OP_MASK_MTACC_T, OP_SH_MTACC_D, OP_MASK_MTACC_D): New
define.
Document !, $, *, &, g, +t, +T operand formats for MT instructions.
(INSN_ASE_MASK): Update to include INSN_MT.
(INSN_MT): New define for MT ASE.
2005-09-06 18:42:58 +00:00
Chao-ying Fu 4a8b3ef692 * mips.h (OP_SH_DSPACC, OP_MASK_DSPACC, OP_SH_DSPACC_S,
OP_MASK_DSPACC_S, OP_SH_DSPSFT, OP_MASK_DSPSFT, OP_SH_DSPSFT_7,
OP_MASK_DSPSFT_7, OP_SH_SA3, OP_MASK_SA3, OP_SH_SA4, OP_MASK_SA4,
OP_SH_IMM8, OP_MASK_IMM8, OP_SH_IMM10, OP_MASK_IMM10, OP_SH_WRDSP,
OP_MASK_WRDSP, OP_SH_RDDSP, OP_MASK_RDDSP): New define.
Document 3, 4, 5, 6, 7, 8, 9, 0, :, ', @ operand formats for DSP
instructions.
(INSN_DSP): New define for DSP ASE.
2005-08-25 18:09:24 +00:00
Alan Modra 7cb11b7ad9 Remove a29k files. 2005-08-18 03:59:23 +00:00
Daniel Jacobowitz e357cc5911 gas/
* config/tc-ppc.c (parse_cpu): Add -me300 support.
	(md_show_usage): Likewise.
	* doc/c-ppc.texi (PowerPC-Opts): Document it.
include/opcode/
	* ppc.h (PPC_OPCODE_E300): Define.
opcodes/
	* ppc-dis.c (powerpc_dialect): Handle e300.
	(print_ppc_disassembler_options): Likewise.
	* ppc-opc.c (PPCE300): Define.
	(powerpc_opcodes): Mark icbt as available for the e300.
binutils/
	* doc/binutils.texi (objdump): Document -M e300.
2005-08-15 15:37:15 +00:00
Martin Schwidefsky b527e96688 * s390.h (s390_opcode_cpu_val): Add enum for cpu type z9-109. 2005-08-12 18:02:38 +00:00
John David Anglin 05708eb707 * hppa.h: Update copyright dates. 2005-08-03 15:08:52 +00:00
John David Anglin e61d5b9790 PR gas/336
* hppa.h (pa_opcodes): Allow 0 immediates in PA 2.0 variants of pdtlb
	and pitlb.
2005-07-28 20:32:21 +00:00
Jan Beulich d08916dade include/opcode/
2005-07-27  Jan Beulich  <jbeulich@novell.com>

	* i386.h (i386_optab): Add comment to movd. Use LongMem for all
	movd-s. Add NoRex64 to movq-s dealing only with mmx or xmm registers.
	Add movq-s as 64-bit variants of movd-s.
2005-07-27 07:04:31 +00:00
John David Anglin 2fac58bbaa * hppa.h: Fix punctuation in comment. 2005-07-19 03:09:33 +00:00
John David Anglin 510c28d485 * hppa.h (pa_opcode): Add rules for opcode ordering. Check first for
implicit space-register addressing.  Set space-register bits on opcodes
	using implicit space-register addressing.  Add various missing pa20
	long-immediate opcodes.  Remove various opcodes using implicit 3-bit
	space-register addressing.  Use "fE" instead of "fe" in various
	fstw opcodes.
2005-07-19 00:11:48 +00:00
Jan Beulich 9d219da08a include/opcode/
2005-07-18  Jan Beulich  <jbeulich@novell.com>

	* i386.h (i386_optab): Operands of aam and aad are unsigned.
2005-07-18 06:11:00 +00:00
H.J. Lu f6cab85f3a gas/
2007-07-15  H.J. Lu <hongjiu.lu@intel.com>

	* gas/config/tc-i386.h (CpuVMX): New.
	(CpuUnknownFlags): Add CpuVMX.

gas/testsuite/

2007-07-15  H.J. Lu <hongjiu.lu@intel.com>

	* gas/i386/i386.exp: Add vmx and x86-64-vmx.

	* gas/i386/vmx.d: New file.
	* gas/i386/vmx.s: Likewise.
	* gas/i386/x86-64-vmx.d: Likewise.
	* gas/i386/x86-64-vmx.s: Likewise.

include/opcode/

2007-07-15  H.J. Lu <hongjiu.lu@intel.com>

	* i386.h (i386_optab): Support Intel VMX Instructions.

opcodes/

2007-07-15  H.J. Lu <hongjiu.lu@intel.com>

	* i386-dis.c (OP_VMX): New. Handle Intel VMX Instructions.
	(VMX_Fixup): New. Fix up Intel VMX Instructions.
	(Em): New.
	(Gm): New.
	(VM): New.
	(dis386_twobyte): Updated entries 0x78 and 0x79.
	(twobyte_has_modrm): Likewise.
	(grps): Use OP_VMX in the "sgdtIQ" entry. Updated GRP9.
	(OP_G): Handle m_mode.
2005-07-15 13:49:53 +00:00
John David Anglin 84761d7a22 * hppa.h (pa_opcode): Don't set FLAG_STRICT in pa10 loads and stores. 2005-07-11 02:31:34 +00:00
Jan Beulich 35e456b7f5 gas/
2005-07-05  Jan Beulich  <jbeulich@novell.com>

	* config/tc-i386.h (CpuSVME): New.
	(CpuUnknownFlags): Include CpuSVME.
	* config/tc-i386.c (cpu_arch): Add .pacifica and .svme. Add opteron
	as alias of sledgehammer.
	(md_assemble): Include invlpga in the check for insns with two source
	operands.
	(process_operands): Include SVME insns in the check for ignored
	segment overrides. Adjust diagnostic.
	(i386_index_check): Special-case SVME insns with memory operands.

gas/testsuite/
2005-07-05  Jan Beulich  <jbeulich@novell.com>

	* gas/i386/svme.d: New.
	* gas/i386/svme.s: New.
	* gas/i386/svme64.d: New.
	* gas/i386/i386.exp: Run new tests.

include/opcode/
2005-07-05  Jan Beulich  <jbeulich@novell.com>

	* i386.h (i386_optab): Add new insns.

opcodes/
2005-07-05  Jan Beulich  <jbeulich@novell.com>

	* i386-dis.c (SVME_Fixup): New.
	(grps): Use it for the lidt entry.
	(PNI_Fixup): Call OP_M rather than OP_E.
	(INVLPG_Fixup): Likewise.
2005-07-05 07:16:53 +00:00
Nick Clifton 310932f740 Update function declarations to ISO C90 formatting 2005-07-01 11:16:27 +00:00
H.J. Lu 1d74c8ce77 gas/
2005-06-20  H.J. Lu  <hongjiu.lu@intel.com>

	PR 1013
	* config/tc-i386.c (md_assemble): Don't call optimize_disp on
	movabs.
	(optimize_disp): Optimize only if possible. Don't use 64bit
	displacement on non-constants and do same on constants if
	possible.

gas/testsuite/

2005-06-20  H.J. Lu  <hongjiu.lu@intel.com>

	PR 1013
	* i386/x86_64.s: Add absolute 64bit addressing tests for mov.
	* i386/x86_64.s: Updated.

include/opcode/

2005-06-20  H.J. Lu  <hongjiu.lu@intel.com>

	PR 1013
	* i386.h (i386_optab): Update comments for 64bit addressing on
	mov. Allow 64bit addressing for mov and movq.
2005-06-20 23:18:38 +00:00
John David Anglin 7029e9a234 * hppa.h (pa_opcodes): Use cM and cX instead of cm and cx,
respectively, in various floating-point load and store patterns.
2005-06-11 15:33:52 +00:00
John David Anglin bffa834f8e * hppa.h (FLAG_STRICT): Correct comment.
(pa_opcodes): Update load and store entries to allow both PA 1.X and
	PA 2.0 mneumonics when equivalent.  Entries with cache control
	completers now require PA 1.1.  Adjust whitespace.
2005-05-23 16:26:43 +00:00
Alan Modra 4390dc9df5 * ppc.h (PPC_OPCODE_POWER5): Define. 2005-05-19 06:59:36 +00:00
Nick Clifton d699bc988f Update the address and phone number of the FSF organization 2005-05-10 10:21:13 +00:00
Jan Beulich b6487cdedb gas/
2005-05-09  Jan Beulich  <jbeulich@novell.com>

	* config/tc-i386.c (parse_insn): Disallow use of prefix separator
	and comma in Intel mode.

include/opcode/
2005-05-09  Jan Beulich  <jbeulich@novell.com>

	* i386.h (i386_optab): Add ht and hnt.
2005-05-09 06:49:01 +00:00
Mark Kettenis 3b4ed14c7c gas/ChangeLog:
* config/tc-i386.c (md_begin): Allow hyphens in mnemonics.
include/opcode/ChangeLog:
* i386.h: Insert hyphens into selected VIA PadLock extensions.
Add xcrypt-ctr.  Provide aliases without hyphens.
opcodes/ChangeLog:
* i386-dis.c: Insert hyphens into selected VIA PadLock extensions.
Add xcrypt-ctr.
2005-04-18 20:59:19 +00:00
H.J. Lu 7212bdd8fb Move entries in ChangeLog-9103 to appropriate */ChangeLog-9103. 2005-04-13 17:33:48 +00:00
H.J. Lu 4902c5bdca Move entries to appropriate ChangeLog files. 2005-04-13 16:53:25 +00:00
Paul Brook 9bbf01c6b5 2005-04-12 Paul Brook <paul@codesourcery.com>
* opcode/m88k.h: Rename psr macros to avoid conflicts.
2005-04-12 19:35:53 +00:00
Mark Kettenis 48c2393632 include/opcode/ChangeLog:
* i386.h (i386_optab): Mark VIA PadLock instructions as ImmExt and
adjust them accordingly.
gas/ChangeLog:
* config/tc-i386.c (output_insn): Handle VIA PadLock instructions
similar to other instructions now that they're marked as ImmExt.
2005-04-12 17:12:30 +00:00
Andreas Schwab 33ef35c8ad Fix typo. 2005-04-04 16:06:26 +00:00