Commit Graph

957 Commits

Author SHA1 Message Date
H.J. Lu 1d74c8ce77 gas/
2005-06-20  H.J. Lu  <hongjiu.lu@intel.com>

	PR 1013
	* config/tc-i386.c (md_assemble): Don't call optimize_disp on
	movabs.
	(optimize_disp): Optimize only if possible. Don't use 64bit
	displacement on non-constants and do same on constants if
	possible.

gas/testsuite/

2005-06-20  H.J. Lu  <hongjiu.lu@intel.com>

	PR 1013
	* i386/x86_64.s: Add absolute 64bit addressing tests for mov.
	* i386/x86_64.s: Updated.

include/opcode/

2005-06-20  H.J. Lu  <hongjiu.lu@intel.com>

	PR 1013
	* i386.h (i386_optab): Update comments for 64bit addressing on
	mov. Allow 64bit addressing for mov and movq.
2005-06-20 23:18:38 +00:00
Jakub Jelinek 2778b3e2b6 * elf/external.h (GRP_ENTRY_SIZE): Define.
* readelf.c (CHECK_ENTSIZE_VALUES, CHECK_ENTSIZE): Define.
	(process_section_headers): Use it.
	(process_relocs): Don't crash if symsec is not SHT_SYMTAB
	or SHT_DYNSYM.
	(process_version_sections): Use sizeof (Elf_External_Versym)
	instead of sh_entsize.
2005-06-17 13:37:23 +00:00
Jan Beulich 721862f496 bfd/
2005-06-17  Jan Beulich  <jbeulich@novell.com>

	* bfd-in2.h (elf_x86_64_reloc_type): Add BFD_RELOC_X86_64_GOTOFF64
	and BFD_RELOC_X86_64_GOTPC32.
	* libbfd.h (bfd_reloc_code_real_names): Likewise.
	* elf64-x86-64.c (x86_64_elf_howto_table): Add entries for
	R_X86_64_PC64, R_X86_64_GOTOFF64, and R_X86_64_GOTPC32.
	(x86_64_reloc_map): Add entries for R_X86_64_PC64, R_X86_64_GOTOFF64,
	and R_X86_64_GOTPC32.
	(elf64_x86_64_info_to_howto): Adjust bounding relocation type.
	(elf64_x86_64_check_relocs): Also handle R_X86_64_PC64,
	R_X86_64_GOTOFF64, and R_X86_64_GOTPC32.
	(elf64_x86_64_relocate_section): Likewise.
	(elf64_x86_64_gc_sweep_hook): Also handle R_X86_64_PC64.

gas/
2005-06-17  Jan Beulich  <jbeulich@novell.com>

	* config/tc-i386.c (reloc): Also handle BFD_RELOC_64_PCREL.
	(tc_i386_fix_adjustable): Include BFD_RELOC_X86_64_GOTOFF64,
	BFD_RELOC_X86_64_DTPOFF64, and BFD_RELOC_X86_64_TPOFF64.
	(output_disp): Do GOTPC conversion also for BFD_RELOC_X86_64_32S
	and BFD_RELOC_32_PCREL. Use BFD_RELOC_X86_64_GOTPC32 instead of
	aborting.
	(output_imm): Do GOTPC conversion also for BFD_RELOC_X86_64_32S.
	Use BFD_RELOC_X86_64_GOTPC32 instead of aborting.
	(tc_gen_reloc): Do GOTPC conversion also for BFD_RELOC_32_PCREL.
	Use BFD_RELOC_X86_64_GOTPC32 instead of aborting. Also handle
	BFD_RELOC_X86_64_GOTOFF64, BFD_RELOC_X86_64_GOTPC32,
	BFD_RELOC_X86_64_DTPOFF64, and BFD_RELOC_X86_64_TPOFF64. Also
	convert 8-byte pc-relative relocations.
	(lex_got): Use BFD_RELOC_X86_64_GOTOFF64 for 64-bit @gotoff.
	(i386_validate_fix): Likewise.
	(x86_cons): Also handle quad values in 64-bit mode.
	(i386_displacement): Also handle BFD_RELOC_X86_64_GOTOFF64.
	(md_apply_fix): Include BFD_RELOC_X86_64_DTPOFF64 and
	BFD_RELOC_X86_64_TPOFF64 in the TLS check. Also convert BFD_RELOC_64
	to pc-relative variant. Also check for BFD_RELOC_64_PCREL.

gas/testsuite/
2005-06-17  Jan Beulich  <jbeulich@novell.com>

	* gas/i386/x86-64-pcrel.s: Add insn requiring 64-bit pc-relative
	relocation. Add insns for all widths of non-pc-relative relocations.
	* gas/i386/x86-64-pcrel.d: Adjust.

include/elf/
2005-06-17  Jan Beulich  <jbeulich@novell.com>

	* x86-64.h (elf_x86_64_reloc_type): Adjust comment for
	R_X86_64_GOTPCREL. Add R_X86_64_PC64, R_X86_64_GOTOFF64, and
	R_X86_64_GOTPC32.
2005-06-17 08:03:59 +00:00
John David Anglin 7029e9a234 * hppa.h (pa_opcodes): Use cM and cX instead of cm and cx,
respectively, in various floating-point load and store patterns.
2005-06-11 15:33:52 +00:00
Zack Weinberg 8741a5314b opcodes:
* arm-opc.h: Delete; fold contents into ...
	* arm-dis.c: ... here.  Move includes of internal COFF headers
	next to includes of internal ELF headers.
	(streq, WORD_ADDRESS, BDISP, BDISP23): Delete, unused.
	(struct arm_opcode): Rename struct opcode32.  Make 'assembler' const.
	(struct thumb_opcode): Rename struct opcode16.  Make 'assembler' const.
	(arm_conditional, arm_fp_const, arm_shift, arm_regname, regnames)
	(iwmmxt_wwnames, iwmmxt_wwssnames):
	Make const.
	(regnames): Remove iWMMXt coprocessor register sets.
	(iwmmxt_regnames, iwmmxt_cregnames): New statics.
	(get_arm_regnames): Adjust fourth argument to match above changes.
	(set_iwmmxt_regnames): Delete.
	(print_insn_arm): Constify 'c'.  Use ISO syntax for function
	pointer calls.  Expand sole use of BDISP.  Use iwmmxt_regnames
	and iwmmxt_cregnames, not set_iwmmxt_regnames.
	(print_insn_thumb16, print_insn_thumb32): Constify 'c'.  Use
	ISO syntax for function pointer calls.
include:
	* dis-asm.h (get_arm_regnames): Update prototype.
2005-06-08 17:27:41 +00:00
Aldy Hernandez 30798c5a11 * common.h (EM_MS1): Define.
* ms1.h: New file.
2005-06-07 21:10:08 +00:00
Aldy Hernandez 0bc056e526 * dis-asm.h: Externalize print_insn_ms1. 2005-06-07 21:08:36 +00:00
DJ Delorie 0b1ecddf68 merge from gcc 2005-06-06 22:13:35 +00:00
Alan Modra d9f491a77d include/
* bfdlink.h (struct bfd_link_callbacks): Add einfo.
bfd/
	* configure.in: Bump version
	* configure: Regenerate.
	* elflink.c (elf_link_input_bfd): Use einfo linker callback to print
	discarded section sym refs and kill linker output.
	* simple.c (simple_dummy_einfo): New function.
	(bfd_simple_get_relocated_section_contents): Init callbacks.einfo.
ld/
	* ldmain.c (link_callbacks): Add einfo.
	(add_archive_element): Use passed info, not link_info.
	(constructor_callback): Likewise.
	(reloc_overflow): Don't handle null bfd specially.
	(reloc_dangerous, unattached_reloc): Likewise.
	* ldmisc.c (vfinfo <B>): Print "ld generated" for null bfd.
	(vfinfo <C, D, G>): Handle null bfd.  Wrap comments.
2005-06-03 09:52:47 +00:00
DJ Delorie f09c53c96c merge from gcc 2005-06-02 03:05:03 +00:00
Richard Henderson 302cb8165e * alpha.h (LITUSE_ALPHA_JSRDIRECT): New. 2005-05-31 22:52:31 +00:00
DJ Delorie b66f95cc73 merge from gcc 2005-05-30 01:12:16 +00:00
Richard Henderson 560c28560c * alpha.h (DT_ALPHA_PLTRO): New. 2005-05-29 23:18:26 +00:00
DJ Delorie 50cc47a3a5 merge from gcc 2005-05-28 19:49:21 +00:00
Richard Henderson dce76d2b39 include/
* demangle.h (DEMANGLE_COMPONENT_HIDDEN_ALIAS): New.
libiberty/
	* cp-demangle.c (d_dump): Handle DEMANGLE_COMPONENT_HIDDEN_ALIAS.
	(d_make_comp, d_print_comp): Likewise.
	(d_special_name): Generate one.
	* testsuite/demangle-expected: Add a hidden alias test.
2005-05-25 23:32:35 +00:00
DJ Delorie 53726a558d merge from gcc 2005-05-24 21:00:54 +00:00
John David Anglin bffa834f8e * hppa.h (FLAG_STRICT): Correct comment.
(pa_opcodes): Update load and store entries to allow both PA 1.X and
	PA 2.0 mneumonics when equivalent.  Entries with cache control
	completers now require PA 1.1.  Adjust whitespace.
2005-05-23 16:26:43 +00:00
Alan Modra 4390dc9df5 * ppc.h (PPC_OPCODE_POWER5): Define. 2005-05-19 06:59:36 +00:00
Ben Elliston 0a99fce172 binutils/ChangeLog
* readelf.c (read_and_display_attr_value): Handle a DW_AT_encoding
	value of DW_ATE_GNU_decimal_float.

include/elf/ChangeLog
	* dwarf2.h (enum dwarf_type): Assign DW_ATE_GNU_decimal_float from
	the user-defined encoding space pending inclusion in the standard.
2005-05-18 22:42:09 +00:00
Zack Weinberg d621341de7 * bfd/elf32-arm.c: Make all #ifndef OLD_ARM_ABI blocks
unconditional.
	* include/elf/arm.h: Make all #ifndef OLD_ARM_ABI blocks
	unconditional, delete all #ifdef OLD_ARM_ABI blocks.
2005-05-18 16:48:15 +00:00
Zack Weinberg f2b664e0dd include/elf:
* arm.h: Import complete list of official relocation names
	and numbers from AAELF.  Define FAKE_RELOCs for old names.
	Remove a few old names no longer used anywhere.

bfd:
	* elf32-arm.c: Wherever possible, use official reloc names
	from AAELF.
	(elf32_arm_howto_table, elf32_arm_tls_gd32_howto)
	(elf32_arm_tls_ldo32_howto, elf32_arm_tls_ldm32_howto)
	(elf32_arm_tls_le32_howto, elf32_arm_tls_ie32_howto)
	(elf32_arm_vtinherit_howto, elf32_arm_vtentry_howto)
	(elf32_arm_pc11_howto, elf32_arm_thm_pc9_howto, elf32_arm_got_prel)
	(elf32_arm_r_howto): Replace with elf32_arm_howto_table_1,
	elf32_arm_howto_table_2, and elf32_arm_howto_table_3.
	Add many new relocations from AAELF.
	(elf32_arm_howto_from_type): Update to match.
	(elf32_arm_reloc_map): Add entries for R_ARM_THM_JUMP24,
	R_ARM_THM_JUMP11, R_ARM_THM_JUMP19, R_ARM_THM_JUMP8,
	R_ARM_THM_JUMP6, R_ARM_GNU_VTINHERIT, and R_ARM_GNU_VTENTRY.
	(elf32_arm_reloc_type_lookup): Use elf32_arm_howto_from_type.
	(elf32_arm_final_link_relocate): Add support for
	R_ARM_THM_JUMP24, R_ARM_THM_JUMP19, R_ARM_THM_JUMP6.  Remove
	case entries redundant with default.

	* reloc.c: Reorganize ARM relocations.  Add Thumb
	assembler-internal relocations BFD_RELOC_ARM_T32_OFFSET_U8,
	BFD_RELOC_ARM_T32_OFFSET_IMM, BFD_RELOC_ARM_T32_IMMEDIATE.
	Add visible relocations BFD_RELOC_THUMB_PCREL_BRANCH7,
	BFD_RELOC_THUMB_BRANCH20, BFD_RELOC_THUMB_BRANCH25.
	Delete unused relocations BFD_RELOC_ARM_GOT12, BFD_RELOC_ARM_COPY.
	* bfd-in2.h, libbfd.h: Regenerate.

opcodes:
	* arm-dis.c (thumb_opcodes): Add disassembly for V6T2 16-bit
	instructions.  Adjust disassembly of some opcodes to match
	unified syntax.
	(thumb32_opcodes): New table.
	(print_insn_thumb): Rename print_insn_thumb16; don't handle
	two-halfword branches here.
	(print_insn_thumb32): New function.
	(print_insn): Choose among print_insn_arm, print_insn_thumb16,
	and print_insn_thumb32.  Be consistent about order of
	halfwords when printing 32-bit instructions.

gas:
	* hash.c (hash_lookup): Add len parameter.  All callers changed.
	(hash_find_n): New interface.
	* hash.h: Prototype hash_find_n.
	* sb.c: Include as.h.
	(scrub_from_sb, sb_to_scrub, scrub_position): New statics.
	(sb_scrub_and_add_sb): New interface.
	* sb.h: Prototype sb_scrub_and_add_sb.
	* input-scrub.c (input_scrub_include_sb): Use sb_scrub_and_add_sb.

	* config/tc-arm.h (TC_FORCE_RELOCATION_LOCAL): Remove
	reference to BFD_RELOC_ARM_GOT12 which is never generated.
	* config/tc-arm.c: Rewrite, adding Thumb-2 support.

gas/testsuite:
	* gas/arm/arm.exp: Convert all existing "gas_test" tests to
	"run_dump_test" tests.  Run more tests unconditionally.  Run new tests.
	* gas/arm/arch4t.s, gas/arm/arch6zk.s, gas/arm/arm3.s, gas/arm/arm6.s
	* gas/arm/arm7dm.s, gas/arm/bignum1.s, gas/arm/float.s
	* gas/arm/immed.s, gas/arm/iwmmxt.s, gas/arm/offset.s, gas/arm/thumb.s:
	Adjust to work as a dump test.
	* gas/arm/arch4t.d, gas/arm/arch6zk.d, gas/arm/arm3.d, gas/arm/arm6.d
	* gas/arm/arm7dm.d, gas/arm/bignum1.d, gas/arm/float.d
	* gas/arm/immed.d, gas/arm/iwmmxt.d, gas/arm/offset.d, gas/arm/thumb.d:
	New files.

	* gas/arm/armv1-bad.l, gas/arm/armv1-bad.s: Remove tests for
	diagnostics that don't happen in the first pass anymore.

	* gas/arm/iwmmxt-bad.l, gas/arm/r15-bad.l, gas/arm/req.l
	* gas/arm/vfp-bad.l:
	Update expected diagnostics.
	* gas/arm/pic.d: Update expected reloc name.
	* gas/arm/thumbv6.d: CPY no longer appears in disassembly.
	* gas/arm/r15-bad.s: Avoid two-argument mul.
	* gas/arm/req.s: Adjust comments.
	* gas/arm/maverick.d, gas/arm/maverick.s: Avoid inappropriate
	use of PC.

	* gas/arm/macro-1.d, gas/arm/macro1.s
	* gas/arm/t16-bad.l, gas/arm/t16-bad.s
	* gas/arm/tcompat.d, gas/arm/tcompat.s
	* gas/arm/tcompat2.d, gas/arm/tcompat2.s
	* gas/arm/thumb32.d, gas/arm/thumb32.s
	New test pair.

ld/testsuite:
	* ld-arm/mixed-app.d: Adjust expected disassembly a little.
2005-05-18 05:40:10 +00:00
Alan Modra 6dd9ec6c58 include/elf/
* ppc.h (DT_PPC_GOT): Rename from DT_PPC_GLINK.
bfd/
	* elf32-ppc.c (ppc_elf_size_dynamic_sections): Set DT_PPC_GOT,
	not DT_PPC_GLINK.
	(ppc_elf_finish_dynamic_sections): Likewise.
binutils/
	* readelf.c (get_ppc_dynamic_type): Display DT_PPC_GOT, not
	DT_PPC_GLINK.
2005-05-14 05:07:15 +00:00
DJ Delorie 58fc7cdaf9 merge from gcc 2005-05-12 20:00:35 +00:00
Alan Modra 98c2367bf4 * ppc.h (R_PPC_RELAX32, R_PPC_RELAX32PC, R_PPC_RELAX32_PLT,
R_PPC_RELAX32PC_PLT) Adjust.
	(R_PPC_REL16, R_PPC_REL16_LO, R_PPC_REL16_HI, R_PPC_REL16_HA): Define.
	(DT_PPC_GLINK): Define.
2005-05-11 14:08:45 +00:00
Nick Clifton d699bc988f Update the address and phone number of the FSF organization 2005-05-10 10:21:13 +00:00
Jan Beulich b6487cdedb gas/
2005-05-09  Jan Beulich  <jbeulich@novell.com>

	* config/tc-i386.c (parse_insn): Disallow use of prefix separator
	and comma in Intel mode.

include/opcode/
2005-05-09  Jan Beulich  <jbeulich@novell.com>

	* i386.h (i386_optab): Add ht and hnt.
2005-05-09 06:49:01 +00:00
DJ Delorie 88f6628ca8 merge from gcc 2005-04-26 01:01:49 +00:00
DJ Delorie 5484689472 merge from gcc 2005-04-19 19:09:30 +00:00
Mark Kettenis 3b4ed14c7c gas/ChangeLog:
* config/tc-i386.c (md_begin): Allow hyphens in mnemonics.
include/opcode/ChangeLog:
* i386.h: Insert hyphens into selected VIA PadLock extensions.
Add xcrypt-ctr.  Provide aliases without hyphens.
opcodes/ChangeLog:
* i386-dis.c: Insert hyphens into selected VIA PadLock extensions.
Add xcrypt-ctr.
2005-04-18 20:59:19 +00:00
DJ Delorie 73b4949a87 merge from gcc 2005-04-16 21:49:07 +00:00
DJ Delorie b04e9ddc97 merge from gcc 2005-04-14 02:22:07 +00:00
H.J. Lu 7212bdd8fb Move entries in ChangeLog-9103 to appropriate */ChangeLog-9103. 2005-04-13 17:33:48 +00:00
H.J. Lu 4902c5bdca Move entries to appropriate ChangeLog files. 2005-04-13 16:53:25 +00:00
Paul Brook 9bbf01c6b5 2005-04-12 Paul Brook <paul@codesourcery.com>
* opcode/m88k.h: Rename psr macros to avoid conflicts.
2005-04-12 19:35:53 +00:00
Mark Kettenis 48c2393632 include/opcode/ChangeLog:
* i386.h (i386_optab): Mark VIA PadLock instructions as ImmExt and
adjust them accordingly.
gas/ChangeLog:
* config/tc-i386.c (output_insn): Handle VIA PadLock instructions
similar to other instructions now that they're marked as ImmExt.
2005-04-12 17:12:30 +00:00
DJ Delorie 7cc9282c4e merge from gcc 2005-04-11 19:31:50 +00:00
Andreas Schwab 33ef35c8ad Fix typo. 2005-04-04 16:06:26 +00:00
Jan Beulich 46390451a4 include/opcode/
2005-04-01  Jan Beulich  <jbeulich@novell.com>

	* i386.h (i386_optab): Add rdtscp.

opcodes/
2005-04-01  Jan Beulich  <jbeulich@novell.com>

	* i386-dis.c (INVLPG_Fixup): Decode rdtscp; change code to allow for
	easier future additions.
2005-04-01 16:03:39 +00:00
DJ Delorie 2e1cd25574 merge from gcc 2005-03-29 19:32:15 +00:00
H.J. Lu ed874f87e0 gas/testsuite/
2005-03-29  H.J. Lu  <hongjiu.lu@intel.com>

	* gas/i386/i386.exp: Run segment and inval-seg for i386. Run
	x86-64-segment and x86-64-inval-seg for x86-64.

	* gas/i386/intel.d: Expect movw for moving between memory and
	segment register.
	* gas/i386/naked.d: Likewise.
	* gas/i386/opcode.d: Likewise.
	* gas/i386/x86-64-opcode.d: Likewise.

	* gas/i386/opcode.s: Use movw for moving between memory and
	segment register.
	* gas/i386/x86-64-opcode.s: Likewise.

	* : Likewise.

	* gas/i386/inval-seg.l: New.
	* gas/i386/inval-seg.s: New.
	* gas/i386/segment.l: New.
	* gas/i386/segment.s: New.
	* gas/i386/x86-64-inval-seg.l: New.
	* gas/i386/x86-64-inval-seg.s: New.
	* gas/i386/x86-64-segment.l: New.
	* gas/i386/x86-64-segment.s: New.

include/opcode/

2005-03-29  H.J. Lu  <hongjiu.lu@intel.com>

	* i386.h (i386_optab): Don't allow the `l' suffix for moving
	moving between memory and segment register. Allow movq for
	moving between general-purpose register and segment register.

opcodes/

2005-03-29  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-dis.c (SEG_Fixup): New.
	(Sv): New.
	(dis386): Use "Sv" for 0x8c and 0x8e.
2005-03-29 19:30:46 +00:00
Daniel Jacobowitz 72a90d496d bfd/
* bfd-in2.h, libbfd.h: Regenerated.
	* reloc.c: Add ARM TLS relocations.
	* elf32-arm.c (elf32_arm_howto_table): Add dynamic TLS
	relocations.
	(elf32_arm_tls_gd32_howto, elf32_arm_tls_ldo32_howto)
	(elf32_arm_tls_ldm32_howto, elf32_arm_tls_le32_howto)
	(elf32_arm_tls_ie32_howto): New.
	(elf32_arm_howto_from_type): Support TLS relocations.
	(elf32_arm_reloc_map): Likewise.
	(elf32_arm_reloc_type_lookup): Likewise.
	(TCB_SIZE): Define.
	(struct elf32_arm_obj_tdata): New.
	(elf32_arm_tdata, elf32_arm_local_got_tls_type): Define.
	(elf32_arm_mkobject): New function.
	(struct elf32_arm_relocs_copied): Add pc_count.
	(elf32_arm_hash_entry, GOT_UNKNOWN, GOT_NORMAL, GOT_TLS_GD)
	(GOT_TLS_IE): Define.
	(struct elf32_arm_link_hash_table): Add tls_ldm_got.
	(elf32_arm_link_hash_newfunc): Initialize tls_type.
	(elf32_arm_copy_indirect_symbol): Copy pc_count and tls_type.
	(elf32_arm_link_hash_table_create): Initialize tls_ldm_got.
	(dtpoff_base, tpoff): New functions.
	(elf32_arm_final_link_relocate): Handle TLS relocations.
	(IS_ARM_TLS_RELOC): Define.
	(elf32_arm_relocate_section): Warn about TLS mismatches.
	(elf32_arm_gc_sweep_hook): Handle TLS relocations and pc_count.
	(elf32_arm_check_relocs): Detect invalid symbol indexes.  Handle
	TLS relocations and pc_count.
	(elf32_arm_adjust_dynamic_symbol): Check non_got_ref.
	(allocate_dynrelocs): Handle TLS.  Bind REL32 relocs to local
	calls.
	(elf32_arm_size_dynamic_sections): Handle TLS.
	(elf32_arm_finish_dynamic_symbol): Likewise.
	(bfd_elf32_mkobject): Define.
gas/
	* config/tc-arm.c (arm_parse_reloc): Add TLS relocations.
	(md_apply_fix3): Mark TLS symbols.
	(tc_gen_reloc): Handle TLS relocations.
	(arm_fix_adjustable): Ignore TLS relocations.
	(s_arm_elf_cons): Support expressions after decorated symbols.
gas/testuite/
	* gas/arm/tls.s, gas/arm/tls.d: New files.
	* gas/arm/arm.exp: Run TLS test.
include/elf/
	* arm.h: Add TLS relocations.
ld/testsuite/
	* ld-arm/tls-lib.s, ld-arm/tls-lib.d, ld-arm/tls-lib.r,
	ld-arm/tls-app.s, ld-arm/tls-app.d, ld-arm/tls-app.r: New files.
	* ld-arm/arm-lib.ld, ld-arm/arm-dyn.ld: Increase data segment
	alignment.
	* ld-arm/arm-elf.exp: Run TLS tests.
2005-03-29 16:54:22 +00:00
Ian Lance Taylor a9b33f4de6 libiberty:
* pex-common.c: New file.
	* pex-one.c: New file.
	* pexecute.c: New file.
	* pex-common.h: Include <stdio.h>.
	(struct pex_obj): Define.
	(struct pex_funcs): Define.
	(pex_init_common): Declare.
	* pex-unix.c: Rewrite.
	* pex-win32.c: Rewrite.
	* pex-djgpp.c: Rewrite.
	* pex-msdos.c: Rewrite.
	* testsuite/text-pexecute.c: New file.
	* pexecute.txh: Rewrite.
	* configure.ac: Check for wait3 and wait4.  Set CHECK to
	really-check rather than check-cplus-dem.
	* functions.texi: Rebuild.
	* Makefile.in: Rebuild dependencies.
	(CFILES): Add pexecute.c, pex-common.c, pex-one.c.
	(REQUIRED_OFILES): Add pexecute.o, pex-common.o, pex-one.o.
	* testsuite/Makefile.in (really-check): New target.
	(check-pexecute, test-pexecute): New targets.
	* configure: Rebuild.
include:
	* libiberty.h: Include <stdio.h>.
	(PEX_RECORD_TIMES, PEX_USE_PIPES, PEX_SAVE_TEMPS): Define.
	(PEX_LAST, PEX_SEARCH, PEX_SUFFIX, PEX_STDERR_TO_STDOUT): Define.
	(PEX_BINARY_INPUT, PEX_BINARY_OUTPUT): Define.
	(pex_init, pex_run, pex_read_output): Declare.
	(pex_get_status, pex_get_times, pex_free, pex_one): Declare.
	(struct pex_time): Define.
2005-03-29 02:15:24 +00:00
Mark Mitchell ae6cf546a7 * libiberty.h (ffs): Declare, if necessary. 2005-03-29 01:12:11 +00:00
DJ Delorie c0add211e4 merge from gcc 2005-03-28 17:14:24 +00:00
DJ Delorie eda51d1610 merge from gcc 2005-03-28 05:07:01 +00:00
DJ Delorie 25c47304a3 merge from gcc 2005-03-28 02:08:50 +00:00
DJ Delorie c4a2d2f3e1 merge from gcc 2005-03-27 05:28:29 +00:00
DJ Delorie 2c18521373 merge from gcc 2005-03-25 04:57:00 +00:00
Nick Clifton 45f063e743 Undo previous delta 2005-03-23 14:49:45 +00:00
Nick Clifton 7e71a4c1a0 (getopt): Allow full prototype when builind under FreeBSD. 2005-03-23 14:46:13 +00:00
DJ Delorie 8f4897bceb merge from gcc 2005-03-23 00:01:17 +00:00
Ben Elliston eb35705027 * dwarf.h: Merge with GCC's dwarf.h. 2005-03-22 19:51:31 +00:00
Bob Wilson a964fc7db1 include ChangeLog
* xtensa-isa.h: Update a comment and whitespace.
bfd ChangeLog
	* xtensa-isa.c (xtensa_opcode_lookup, xtensa_state_lookup,
	xtensa_sysreg_lookup_name, xtensa_interface_lookup,
	xtensa_funcUnit_lookup): Skip bsearch call if count is zero.
	(xtensa_opcode_decode): Rearrange code.
2005-03-22 19:31:26 +00:00
Nick Clifton bb8dc8c4cb Add support for generating PLT lookups for the ColdFire. 2005-03-18 17:20:23 +00:00
Mark Mitchell dc96344161 * elf32-arm.c (elf32_arm_modify_segment_map): New function.
(elf32_arm_additional_program_headers): Likewise.
	(elf_backend_modify_segment_map): Define.
	(elf_backend_additional_program_headers): Likewise.
	(elf32_arm_symbian_modify_segment_map): Use
	elf32_arm_modify_segment_map.

	* binutils/readelf.c (get_arm_segment_type): New function.
	(get_segment_type): Use it.

	* arm.h (PT_ARM_EXIDX): Define.
2005-03-18 17:06:16 +00:00
H.J. Lu 9ff29211af bfd/
2005-03-16  H.J. Lu  <hongjiu.lu@intel.com>

	* elflink.c (elf_mark_used_section): New.
	(bfd_elf_gc_sections): Call elf_gc_mark_section for
	non-relocatable link if we don't do GC.

include/

2005-03-16  H.J. Lu  <hongjiu.lu@intel.com>

	* bfdlink.h (bfd_link_info): Add gc_sections.

ld/

2005-03-16  H.J. Lu  <hongjiu.lu@intel.com>

	* emultempl/elf32.em (gld${EMULATION_NAME}_finish): Remove
	unused empty output sections for non-relocatable link.

	* ld.h (args_type): Remove gc_sections.

	* ldlang.c (lang_mark_used_section): New.
	(lang_gc_sections): Use link_info.gc_sections instead of
	command_line.gc_sections.
	* ldmain.c (main): Likewise.
	* lexsup.c (parse_args): Likewise.
	* ldlang.c (lang_process): Call lang_mark_used_section.

	* ldmain.c (main): Initialize link_info.gc_sections to FALSE.

ld/testsuite/

2005-03-16  H.J. Lu  <hongjiu.lu@intel.com>

	* ld-alpha/tlsbin.rd: Updated for empty section removal.
	* ld-alpha/tlsbinr.rd: Likewise.
	* ld-alpha/tlspic.rd: Likewise.
	* ld-arm/mixed-lib.sym: Likewise.
	* ld-i386/tlsbin.rd: Likewise.
	* ld-i386/tlsnopic.rd: Likewise.
	* ld-i386/tlspic.rd: Likewise.
	* ld-ia64/tlsbin.rd: Likewise.
	* ld-ia64/tlspic.rd: Likewise.
	* ld-powerpc/apuinfo.rd: Likewise.
	* ld-powerpc/powerpc.exp: Likewise.
	* ld-powerpc/tlsexe32.r: Likewise.
	* ld-s390/tlsbin.rd: Likewise.
	* ld-s390/tlsbin_64.rd: Likewise.
	* ld-s390/tlspic.rd: Likewise.
	* ld-s390/tlspic_64.rd: Likewise.
	* ld-sh/tlsbin-2.d: Likewise.
	* ld-sh/tlspic-2.d: Likewise.
	* ld-sparc/tlssunbin32.rd: Likewise.
	* ld-sparc/tlssunnopic32.rd: Likewise.
	* ld-sparc/tlssunpic32.rd: Likewise.
	* ld-x86-64/tlsbin.rd: Likewise.
	* ld-x86-64/tlspic.rd: Likewise.
2005-03-16 21:52:41 +00:00
Zack Weinberg be4edc9b08 include:
* opcode/arm.h: Adjust comments for ARM_EXT_V4T and ARM_EXT_V5T.
	Add ARM_EXT_V6T2, ARM_ARCH_V6T2, ARM_ARCH_V6KT2, ARM_ARCH_V6ZT2,
	and ARM_ARCH_V6ZKT2.
opcodes:
	* arm-dis.c (arm_opcodes): Document %E and %V.
	Add entries for v6T2 ARM instructions:
	bfc bfi mls strht ldrht ldrsht ldrsbt movw movt rbit ubfx sbfx.
	(print_insn_arm): Add support for %E and %V.
2005-03-12 18:14:05 +00:00
DJ Delorie 2e5fb2d9fa merge from gcc 2005-03-10 01:05:51 +00:00
Alan Modra 3aeffaadc7 update copyright dates 2005-03-03 11:58:10 +00:00
Daniel Jacobowitz 6b55d9fa5e * mips.h: Define MIPS TLS relocations. 2005-03-02 21:21:50 +00:00
DJ Delorie 45b5f172a9 merge from gcc 2005-03-01 14:32:34 +00:00
Alan Modra f46ddb818a include/
* xtensa-isa-internal.h (xtensa_length_decode_fn): Warning fix.
	* xtensa-isa.h (xtensa_insnbuf_to_chars): Likewise.
	(xtensa_insnbuf_from_chars, xtensa_isa_length_from_chars): Likewise.
include/coff/
	* xcoff.h (struct xcoff_loader_info): Warning fix.
bfd/
	* bfd-in.h (bfd_elf_bfd_from_remote_memory): Warning fix.
	* coff-m68k.c (bfd_m68k_coff_create_embedded_relocs): Likewise.
	* coff-rs6000.c (xcoff_write_armap_big): Warning fixes.  Remove
	useless assignments.
	(xcoff_write_archive_contents_big): Likewise.
	(_bfd_xcoff_put_ldsymbol_name): Likewise.
	* coff64-rs6000.c (_bfd_xcoff64_put_ldsymbol_name): Likewise.
	* coffgen.c (coff_write_symbols): Make "written" a bfd_vma.
	* cofflink.c (process_embedded_commands): Warning fixes.
	* cpu-arm.c: Delete unnecessary prototypes.  Convert to C90.
	Warning fixes.
	* dwarf2.c: Warning fixes.
	* elf-bfd.h: Likewise.
	* elf-eh-frame.c: Likewise.
	* elf-strtab.c: Likewise.
	* elf.c: Likewise.
	* elf32-m68k.c: Likewise.
	* elf32-ppc.c: Likewise.
	* elf32-sh-symbian.c: Likewise.
	* elf32-sh.c: Delete unnecessary prototypes.  Warning fixes.
	* elf64-sh64.c: Likewise.
	* peicode.h: Likewise.
	* elf64-mmix.c: Warning fixes.
	* elfcode.h: Likewise.
	* elfxx-mips.c: Likewise.
	* libbfd-in.h: Likewise.
	* libbfd.c: Likewise.
	* mach-o.c: Likewise.
	* merge.c: Likewise.
	* mmo.c: Likewise.
	* opncls.c: Likewise.
	* pef.c: Likewise.
	* srec.c: Likewise.
	* vms-hdr.c: Likewise.
	* vms-tir.c: Likewise.
	* xtensa-isa.c: Likewise.
	* xtensa-modules.c: Likewise.
	* xsym.c: Likewise.
	(pstrcmp): Use correct choice of string lengths.  Fix return value.
	(bfd_sym_module_name): Correct string length.
	* bfd-in2.h: Regenerate.
	* libbfd.h: Regenerate.
2005-02-20 14:59:05 +00:00
Maciej W. Rozycki 90d5a18f39 bfd/:
2005-02-15  Nigel Stephens  <nigel@mips.com>
            Maciej W. Rozycki  <macro@mips.com>

	* elf32-mips.c (elf_mips16_howto_table_rel): New array for MIPS16
	reloc howtos.  Add R_MIPS16_HI16 and R_MIPS16_LO16 relocs and
	R_MIPS16_GOT16 and R_MIPS16_CALL16 placeholders.
	(elf_mips16_jump_howto): Move into elf_mips16_howto_table_rel.
	(elf_mips16_gprel_howto): Likewise.  Redefine src_mask and
	dst_mask.
	(mips16_gprel_reloc): Remove bit shuffling; call
	_bfd_mips16_elf_reloc_unshuffle(), _bfd_mips_elf_gprel16_with_gp()
	and _bfd_mips16_elf_reloc_shuffle() instead.
	(mips16_reloc_map): New reloc map for MIPS16 relocs.
	(bfd_elf32_bfd_reloc_type_lookup): Use mips16_reloc_map for MIPS16
	relocs.
	(mips_elf32_rtype_to_howto): Fetch MIPS16 howtos from
	elf_mips16_howto_table_rel.
	* elf64-mips.c (mips16_elf64_howto_table_rel): New array for
	MIPS16 REL reloc howtos.  Add R_MIPS16_HI16 and R_MIPS16_LO16
	relocs and R_MIPS16_GOT16 and R_MIPS16_CALL16 placeholders.
	(elf_mips16_jump_howto): Move into mips16_elf64_howto_table_rel.
	(elf_mips16_gprel_howto): Likewise.  Redefine src_mask and
	dst_mask.
	(mips16_elf64_howto_table_rela): New array for MIPS16 RELA
	reloc howtos.  Add R_MIPS16_26, R_MIPS16_GPREL, R_MIPS16_HI16 and
	R_MIPS16_LO16 relocs and R_MIPS16_GOT16 and R_MIPS16_CALL16
	placeholders.
	(mips16_gprel_reloc): Remove bit shuffling; call
	_bfd_mips16_elf_reloc_unshuffle(), _bfd_mips_elf_gprel16_with_gp()
	and _bfd_mips16_elf_reloc_shuffle() instead.
	(mips16_reloc_map): New reloc map for MIPS16 relocs.
	(bfd_elf64_bfd_reloc_type_lookup): Use mips16_reloc_map for MIPS16
	relocs.
	(mips_elf64_rtype_to_howto): Fetch MIPS16 howtos from
	mips16_elf64_howto_table_rela or mips16_elf64_howto_table_rel.
	* elfn32-mips.c (elf_mips16_howto_table_rel): New array for MIPS16
	REL reloc howtos.  Add R_MIPS16_HI16 and R_MIPS16_LO16 relocs and
	R_MIPS16_GOT16 and R_MIPS16_CALL16 placeholders.
	(elf_mips16_jump_howto): Move into elf_mips16_howto_table_rel.
	(elf_mips16_gprel_howto): Likewise.  Redefine src_mask and
	dst_mask.
	(mips16_gprel_reloc): Remove bit shuffling; call
	_bfd_mips16_elf_reloc_unshuffle(), _bfd_mips_elf_gprel16_with_gp()
	and _bfd_mips16_elf_reloc_shuffle() instead.
	(mips16_reloc_map): New reloc map for MIPS16 relocs.
	(bfd_elf32_bfd_reloc_type_lookup): Use mips16_reloc_map for MIPS16
	relocs.
	(mips_elf_n32_rtype_to_howto): Fetch MIPS16 howtos from
	elf_mips16_howto_table_rela or elf_mips16_howto_table_rel.
	* elfxx-mips.c (_bfd_mips16_elf_reloc_unshuffle): New function to
	handle bit shuffling for MIPS16 relocs.
	(_bfd_mips16_elf_reloc_shuffle): Likewise.
	(_bfd_mips_elf_lo16_reloc): Use _bfd_mips16_elf_reloc_unshuffle()
	and _bfd_mips16_elf_reloc_shuffle().
	(_bfd_mips_elf_generic_reloc): Likewise.
	(mips_elf_calculate_relocation): Likewise.  Handle R_MIPS16_HI16
	and R_MIPS16_LO16.
	(mips_elf_obtain_contents): Remove bit shuffling.
	(mips_elf_perform_relocation): Likewise; call
	_bfd_mips16_elf_reloc_unshuffle() and _bfd_mips16_elf_reloc_shuffle()
	instead.
	(_bfd_mips_elf_relocate_section): Likewise.  Handle R_MIPS16_HI16
	and R_MIPS16_LO16.
	* elfxx-mips.h (_bfd_mips16_elf_reloc_unshuffle): Declare.
	(_bfd_mips16_elf_reloc_shuffle): Likewise.
	* reloc.c (BFD_RELOC_MIPS16_HI16): New reloc.
	(BFD_RELOC_MIPS16_HI16_S): Likewise.
	(BFD_RELOC_MIPS16_LO16): Likewise.
	* bfd-in2.h: Regenerate.
	* libbfd.h: Regenerate.

gas/:
2005-02-15  Nigel Stephens  <nigel@mips.com>
            Maciej W. Rozycki  <macro@mips.com>

	* config/tc-mips.c (reloc_needs_lo_p): Handle
	BFD_RELOC_MIPS16_HI16_S.
	(fixup_has_matching_lo_p): Handle BFD_RELOC_MIPS16_LO16.
	(append_insn): Add BFD_RELOC_MIPS16_GPREL, BFD_RELOC_MIPS16_HI16_S
	and BFD_RELOC_MIPS16_LO16 to relocs to suppress overflow
	complaints on.
	(mips16_ip): Resolve BFD_RELOC_MIPS16_HI16_S,
	BFD_RELOC_MIPS16_HI16 and BFD_RELOC_MIPS16_LO16 for constants.
	Call my_getSmallExpression() to parse percent operators.
	(percent_op_match, mips_percent_op): Separate definitions.
	(mips16_percent_op): Define percent operators for the MIPS16 mode.
	(parse_relocation): Handle the MIPS16 mode using
	mips16_percent_op.
	(md_apply_fix3): Handle BFD_RELOC_MIPS16_HI16,
	BFD_RELOC_MIPS16_HI16_S and BFD_RELOC_MIPS16_LO16.

gas/testsuite/:
2005-02-15  Nigel Stephens  <nigel@mips.com>
            Maciej W. Rozycki  <macro@mips.com>

	* gas/mips/mips16-hilo.d: New test for the R_MIPS16_HI16 and
	R_MIPS16_LO16 relocs.
	* gas/mips/mips16-hilo-n32.d: Likewise, for the n32 ABI.
	* gas/mips/mips16-hilo.s: Source for the new tests.
	* gas/mips/mips.exp: Run the new tests.

include/:
2005-02-15  Nigel Stephens  <nigel@mips.com>
            Maciej W. Rozycki  <macro@mips.com>

	* elf/mips.h (R_MIPS16_GOT16): New reloc code.
	(R_MIPS16_CALL16): Likewise.
	(R_MIPS16_HI16): Likewise.
	(R_MIPS16_LO16): Likewise.
	(R_MIPS16_min): New fake reloc code.
	(R_MIPS16_max): Likewise.

ld/testsuite/:
2005-02-15  Nigel Stephens  <nigel@mips.com>
            Maciej W. Rozycki  <macro@mips.com>

	* ld-mips-elf/mips16-hilo.d: New test for the R_MIPS16_HI16 and
	R_MIPS16_LO16 relocs.
	* ld-mips-elf/mips16-hilo-n32.d: Likewise, for the n32 ABI.
	* ld-mips-elf/mips16-hilo.s: Auxiliary source for the new tests.
	* ld-mips-elf/mips-elf.exp: Run the new tests.
2005-02-15 19:57:53 +00:00
DJ Delorie dc1d3ff6a0 merge from gcc 2005-02-14 12:10:25 +00:00
Maciej W. Rozycki 6ed61878bc * mips.h (R_MIPS_max): Use FAKE_RELOC to define. 2005-02-11 20:29:29 +00:00
Jan Beulich b51b23bf82 gas/testsuite/
2005-02-09  Jan Beulich  <jbeulich@novell.com>

	* gas/i386/intelok.s: Remove comments disabling alternative forms of
	fbld, fbstp, and fldcw.
	* gas/i386/intelok.d: Expect two instances of fbld, fbstp, and fldcw.

include/opcode/
2005-02-09  Jan Beulich  <jbeulich@novell.com>

	PR gas/707
	* i386.h (i386_optab): Add x_Suf to fbld and fbstp. Add w_Suf and
	FloatMF to fldcw, fstcw, fnstcw, and the memory formas of fstsw and
	fnstsw.
2005-02-09 08:05:43 +00:00
Alan Modra 901b1fb985 include/
* bfdlink.h (struct bfd_link_hash_entry): Add u.undef.weak.
bfd/
	* linker.c (_bfd_generic_link_add_one_symbol): Set u.undef.weak.
	* elflink.c (elf_smash_syms): Restore symbols that were undefweak
	before the as-needed lib was loaded.  Abort on unexpected refs.
2005-02-03 03:30:38 +00:00
Alan Modra d8b84e4bc4 include/
* bfdlink.h (bfd_link_repair_undef_list): Declare.
bfd/
	* elf64-ppc.c (ppc64_elf_check_directives): Move undefs list fixup..
	* linker.c (bfd_link_repair_undef_list): ..to new function, but don't
	remove anything but new and undefweak.
	* elflink.c (_bfd_elf_link_create_dynamic_sections): Override any
	existing _DYNAMIC.
	(_bfd_elf_create_dynamic_sections): Formatting.
	(bfd_elf_record_link_assignment): Call bfd_link_repair_undef_list.
	(_bfd_elf_merge_symbol): Don't handle as-needed syms here.
	(struct elf_smash_data): New.
	(elf_smash_syms): New function.
	(elf_link_add_object_symbols): Call elf_smash_syms.  Don't add
	unneeded dynamic objects to loaded list.
	(elf_link_output_extsym): Don't handle as-needed here.  Strip
	bfd_link_hash_new symbols.
	* elf32-cris.c (elf_cris_discard_excess_program_dynamics): Don't
	delref when dynindx is already -1.
	* elf64-alpha.c (elf64_alpha_output_extsym): Strip bfd_link_hash_new
	symbols.
	* elfxx-mips.c (mips_elf_output_extsym): Likewise.
ld/
	* ld.texinfo: Clarify --as-needed operation.
2005-02-01 01:11:22 +00:00
Hans-Peter Nilsson 48d5b28742 * callback.h (struct host_callback_struct): New members pipe,
pipe_empty, pipe_nonempty, ispipe, pipe_buffer and
	target_sizeof_int.
	(CB_SYS_pipe): New macro.
2005-01-28 03:39:28 +00:00
Hans-Peter Nilsson 9e34a4010f * callback.h: Include "bfd.h".
(struct host_callback_struct): New member target_endian.
	(cb_store_target_endian): Declare.
2005-01-28 03:27:02 +00:00
Alexandre Oliva 5ba446e779 bfd/ChangeLog:
2004-12-10  Alexandre Oliva  <aoliva@redhat.com>
* elf32-frv.c (elf32_frv_relocate_section): Force local binding
for TLSMOFF.
* reloc.c: Add R_FRV_TLSMOFF.
* elf32-frv.c (elf32_frv_howto_table): Likewise.
(frv_reloc_map, frv_reloc_type_lookup): Map it.
(elf32_frv_relocate_section): Handle it.
(elf32_frv_check_relocs): Likewise.
* libbfd.h, bfd-in2.h: Rebuilt.
2004-11-26  Alexandre Oliva  <aoliva@redhat.com>
* elf32-frv.c (_frvfdpic_emit_got_relocs_plt_entries): Don't crash
when given an undefweak TLS symbol.  Fix constant TLS PLT entries
such that they return the constant in gr9.
(_frvfdpic_relax_tls_entries): Don't crash for undefweak TLS
symbols.
(_frvfdpic_size_got_plt): Set _cooked_size of dynamic sections.
too, such that they shrink on relaxation.
(elf32_frvfdpic_finish_dynamic_sections): Check __ROFIXUP_END__ as
marking the position right past the _GLOBAL_OFFSET_TABLE_ value.
(_frvfdpic_assign_plt_entries): Shrink constant TLS PLT entries
if we can guarantee the use of 16-bit constants.
2004-11-10  Alexandre Oliva  <aoliva@redhat.com>
Introduce TLS support for FR-V FDPIC.
* reloc.c: Add TLS relocations.
* elf32-frv.c (elf32_frv_howto_table): Add TLS relocations.
(elf32_frv_rel_tlsdesc_value_howto): New.
(elf32_frv_rel_tlsoff_howto): New.
(frv_reloc_map): Add new mappings.
(struct frvfdpic_elf_link_hash_table): Add pointer to summary
reloc information.
(frvfdpic_dynamic_got_plt_info): New.
(frvfdpic_plt_tls_ret_offset): New.
(ELF_DYNAMIC_INTERPRETER, DEFAULT_STACK_SIZE): Move earlier.
(struct _frvfdpic_dynamic_got_info): Likewise.  Add TLS members.
(struct _frvfdpic_dynamic_got_plt_info): Likewise.
(FRVFDPIC_SYM_LOCAL): Regard symbols defined in the absolute
section as local.
(struct frvfdpic_relocs_info): Add TLS fields.
(frvfdpic_relocs_info_hash): Warning clean up.
(frvfdpic_relocs_info_find): Initialize tlsplt_entry.
(frvfdpic_pic_merge_early_relocs_info): Merge TLS fields.
(FRVFDPIC_TLS_BIAS): Define.
(tls_biased_base): New.
(_frvfdpic_emit_got_relocs_plt_entries): Deal with TLS
relocations.
(frv_reloc_type_lookup): Likewise.
(frvfdpic_info_to_howto_rel): Likewise.
(elf32_frv_relocate_section): Likewise.
(_frv_create_got_section): Create the PLT section here.
(elf32_frvfdpic_create_dynamic_sections): Not here.
(_frvfdpic_count_nontls_entries): Move out of...
(_frvfdpic_count_got_plt_entries): ... here.
(_frvfdpic_count_tls_entries): Likewise.  Add TLS support.
(_frvfdpic_count_relocs_fixups): Likewise.  Add relaxation
support.
(_frvfdpic_relax_tls_entries): New.
(_frvfdpic_compute_got_alloc_data): Add TLS support.
(_frvfdpic_get_tlsdesc_entry): New.
(_frvfdpic_assign_got_entries): Add TLS support.
(_frvfdpic_assign_plt_entries): Likewise.
(_frvfdpic_reset_got_plt_entries): New.
(_frvfdpic_size_got_plt): Move out of...
(elf32_frvfdpic_size_dynamic_sections): ... here.
(_frvfdpic_relax_got_plt_entries): New.
(elf32_frvfdpic_relax_section): New.
(elf32_frvfdpic_finish_dynamic_sections): Add TLS sanity check.
(elf32_frv_check_relocs): Add TLS support.
(bfd_elf32_bfd_relax_section): Define for FDPIC.
* libbfd.h, bfd-in2.h: Rebuilt.
cpu/ChangeLog:
2004-11-10  Alexandre Oliva  <aoliva@redhat.com>
* frv.cpu: Add support for TLS annotations in loads and calll.
* frv.opc (parse_symbolic_address): New.
(parse_ldd_annotation): New.
(parse_call_annotation): New.
(parse_ld_annotation): New.
(parse_ulo16, parse_uslo16): Use parse_symbolic_address.
Introduce TLS relocations.
(parse_d12, parse_s12, parse_u12): Likewise.
(parse_uhi16): Likewise.  Fix constant checking on 64-bit host.
(parse_call_label, print_at): New.
gas/ChangeLog:
* config/tc-frv.c (md_apply_fix3): Mark TLS symbols as such.
2004-12-10  Alexandre Oliva  <aoliva@redhat.com>
* config/tc-frv.c (frv_pic_ptr): Add tlsmoff support.
2004-11-10  Alexandre Oliva  <aoliva@redhat.com>
* cgen.c (gas_cgen_parse_operand): Handle
CGEN_PARSE_OPERAND_SYMBOLIC.
* config/tc-frv.c (md_cgen_lookup_reloc): Handle TLS relocations.
(frv_force_relocation): Likewise.  Fix handling of PIC
relocations.
(md_apply_fix3): Likewise.
include/elf/ChangeLog:
2004-12-10  Alexandre Oliva  <aoliva@redhat.com>
* frv.h: Add R_FRV_TLSMOFF.
2004-11-10  Alexandre Oliva  <aoliva@redhat.com>
* frv.h: Add TLS relocations.
include/opcode/ChangeLog:
2004-11-10  Alexandre Oliva  <aoliva@redhat.com>
* cgen.h (enum cgen_parse_operand_type): Add
CGEN_PARSE_OPERAND_SYMBOLIC.
ld/testsuite/ChangeLog:
* ld-frv/fdpic.exp: Add -mfdpic to ASFLAGS.
* ld-frv/tls.exp: Likewise.
2004-11-26  Alexandre Oliva  <aoliva@redhat.com>
* ld-frv/tls-3.s: New.
* ld-frv/tls-static-3.d: New.
* ld-frv/tls-dynamic-3.d: New.
* ld-frv/tls-pie-3.d: New.
* ld-frv/tls-shared-3.d: New.
* ld-frv/tls-relax-static-3.d: New.
* ld-frv/tls-relax-dynamic-3.d: New.
* ld-frv/tls-relax-pie-3.d: New.
* ld-frv/tls-relax-shared-3.d: New.
* ld-frv/tls.exp: Run the new tests.
* ld-frv/tls-dynamic-2.d: Adjust for improved relaxation.
* ld-frv/tls-relax-dynamic-2.d: Likewise.
* ld-frv/tls-relax-initial-shared-2.d: Likewise.
2004-11-10  Alexandre Oliva  <aoliva@redhat.com>
* ld-frv/tls-1-dep.s: New.
* ld-frv/tls-1-shared.lds: New.
* ld-frv/tls-1.s: New.
* ld-frv/tls-2.s: New.
* ld-frv/tls-dynamic-1.d: New.
* ld-frv/tls-dynamic-2.d: New.
* ld-frv/tls-initial-shared-2.d: New.
* ld-frv/tls-pie-1.d: New.
* ld-frv/tls-relax-dynamic-1.d: New.
* ld-frv/tls-relax-dynamic-2.d: New.
* ld-frv/tls-relax-initial-shared-2.d: New.
* ld-frv/tls-relax-pie-1.d: New.
* ld-frv/tls-relax-shared-1.d: New.
* ld-frv/tls-relax-shared-2.d: New.
* ld-frv/tls-relax-static-1.d: New.
* ld-frv/tls-shared-1-fail.d: New.
* ld-frv/tls-shared-1.d: New.
* ld-frv/tls-shared-2.d: New.
* ld-frv/tls-static-1.d: New.
* ld-frv/tls.exp: New.
* ld-frv/fdpic-pie-1.d: Adjust for 64-bit host.
* ld-frv/fdpic-pie-2.d: Likewise.
* ld-frv/fdpic-pie-6.d: Likewise.
* ld-frv/fdpic-pie-7.d: Likewise.
* ld-frv/fdpic-pie-8.d: Likewise.
* ld-frv/fdpic-shared-1.d: Likewise.
* ld-frv/fdpic-shared-2.d: Likewise.
* ld-frv/fdpic-shared-3.d: Likewise.
* ld-frv/fdpic-shared-4.d: Likewise.
* ld-frv/fdpic-shared-5.d: Likewise.
* ld-frv/fdpic-shared-6.d: Likewise.
* ld-frv/fdpic-shared-7.d: Likewise.
* ld-frv/fdpic-shared-8.d: Likewise.
* ld-frv/fdpic-shared-local-2.d: Likewise.
* ld-frv/fdpic-shared-local-8.d: Likewise.
* ld-frv/fdpic-static-1.d: Likewise.
* ld-frv/fdpic-static-2.d: Likewise.
* ld-frv/fdpic-static-6.d: Likewise.
* ld-frv/fdpic-static-7.d: Likewise.
* ld-frv/fdpic-static-8.d: Likewise.
opcodes/ChangeLog:
2004-11-10  Alexandre Oliva  <aoliva@redhat.com>
* frv-asm.c: Rebuilt.
* frv-desc.c: Rebuilt.
* frv-desc.h: Rebuilt.
* frv-dis.c: Rebuilt.
* frv-ibld.c: Rebuilt.
* frv-opc.c: Rebuilt.
* frv-opc.h: Rebuilt.
2005-01-25 20:22:35 +00:00
Fred Fish 2804a58c4c 2005-01-21 Fred Fish <fnf@specifixinc.com>
* mips.h: Change INSN_ALIAS to INSN2_ALIAS.
	Change INSN_WRITE_MDMX_ACC to INSN2_WRITE_MDMX_ACC.
	Change INSN_READ_MDMX_ACC to INSN2_READ_MDMX_ACC.
2005-01-21 19:42:08 +00:00
Fred Fish 1a0b5b8e6c 2005-01-19 Fred Fish <fnf@specifixinc.com>
* mips.h (struct mips_opcode): Add new pinfo2 member.
	(INSN_ALIAS): New define for opcode table entries that are
	specific instances of another entry, such as 'move' for an 'or'
	with a zero operand.
	(INSN_READ_MDMX_ACC): Redefine from 0 to 0x2.
	(INSN_WRITE_MDMX_ACC): Redefine from 0 to 0x4.
2005-01-19 23:29:12 +00:00
Nick Clifton a1cfb63026 Fix SH2A machine variants in order to correctly select instruction inheritance 2005-01-17 14:08:16 +00:00
Alan Modra 2538a7ff9b include/elf/
* ppc.h (R_PPC_RELAX32_PLT, R_PPC_RELAX32PC_PLT): Define.
	(R_PPC_RELAX32, R_PPC_RELAX32PC): Adjust value.
bfd/
	* elf32-ppc.c (ppc_elf_howto_raw): Delete RELAX32* entries.
	(ppc_elf_relax_section): Use PLT variants of RELAX32 relocs for
	reaching PLT.
	(ppc_elf_relocate_section): Handle R_PPC_RELAX32_PLT and
	R_PPC_RELAX32PC_PLT.
2005-01-12 11:28:23 +00:00
Nick Clifton c4a0585f60 Add support for maxq10 and maxq20 machine values 2005-01-10 16:33:51 +00:00
Andreas Schwab e6cf44ee56 binutils/:
* configure.in: Don't define SKIP_ZEROES.
	* configure: Regenerate.
	* objdump.c (disassemble_data): Set skip_zeroes and
	skip_zeroes_at_end in disasm_info to defaults.
	(DEFAULT_SKIP_ZEROES): Rename from SKIP_ZEROES and always define.
	(DEFAULT_SKIP_ZEROES_AT_END): Rename from SKIP_ZEROES_AT_END and
	always define.
	(disassemble_bytes): Use skip_zeroes and skip_zeroes_at_end from
	objdump_disasm_info.

include/:
	* dis-asm.h (struct disassemble_info): Add skip_zeroes and
	skip_zeroes_at_end.

opcodes/:
	* disassemble.c (disassemble_init_for_target) <case
	bfd_arch_ia64>: Set skip_zeroes to 16.
	<case bfd_arch_tic4x>: Set skip_zeroes to 32.
2005-01-10 09:54:50 +00:00
Nick Clifton 1f490e5712 Add support for the new R_AVR_LDI, R_AVR_6 and R_AVR_6_ADIW relocs for the
LDI, ADIW/SBIW and LDD/STD instructions.
2004-12-22 14:25:37 +00:00
Richard Sandiford 1df0c1dde7 include/elf/
* v850.h (R_V850_LO16_SPLIT_OFFSET): New reloc.

bfd/
	* reloc.c (BFD_RELOC_V850_LO16_SPLIT_OFFSET): New bfd_reloc_code_type.
	* elf32-v850.c (v850_elf_howto_table): Add entry for
	R_V850_LO16_SPLIT_OFFSET.
	(v850_elf_reloc_map): Map it to BFD_RELOC_V850_LO16_SPLIT_OFFSET.
	(v850_elf_perform_lo16_relocation): New function, extracted from...
	(v850_elf_perform_relocation): ...here.  Use it to handle
	R_V850_LO16_SPLIT_OFFSET.
	(v850_elf_check_relocs, v850_elf_final_link_relocate): Handle
	R_V850_LO16_SPLIT_OFFSET.
	* libbfd.h, bfd-in2.h: Regenerate.

gas/
	* config/tc-v850.c (handle_lo16): New function.
	(v850_reloc_prefix): Use it to check lo().
	(md_assemble, md_apply_fix3): Handle BFD_RELOC_V850_LO16_SPLIT_OFFSET.

gas/testsuite/
	* gas/v850/split-lo16.{s,d}: New test.
	* gas/v850/v850.exp: Run it.

ld/testsuite/
	* ld-v850: New directory.
2004-12-16 16:55:53 +00:00
Hans-Peter Nilsson 4931fc2b3a * callback.h (CB_SYS_truncate, CB_SYS_ftruncate): New macros. 2004-12-15 01:24:15 +00:00
Hans-Peter Nilsson bf15c75b20 Correct attribution last changes 2004-12-13 00:43:59 +00:00
Hans-Peter Nilsson 4e96a0a0a1 * callback.h (CB_SYS_rename): New macro. 2004-12-13 00:42:49 +00:00
Hans-Peter Nilsson 716f334bce * callback.h (struct host_callback_struct): New member lstat.
(CB_SYS_lstat): New macro.
2004-12-13 00:35:29 +00:00
DJ Delorie c546950745 merge from gcc 2004-12-10 22:04:33 +00:00
Ian Lance Taylor 23b9802aa0 * mips.h (CPU_RM9000): Define.
(OPCODE_IS_MEMBER): Handle CPU_RM9000.
2004-12-09 06:13:44 +00:00
Ian Lance Taylor 55059a1f7d * mips.h (E_MIPS_MACH_9000): Define. 2004-12-09 06:02:45 +00:00
Tomer Levi ee58ee4a28 2004-11-29 Tomer Levi <Tomer.Levi@nsc.com>
* opcode/crx.h (enum operand_type): Rename rbase_cst4 to rbase_dispu4.
	Remove redundant instruction types.
	(struct argument): X_op - new field.
	(struct cst4_entry): Remove.
	(no_op_insn): Declare.
2004-11-29 16:36:50 +00:00
Jan Beulich c1ab3396dc gas/
2004-11-25 Jan Beulich <jbeulich@novell.com>

	* config/tc-i386.c (optimize_imm): Adjust immediates to only those
	permissible for the selected instruction suffix.
	(process_suffix): For DefaultSize instructions, suppressing the
	guessing of a 'q' suffix if the instruction doesn't support it is
	pointless, because only an 'l' suffix can be guessed in this place.

gas/testsuite/
2004-11-25 Jan Beulich <jbeulich@novell.com>
	* gas/i386/x86-64-inval.[sl]: Remove sahf/lahf.

include/opcode/
2004-11-25 Jan Beulich <jbeulich@novell.com>

	* i386.h: CpuNo64 mov can't reasonably have a 'q' suffix. Moves
	to/from test registers are illegal in 64-bit mode. Add missing
	NoRex64 to sidt. fxsave/fxrstor now allow for a 'q' suffix
	(previously one had to explicitly encode a rex64 prefix). Re-enable
	lahf/sahf in 64-bit mode as at least some Athlon64/Opteron steppings
	support it there. Add cmpxchg16b as per Intel's 64-bit documentation.
2004-11-25 08:42:54 +00:00
Jan Beulich 4b8e88e31d gas/
2004-11-23 Jan Beulich <jbeulich@novell.com>

	* config/tc-i386.h (CpuMMX2): Declare. Artificial classifier to
	indicate the MMX extensions added by both SSE and 3DNow!A.
	(Cpu3dnowA): Declare.
	(CpuUnknownFlags): Update.
	* config/tc-i386.c (cpu_sub_arch_name): Declare.
	(cpu_arch): i586 and pentium do not imply MMX. i686 and pentiumpro do
	neither imply SSE nor MMX. k6 implies MMX. k6_2 additionally implies
	3DNow!. Athlon additionally implies 3DNow!A. Several new
	entries (those starting with a dot are for sub-arch specification).
	(set_cpu_arch): Handle sub-arch specifications.
	(parse_insn): Distinguish between instructions not supported because
	of insufficient CPU features and because of 64-bit mode.
	* doc/c-i386.texi: Describe enhanced .arch directive.

include/opcode/
2004-11-23 Jan Beulich <jbeulich@novell.com>

	* i386.h (i386_optab): paddq and psubq, even in their MMX form, are
	available only with SSE2. Change the MMX additions introduced by SSE
	and 3DNow!A to CpuMMX2 (rather than CpuMMX). Indicate the 3DNow!A
	instructions by their now designated identifier (since combining i686
	and 3DNow! does not really imply 3DNow!A).
2004-11-23 07:55:12 +00:00
Alan Modra 0409f19033 include/opcode/
* msp430.h (struct rcodes_s, MSP430_RLC, msp430_rcodes,
	struct hcodes_s, msp430_hcodes): Move to gas/config/tc-msp430.c.
gas/
	* config/tc-msp430.c (struct rcodes_s, MSP430_RLC, msp430_rcodes,
	struct hcodes_s, msp430_hcodes): From include/opcode/msp430.h.
2004-11-19 12:28:01 +00:00
Paul Brook f3f23268fe bfd/
* elf-bfd.h (_bfd_elf_slurp_version_tables): Update prototype.
	* elf.c (_bfd_elf_print_private_bfd_data): Pass extra argument.
	(_bfd_elf_slurp_version_tables): Add extra argument.  Create extra
	default version definition for unversioned symbols.
	* elfcode.h (elf_slurp_symbol_table): Pass extra argument.
	* elflink.c (elf_link_add_object_symbols): Pass extra argument to
	_bfd_elf_slurp_version_tables.  Set default version for unversioned
	imported symbols.
include/
	* bfdlink.h (bfd_link_info): Add default_imported_symver.
ld/
	* ld.texinfo: Document --default-imported-symver.
	* ldmain.c (main): Set link_info.default_imported_symver.
	* lexsup.c (option_values): Add OPTION_DEFAULT_IMPORTED_SYMVER.
	(ld_options): Add --default-imported-symver.
	(parse_args): Handle OPTION_DEFAULT_IMPORTED_SYMVER.
2004-11-15 23:21:26 +00:00
Bob Wilson 390d719fbb 2004-11-12 Bob Wilson <bob.wilson@acm.org>
include/ChangeLog
	* xtensa-isa-internal.h (xtensa_interface_internal): Add class_id.
	* xtensa-isa.h (xtensa_interface_class_id): New prototype.

bfd/ChangeLog
	* xtensa-isa.c (xtensa_interface_class_id): New.

gas/ChangeLog
	* config/tc-xtensa.c (finish_vinsn): Clear pending instruction if
	there is a conflict.
	(check_t1_t2_reads_and_writes): Check for both reads and writes to
	interfaces that are related as determined by xtensa_interface_class_id.
2004-11-12 21:59:13 +00:00
Nick Clifton 7cd0c32b80 Add support fpr MAXQ processor 2004-11-08 13:17:39 +00:00
Nick Clifton 7e9d30a43f Fix support for PECOFF weak symbols 2004-11-08 08:12:40 +00:00
H.J. Lu d356aef3c4 2004-11-05 H.J. Lu <hongjiu.lu@intel.com>
* i386.h (i386_optab): Put back "movzb".
2004-11-05 23:14:30 +00:00
Tomer Levi 116a99648d 2004-11-05 Tomer Levi <Tomer.Levi@nsc.com>
* opcode/crx.h (enum argtype): Rename types, remove unused types.
2004-11-05 10:59:16 +00:00
Tomer Levi dc7e8c1b95 2004-11-05 Tomer Levi <Tomer.Levi@nsc.com>
* opcode/crx.h (enum argtype): Rename types, remove unused types.
2004-11-05 10:58:22 +00:00
Hans-Peter Nilsson 2f001ba2ef * cris.h (enum cris_insn_version_usage): Tweak formatting and
comments.  Remove member cris_ver_sim.  Add members
	cris_ver_sim_v0_10, cris_ver_v0_10, cris_ver_v3_10,
	cris_ver_v8_10, cris_ver_v10, cris_ver_v10p.
	(struct cris_support_reg, struct cris_cond15): New types.
	(cris_conds15): Declare.
	(JUMP_PC_INCR_OPCODE_V32, BA_DWORD_OPCODE, NOP_OPCODE_COMMON)
	(NOP_OPCODE_ZBITS_COMMON, LAPC_DWORD_OPCODE, LAPC_DWORD_Z_BITS)
	(NOP_OPCODE_V32, NOP_Z_BITS_V32): New macros.
	(NOP_Z_BITS): Define in terms of NOP_OPCODE.
	(cris_imm_oprnd_size_type): New members SIZE_FIELD_SIGNED and
	SIZE_FIELD_UNSIGNED.
2004-11-04 14:53:41 +00:00
Hans-Peter Nilsson 34b30773b1 * cris.h (EF_CRIS_VARIANT_MASK, EF_CRIS_VARIANT_ANY_V0_V10)
(EF_CRIS_VARIANT_V32, EF_CRIS_VARIANT_COMMON_V10_V32): New
	macros.
2004-11-04 14:53:19 +00:00
Jan Beulich 1fede1b1ba gas/
2004-11-04 Jan Beulich <jbeulich@novell.com>

	* config/tc-i386.c (set_intel_syntax): Allow % in symbol names when
	intel syntax and no register prefix, allow $ in symbol names when
	intel syntax.
	(set_16bit_gcc_code_flag): Replace literal 'l' by LONG_MNEM_SUFFIX.
	(intel_float_operand): Add fourth return value indicating math control
	operations. Make classification more precise.
	(md_assemble): Complain if memory operand of mov[sz]x has no size
	specified.
	(parse_insn): Translate word operands to floating point instructions
	operating on integers as well as control instructions to short ones
	as expected by AT&T syntax. Translate 'd' suffix to short one only for
	floating point instructions operating on non-integer operands.
	(match_template): Remove fldcw special case. Adjust q-suffix handling
	to permit it on fild/fistp/fisttp in AT&T mode.
	(process_suffix): Don't guess DefaultSize insns' suffix from
	stackop_size for certain floating point control instructions. Guess
	suffix for branch and [ls][gi]dt based on flag_code. Split error
	messages for Intel and AT&T syntax, and make the condition more strict
	for the former. Adjust suppressing of generation of operand size
	overrides.
	(intel parser): Allow the full set of MASM operators. Add FWORD, TBYTE,
	OWORD, and XMMWORD operand size specifiers (TBYTE replaces XWORD). Add
	more error checking.
	* config/tc-i386.h (BYTE_PTR WORD_PTR DWORD_PTR QWORD_PTR XWORD_PTR
	SHORT OFFSET_FLAT FLAT NONE_FOUND): Remove unused defines.

gas/testsuite/
2004-11-04 Jan Beulich <jbeulich@novell.com>
	* gas/i386/i386.exp: Execute new tests intelbad and intelok.
	* gas/i386/intelbad.[sl]: New test to check for various things not
	permitted in Intel mode.
	* gas/i386/intel.d, gas/i386/opcode.d, gas/i386/x86-64-opcode.d:
	Adjust for change to segment register store.
	* gas/i386/intelok.[sd]: New test to check various Intel mode specific
	things get handled correctly.
	* gas/i386/x86_64.[sd]: Remove unsupported constructs referring to
	'high' and 'low' parts of an operand, which the parser previously
	accepted while neither telling that it's not supported nor that it
	ignored the remainder of the line following these supposed keywords.

include/opcode/
2004-11-04 Jan Beulich <jbeulich@novell.com>

	* i386.h (sldx_Suf): Remove.
	(FP, l_FP, sl_FP, x_FP): Don't imply IgnoreSize.
	(q_FP): Define, implying no REX64.
	(x_FP, sl_FP): Imply FloatMF.
	(i386_optab): Split reg and mem forms of moving from segment registers
	so that the memory forms can ignore the 16-/32-bit operand size
	distinction. Adjust a few others for Intel mode. Remove *FP uses from
	all non-floating-point instructions. Unite 32- and 64-bit forms of
	movsx, movzx, and movd. Adjust floating point operations for the above
	changes to the *FP macros. Add DefaultSize to floating point control
	insns operating on larger memory ranges. Remove left over comments
	hinting at certain insns being Intel-syntax ones where the ones
	actually meant are already gone.

opcodes/
2004-11-04 Jan Beulich <jbeulich@novell.com>

	* i386-dis.c (Eq, Edqw, indirEp, Gdq, I1): Define.
	(indirEb): Remove.
	(Mp): Use f_mode rather than none at all.
	(t_mode, dq_mode, dqw_mode, f_mode, const_1_mode): Define. t_mode
	replaces what previously was x_mode; x_mode now means 128-bit SSE
	operands.
	(dis386): Make far jumps and calls have an 'l' prefix only in AT&T
	mode. movmskpX's, pextrw's, and pmovmskb's first operands are Gdq.
	pinsrw's second operand is Edqw.
	(grps): 1-bit shifts' and rotates' second operands are I1. cmpxchg8b's
	operand is Eq. movntq's and movntdq's first operands are EM. s[gi]dt,
	fldenv, frstor, fsave, fstenv all should also have suffixes in Intel
	mode when an operand size override is present or always suffixing.
	More instructions will need to be added to this group.
	(putop): Handle new macro chars 'C' (short/long suffix selector),
	'I' (Intel mode override for following macro char), and 'J' (for
	adding the 'l' prefix to far branches in AT&T mode). When an
	alternative was specified in the template, honor macro character when
	specified for Intel mode.
	(OP_E): Handle new *_mode values. Correct pointer specifications for
	memory operands. Consolidate output of index register.
	(OP_G): Handle new *_mode values.
	(OP_I): Handle const_1_mode.
	(OP_ESreg, OP_DSreg): Generate pointer specifications. Indicate
	respective opcode prefix bits have been consumed.
	(OP_EM, OP_EX): Provide some default handling for generating pointer
	specifications.
2004-11-04 09:16:08 +00:00