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162 Commits

Author SHA1 Message Date
Alan Modra 45bdd82244 missdit 2002-02-25 04:13:42 +00:00
Jan Hubicka dda54ada03 * i386.h (push,pop): Fix Reg64 to WordReg to allow 16bit operands. 2002-02-18 16:32:25 +00:00
Jan Hubicka 2b14b2d6da * i386.h (push,pop): Allow 16bit operands in 64bit mode. 
(xchg): Fix.
	(in, out): Disable 64bit operands.
	(call, jmp): Avoid REX prefixes.
	(jcxz): Prohibit in 64bit mode
	(jrcxz, loop): Add 64bit variants.
	(movq): Fix patterns.
	(movmskps, pextrw, pinstrw): Add 64bit variants.
 2002-02-11 11:56:20 +00:00
Nick Clifton 5d4ac1011e Add support for OpenRISC 32-bit embedded processor 2002-01-31 17:33:03 +00:00
Graydon Hoare 4412296fd8 [ include/opcode/ChangeLog ] 
2002-01-22  Graydon Hoare  <graydon@redhat.com>

	* cgen.h (CGEN_MAYBE_MULTI_IFLD): New structure.
	(CGEN_OPERAND): Add CGEN_MAYBE_MULTI_IFLD field.

[ opcodes/ChangeLog ]

2002-01-22  Graydon Hoare  <graydon@redhat.com>

	* fr30-asm.c: Regenerate.
	* fr30-desc.c: Likewise.
	* fr30-desc.h: Likewise.
	* fr30-dis.c: Likewise.
	* fr30-ibld.c: Likewise.
	* fr30-opc.c: Likewise.
	* fr30-opc.h: Likewise.
	* m32r-asm.c: Likewise.
	* m32r-desc.c: Likewise.
	* m32r-desc.h: Likewise.
	* m32r-dis.c: Likewise.
	* m32r-ibld.c: Likewise.
	* m32r-opc.c: Likewise.
	* m32r-opc.h: Likewise.
	* m32r-opinst.c: Likewise.
	* openrisc-asm.c: Likewise.
	* openrisc-desc.c: Likewise.
	* openrisc-desc.h: Likewise.
	* openrisc-dis.c: Likewise.
	* openrisc-ibld.c: Likewise.
	* openrisc-opc.c: Likewise.
	* openrisc-opc.h: Likewise.
	* xstormy16-desc.c: Likewise.

[ cgen/ChangeLog ]

2002-01-22  Graydon Hoare  <graydon@redhat.com>

	* desc-cpu.scm (ifld-number-cache): Add.
	(ifld-number): Add.
	(gen-maybe-multi-ifld-of-op): Add.
	(gen-maybe-multi-ifld): Add.
	(gen-multi-ifield-nodes): Add.
	(cgen-desc.c): Add call to gen-multi-ifield-nodes.
 2002-01-22 21:45:33 +00:00
Alan Modra 3ba05c0f92 comment typo fixes 2002-01-21 14:03:26 +00:00
Matthew Green d48d56d07b [gas/ChangeLog] 
* config/tc-ppc.c (md_parse_option): BookE is not Motorola specific.

[include/opcode/ChangeLog]
* ppc.h (PPC_OPCODE_BOOKE): BookE is not Motorola specific.
(PPC_OPCODE_BOOKE64): Likewise.
 2002-01-03 02:07:19 +00:00
Jeff Law b346ae85d6 * hppa.h (call, ret): Move to end of table. 
(addb, addib): PA2.0 variants should have been PA2.0W.
        (ldw, ldh, ldb, stw, sth, stb, stwa): Reorder to keep disassembler
        happy.
        (fldw, fldd, fstw, fstd, bb): Likewise.
        (short loads/stores): Tweak format specifier slightly to keep
        disassembler happy.
        (indexed loads/stores): Likewise.
        (absolute loads/stores): Likewise.
 2001-12-31 23:43:03 +00:00
Alexandre Oliva bb9cc3dba0 * d10v.h (OPERAND_NOSP): New macro. 2001-12-04 10:06:40 +00:00
Alexandre Oliva 20a206afa2 * d10v.h (OPERAND_SP): New macro. 2001-11-29 18:03:50 +00:00
Alan Modra d590035529 binutils/ChangeLog 
* doc/binutils.texi (objdump): Document ppc -M options.
gas/ChangeLog
	* config/tc-ppc.c (ppc_insert_operand): Pass (ppc_cpu | ppc_size)
	to operand->insert.
	(md_assemble): Likewise.
gas/testsuite/ChangeLog
	* gas/ppc/booke.d: Modify reloc and target matches for powerpc64.
include/opcode/ChangeLog
	* ppc.h (struct powerpc_operand <insert, extract>): Add dialect param.
opcodes/ChangeLog
	* ppc-opc.c (PPC64): Revert 2001-10-12. Do include PPC_OPCODE_PPC.
	(insert_bat, extract_bat, insert_bba, extract_bba,
	insert_bd, extract_bd, insert_bdm, extract_bdm,
	insert_bdp, extract_bdp, valid_bo,
	insert_bo, extract_bo, insert_boe, extract_boe,
	insert_ds, extract_ds, insert_de, extract_de,
	insert_des, extract_des, insert_li, extract_li,
	insert_mbe, extract_mbe, insert_mb6, extract_mb6,
	insert_nb, extract_nb, insert_nsi, extract_nsi,
	insert_ral, insert_ram, insert_ras,
	insert_rbs, extract_rbs, insert_sh6, extract_sh6,
	insert_spr, extract_spr, insert_tbr, extract_tbr): Add dialect param.
	(extract_bd, extract_bdm, extract_bdp,
	extract_ds, extract_des,
	extract_li, extract_nsi): Implement sign extension without conditional.
	(insert_bdm, extract_bdm,
	insert_bdp, extract_bdp, valid_bo): Handle 64 bit branch hints.
	(extract_bdm, extract_bdp): Correct 32 bit validation.
	(AT1_MASK, AT2_MASK): Define.
	(BBOAT_MASK): Define.
	(BBOATCB_MASK, BBOAT2CB_MASK, BBOATBI_MASK): Define.
	(BOFM64, BOFP64, BOTM64, BOTP64): Define.
	(BODNZM64, BODNZP64, BODZM64, BODZP64): Define.
	(PPCCOM32, PPCCOM64): Define.
	(powerpc_opcodes): Modify existing 32 bit insns with branch hints
	and add new patterns to implement 64 bit branches with hints.  Move
	booke instructions so they match before ppc64.
	* ppc-dis.c (powerpc_dialect): Set PPC_OPCODE_64 in dialect for
	64 bit default targets, and parse "32" and "64" in options.
	Formatting fixes.
	(print_insn_powerpc): Pass dialect to operand->extract.
 2001-11-15 01:08:52 +00:00
Tim Wall 7d9961e897 Fix tic54x testsuite failures and Lmem disassembly bugs. 2001-11-13 14:22:52 +00:00
Alan Modra f513298e18 * i386.h (i386_optab): Add entries for "sldr", "smsw" and "str" to 
accept WordReg.
	* i386-dis.c (grps): Change "sldt", "str", and "smsw" entries
	to "sldtQ", "strQ", "smswQ" respectively; all with Ev operand
	category instead of Ew.
 2001-11-13 01:03:55 +00:00
Chris Demetriou 5088b18431 2001-11-04 Chris Demetriou <cgd@broadcom.com> 
* mips.h (OPCODE_IS_MEMBER): Remove extra space.
 2001-11-05 03:07:26 +00:00
Nick Clifton 39374014e7 Add MMIX support 2001-10-30 15:20:10 +00:00
Chris Demetriou 5e709b88c5 2001-10-18 Chris Demetriou <cgd@broadcom.com> 
* mips.h (OPCODE_IS_MEMBER): Add a no-op term to the end
        of the expression, to make source code merging easier.
 2001-10-18 22:41:35 +00:00
Chris Demetriou bd71a776e8 2001-10-17 Chris Demetriou <cgd@broadcom.com> 
* mips.h: Sort coprocessor instruction argument characters
       in comment, add a few more words of description for "H".
 2001-10-18 01:50:26 +00:00
Chris Demetriou 90cb41d9e7 [gas/testsuite/ChangeLog] 
2001-10-17  Chris Demetriou  <cgd@broadcom.com>

        * gas/mips/mips.exp (sb1-ext-ps): New test to test
        SB-1 core's paired-single extensions to the MIPS64 ISA.
        * gas/mips/sb1-ext-ps.d: New file.
        * gas/mips/sb1-ext-ps.s: New file.

[include/opcode/ChangeLog]
2001-10-17  Chris Demetriou  <cgd@broadcom.com>

        * mips.h (INSN_SB1): New cpu-specific instruction bit.
        (OPCODE_IS_MEMBER): Allow instructions matching INSN_SB1
        if cpu is CPU_SB1.

[opcodes/ChangeLog]
2001-10-17  Chris Demetriou  <cgd@broadcom.com>

        * mips-dis.c (mips_isa_type): Make the ISA used to disassemble
        SB-1 binaries include instructions specific to the SB-1.
        * mips-opc.c (SB1): New definition.
        (mips_builtin_opcodes): Add SB-1 extension opcodes "div.ps",
        "recip.ps", "rsqrt.ps", and "sqrt.ps".
 2001-10-18 01:42:16 +00:00
Matthew Green 406234a70e [gas/ChangeLog] 
* config/tc-ppc.c (md_show_usage): Add missing -maltivec, -m7400,
	-m7410, -m7450 and -m7455 options.

[gas/testsuite/ChangeLog]
	* gas/ppc/altivec.s: New test for AltiVec.
	* gas/ppc/altivec.d: New file.
	* gas/ppc/ppc.exp: Test altivec.s

[include/opcode/ChangeLog]
	* ppc.h (PPC_OPCODE_BOOKE64): Fix typo.

[opcodes/ChangeLog]
	* ppc-opc.c (STRM): New AltiVec operand.
	(XDSS): New AltiVec instruction form.
	(mtvscr): Correct operand list.
	(dst, dstt, dstst, dststt, dss, dssall): AltiVec instructions.
 2001-10-17 13:13:15 +00:00
Matthew Green f7ab43a74f oops, fix an error in the previous entry. 2001-10-13 02:27:25 +00:00
Matthew Green 0cd692b40b [gas/ChangeLog] 
* config/tc-ppc.c (md_parse_option): New -m7410, -m7450 and -m7455
	flags, equivalent to -m7400.  New -maltivec to enable AltiVec
	instructions.  New -mbook64 and -mbooke/-mbooke32 flags to enable
	64-bit and 32-bit BookE support, respectively.  Change -m403 and
	-m405 to set PPC403 option.
	(md_show_usage): Adjust for new options.
	* doc/all.texi: Set PPC.
	* doc/as.texinfo: Add PPC support and pull in c-ppc.texi.
	* doc/c-ppc.texi: New file.
	* doc/Makefile.am (CPU_DOCS): Add c-ppc.texi.
	* doc/Makefile.in: Regenerate.

[gas/testsuite/ChangeLog]
	* gas/ppc/booke.s: New test for Motorola BookE.
	* gas/ppc/booke.d: New file.
	* gas/ppc/ppc.exp: Test booke.s.

[include/opcode/ChangeLog]
	* ppc.h (PPC_OPCODE_BOOKE, PPC_OPCODE_403): New opcode flags for
	BookE and PowerPC403 instructions.

[opcodes/ChangeLog]
	* ppc-opc.c (insert_de, extract_de, insert_des, extract_des): New
	instruction field instruction/extraction functions for new BookE
	DE form instructions.
	(CT): New macro for CT field in an X form instruction.
	(DE, DES, DEO, DE_MASK): New macros for DE/DES fields in DE form
	instructions.
	(PPC64): Don't include PPC_OPCODE_PPC.
	(403): New opcode macro for PPC403 processors.
	(BOOKE): New opcode macro for BookE processors.
	(bce, bcel, bcea, bcela, bclre, bclrel: New BookE instructions.
	(bcctre, bcctrel, be, bel, bea, bela, icbt, icbte, lwzxe): Likewise.
	(dcbste, lwzuxe, luxe, dcbfe, lbzxe, lwarxe, lbzuxe): Likewise.
	(stwcxe, stwxe, stxe, stwuxe, stuxe, stbxe, dcbtste, stbuxe): Likewise.
	(mfapidi, dcbte, lhzxe, lhzuxe, lhaxe, lhauxe, subfe64): Likewise.
	(subfeo64, adde64, addeo64, sthxe, sthuxe, subfze64): Likewise.
	(subfzeo64, addze64, addzeo64, dcbie, subfme64, subfmeo64): Likewise.
	(addme64, addmeo64, stdcxe., mcrxr64, lwbrxe, lfsxe, lfsuxe): Likewise.
	(lfdxe, lfduxe, stwbrxe, stfsxe, stfsuxe, stfdxe, dcbae): Likewise.
	(stfduxe, tlbivax, tlbivaxe, lhbrxe, ldxe, lduxe, tlbsx): Likewise.
	(tlbsxe, sthbrxe, stdxe, stduxe, icbie, stfiwxe, dcbze, lbze): Likewise.
	(lbzue, ldue, lhze, lhzue, lhae, lhaue, lwze, lwzue): Likewise.
	(stbe, stbue, sthe, sthue, stwe, stwue, lfse, lfsue, lfde): Likewise.
	(lfdue, stde, stdue, stfse, stfsue, stfde, stfdue): Likewise.

	* ppc-dis.c (print_insn_big_powerpc, print_insn_little_powerpc): Look
	for a disassembler option of `booke', `booke32' or `booke64' to enable
	BookE support in the disassembler.
 2001-10-13 01:59:09 +00:00
Nick Clifton c985580e97 Remove spurious comment 2001-09-27 07:45:32 +00:00
Nick Clifton 8d9a59afb1 fix compile time warning messages 2001-09-21 06:52:20 +00:00
Richard Henderson 60a6280984 * alpha.h (struct alpha_operand): Pack elements into bitfields. 2001-09-05 02:52:17 +00:00
Eric Christopher a26a4cdbe0 mips3264 support 2001-08-31 21:21:54 +00:00
Alan Modra c2f0f4f466 * ppc.h (PPC_OPERAND_DS): Define. 2001-08-27 10:26:57 +00:00
Andreas Jaeger e451b2c504 For include/opcode: 
* d30v.h: Fix declaration of reg_name_cnt.

	* d10v.h: Fix declaration of d10v_reg_name_cnt.

	* arc.h: Add prototypes from opcodes/arc-opc.c.

For opcodes:
	* tic54x-dis.c: Add unused attributes where needed.

	* z8k-dis.c (output_instr): Add unused attribute.

	* h8300-dis.c: Add missing prototypes.
	(bfd_h8_disassemble): Make static.

	* cris-dis.c: Add missing prototype.
	* h8500-dis.c: Likewise.
	* m68hc11-dis.c: Likewise.
	* pj-dis.c: Likewise.
	* tic54x-dis.c: Likewise.
	* v850-dis.c: Likewise.
	* vax-dis.c: Likewise.
	* w65-dis.c: Likewise.
	* z8k-dis.c: Likewise.

	* d10v-dis.c: Add missing prototype.
	(dis_long): Remove unused variable.
	(dis_2_short): Likewise.

	* sh-dis.c: Add missing prototypes.
	* v850-opc.c: Likewise.
	Add unused attributes where needed.

	* ns32k-dis.c: Add missing prototypes.
	(bit_extract_simple): Remove unused variable.
 2001-08-26 11:47:39 +00:00
Thiemo Seufer ab7c6379a8 Add support for MIPS R1[02]000 performance counter opcodes. 2001-08-16 19:24:33 +00:00
Alan Modra b5c27d80c0 Revert 2001-08-08 changes. 2001-08-10 01:34:47 +00:00
Alan Modra 584b6591df * ppc.h (struct powerpc_operand): New field `reloc'. 
* ppc-opc.c: Include "bfd.h".
	(powerpc_operands): Add new field for reloc type.
 2001-08-08 13:19:36 +00:00
Frank Ch. Eigler ef393a8fad * some support for funny-endian 16/32-bit insn sets 
[cgen/ChangeLog]
2001-07-11  Frank Ch. Eigler  <fche@redhat.com>

        * desc-cpu.scm (-gen-mach-table-defns): Emit fourth field: the
        mach->cpu insn-chunk-bitsize.
        (-gen-cpu-open): In @arch@_cgen_rebuild_tables, process above new
        field toward CGEN_CPU_TABLE->insn_chunk_bitsize.
        * mach.scm (<cpu>): New field insn-chunk-bitsize.
        (-cpu-parse, -cpu-read): Parse/initialize it.
        * doc/rtl.texi (define-cpu): Document it.

[opcodes/ChangeLog]
2001-07-11  Frank Ch. Eigler  <fche@redhat.com>

        * cgen-dis.in (print_insn): Use cgen_get_insn_value instead of
        bfd_get_bits.
        * cgen-opc.c (cgen_get_insn_value, cgen_put_insn_value): Respect
        non-zero CGEN_CPU_DESC->insn_chunk_bitsize.

[include/opcode/ChangeLog]
2001-07-11  Frank Ch. Eigler  <fche@redhat.com>

        * cgen.h (CGEN_MACH): Add insn_chunk_bitsize field.
        (cgen_cpu_desc): Ditto.
 2001-07-12 02:32:25 +00:00
Ben Elliston 6e06cb0d32 2001-07-07 Ben Elliston <bje@redhat.com> 
* m88k.h: Clean up and reformat. Remove unused code.
 2001-07-06 22:14:07 +00:00
Geoffrey Keating 5a5f43a0b9 Index: opcodes/ChangeLog 
2001-06-13  Geoffrey Keating  <geoffk@redhat.com>

	* cgen-asm.c (cgen_parse_keyword): When looking for the
	boundaries of a keyword, allow any special characters
	that are actually in one of the allowed keyword.
	* cgen-opc.c (cgen_keyword_add): Add any special characters
	to the nonalpha_chars field.

Index: cgen/ChangeLog
2001-06-13  Geoffrey Keating  <geoffk@redhat.com>

	* desc.scm (<keyword> 'gen-defn): Add extra zero into
	CGEN_KEYWORD_ENTRY initializers.

Index: include/opcode/ChangeLog
2001-06-13  Geoffrey Keating  <geoffk@redhat.com>

	* cgen.h (cgen_keyword): Add nonalpha_chars field.
 2001-06-14 20:38:42 +00:00
Alan Modra 51352f8ed0 Fix some entries. 2001-05-28 10:37:50 +00:00
Nick Clifton ffa9dc2c1c Add MIPS r12k support 2001-05-23 17:26:39 +00:00
John Healy 865cf1b95c 2001-05-23 John Healy <jhealy@redhat.com> 
* cgen.h: Increased CGEN_MAX_SYNTAX_ELEMENTS to 48.
 2001-05-23 15:34:43 +00:00
Nick Clifton 92f998d4e0 Fix MIPS disassembler so that it produces reassemblable code. 2001-05-15 12:11:12 +00:00
Alan Modra 24a474a4aa Correct cvtps2dq, movdq2q, movq2dq, and movq problems. 2001-05-12 09:52:39 +00:00
Alan Modra 268fad77db Assorted fixes to pinsrw, pextrw, pmovmskb, movmskp, maskmovq. 2001-05-04 11:10:53 +00:00
Hans-Peter Nilsson b25c2ad730 * cris.h (enum cris_insn_version_usage): Correct comment for 
cris_ver_v3p.
 2001-04-05 19:35:17 +00:00
Alan Modra e380bf39ff Small tweaks to sse2 instructions. 2001-03-24 06:29:15 +00:00
Hans-Peter Nilsson 21ebbf8ecf * cris.h (ADD_PC_INCR_OPCODE): New macro. 2001-03-22 16:09:20 +00:00
Kazu Hirata 10654b8555 2001-03-21 Kazu Hirata <kazu@hxi.com> 
* h8300.h: Fix formatting.
 2001-03-22 02:51:19 +00:00
Alan Modra 46b107fb28 paddq and psubq support. 2001-03-22 02:27:53 +00:00
Alan Modra ca05a71296 Fix register name printed in warning message. 2001-03-19 11:28:20 +00:00
Nick Clifton c77e3e5481 Fix typos in ChangeLogs; add coff/external.h; fix copyright dates 2001-03-14 02:27:44 +00:00
Nick Clifton 35fc781b4b new defines for Coldfire V4. 2001-02-28 23:47:10 +00:00
Nick Clifton 72a82eaa20 Add PDP-11 support 2001-02-18 23:33:07 +00:00
Jan Hubicka 343329bac2 * i386.h (i386_optab): SSE integer converison instructions have 
64bit versions on x86-64.
	* i386-dis.c (prefix_user_t): Add 'Y' to SSE ineger converison
	instructions.
	(putop): Handle 'Y'
 2001-02-12 16:42:49 +00:00
Nick Clifton da2da20f20 Remove extraneous whitespace 2001-02-10 22:26:55 +00:00