Commit Graph

77 Commits

Author SHA1 Message Date
Alan Modra b83587946b binutils/ChangeLog
* doc/binutils.texi (objdump): Document x86 -M options.
include/ChangeLog
 	* dis-asm.h (print_insn_i386): Declare.
opcodes/ChangeLog
	* disassemble.c (disassembler): Call print_insn_i386.
	* i386-dis.c (SUFFIX_ALWAYS): Define.
	(struct dis_private): Add orig_sizeflag.
	(print_insn_i386): Make it a wrapper, calling..
	(print_insn): ..The old body of print_insn_i386.  Avoid longjmp
	warning without using volatile by moving orig_sizeflag to priv,
	and removing inbuf.  Parse disassembler_options.
	(print_insn_i386_att, print_insn_i386_intel): Move initialisation
	code to print_insn.
	(putop): Remove #ifdef SUFFIX_ALWAYS.
2001-11-14 03:15:28 +00:00
Tim Wall 7d3480deef Clarify length reference in comment 2001-11-11 15:45:34 +00:00
Nick Clifton 39374014e7 Add MMIX support 2001-10-30 15:20:10 +00:00
Nick Clifton 9572ecf979 Add openRISC support in opcodes 2001-04-27 13:33:26 +00:00
Nick Clifton c77e3e5481 Fix typos in ChangeLogs; add coff/external.h; fix copyright dates 2001-03-14 02:27:44 +00:00
Nick Clifton 72a82eaa20 Add PDP-11 support 2001-02-18 23:33:07 +00:00
Nick Clifton 1e667f61b7 Add s390 support 2001-02-10 00:58:38 +00:00
Nick Clifton c9bd08bcb2 Updated ARC assembler from arccores.com 2001-01-11 21:20:19 +00:00
Hans-Peter Nilsson 4f95585070 * dis-asm.h (struct disassemble_info): New member "section".
(INIT_DISASSEMBLE_INFO_NO_ARCH): Initialize private_data member.
	Initialize section member.
2000-12-18 23:19:55 +00:00
Hans-Peter Nilsson 88d06849ff * dis-asm.h: Declare cris_get_disassembler, not print_insn_cris.
Fix typo in comment.
2000-09-29 18:07:47 +00:00
Jason Eckhardt 4f34f5c30e 2000-07-22 Jason Eckhardt <jle@cygnus.com>
* include/opcode/i860.h (btne, bte, bla): Changed these opcodes
	to use sbroff ('r') instead of split16 ('s').
	(J, K, L, M): New operand types for 16-bit aligned fields.
	(ld.x, {p}fld.x, fst.x, pst.d): Changed these opcodes to
	use I, J, K, L, M instead of just I.
	(T, U): New operand types for split 16-bit aligned fields.
	(st.x): Changed these opcodes to use S, T, U instead of just S.
	(andh, andnoth, orh, xorh): Deleted 3-register forms as they do not
	exist on the i860.
	(pfgt.sd, pfle.sd): Deleted these as they do not exist on the i860.
	(pfeq.ss, pfeq.dd): New opcodes.
	(st.s): Fixed incorrect mask bits.
	(fmlow): Fixed incorrect mask bits.
	(fzchkl, pfzchkl): Fixed incorrect mask bits.
	(faddz, pfaddz): Fixed incorrect mask bits.
	(form, pform): Fixed incorrect mask bits.
	(pfld.l): Fixed incorrect mask bits.
	(fst.q): Fixed incorrect mask bits.
	(all floating point opcodes): Fixed incorrect mask bits for
	handling of dual bit.

	* include/elf/i860.h: New file.
	(elf_i860_reloc_type): Defined ELF32 i860 relocations.

	* bfd/cpu-i860.c: Added comments.

	* bfd/elf32-i860.c (TARGET_LITTLE_SYM): Defined to
	bfd_elf32_i860_little_vec.
	(TARGET_LITTLE_NAME): Defined to "elf32-i860-little".
	(ELF_MAXPAGESIZE): Changed to 4096.

	* bfd/targets.c (bfd_elf32_i860_little_vec): Declaration of
	new target.
	(bfd_target_vector): Added bfd_elf32_i860_little_vec.

	* bfd/config.bfd (i860-stardent-sysv4*, i860-stardent-elf*): Added
	config for little endian elf32 i860.
	(targ_defvec): Define for the new config above
	as "bfd_elf32_i860_little_vec".
	(targ_selvecs): Define for the new config above
	as "bfd_elf32_i860_vec bfd_elf32_i860_little_vec"

	* bfd/configure.in (bfd_elf32_i860_little_vec): Added recognition
	of new target vec.

	* bfd/configure: Regenerated.

	* opcodes/i860-dis.c: New file.
	(print_insn_i860): New function.
	(print_br_address): New function.
	(sign_extend): New function.
	(BITWISE_OP): New macro.
	(I860_REG_PREFIX): New macro.
	(grnames, frnames, crnames): New structures.

	* opcodes/disassemble.c (ARCH_i860): Define.
	(disassembler): Add check for bfd_arch_i860 to set disassemble
	function to print_insn_i860.

	* include/dis-asm.h (print_insn_i860): Add prototype.

	* opcodes/Makefile.in (CFILES): Added i860-dis.c.
	(ALL_MACHINES): Added i860-dis.lo.
	(i860-dis.lo): New dependences.

	* opcodes/configure.in: New bits for bfd_i860_arch.

	* opcodes/configure: Regenerated.
2000-07-28 21:10:20 +00:00
Hans-Peter Nilsson 1c9e429840 * dis-asm.h (print_insn_cris): Declare. 2000-07-20 15:36:12 +00:00
Nick Clifton 8929e0a70c Applied Stephane Carrez <Stephane.Carrez@worldnet.fr> patches to add support
for m68hc11 and m68hc12 processors.
2000-06-19 01:22:42 +00:00
Alan Modra dcdee3df16 (print_insn_tic54x): Declare. 2000-05-08 11:01:40 +00:00
Jim Wilson 4501dfbc42 IA-64 ELF support. 2000-04-21 20:22:23 +00:00
Alan Modra f5e070bb37 ATMEL AVR microcontroller support. 2000-03-27 08:39:13 +00:00
Alan Modra 58dabf5040 Add IBM 370 support. 2000-02-23 13:52:22 +00:00
Alan Modra d3b7d141ac This lot mainly cleans up `comparison between signed and unsigned' gcc
warnings.  One usused var, and a macro parenthesis fix too.  Also check
input sections are elf when doing gc in elflink.h.
2000-02-21 12:01:26 +00:00
Nick Clifton 483b47749b Add prototypes for ARM register name functions. 2000-02-16 18:20:10 +00:00
Tim Wall f41d3f0687 octets vs bytes changes for binutils 2000-02-03 18:12:54 +00:00
Nick Clifton 7306628577 Add prototype for parse_arm_diassembler_option 2000-01-28 01:54:05 +00:00
Nick Clifton 9703529f4b Add ATPCS support to ARM disassembler.
Document ARM disassembler options.
2000-01-27 22:17:12 +00:00
Nick Clifton 0d28a12178 Add support for documenting target specific disassembler options 2000-01-27 21:44:26 +00:00
Ian Lance Taylor 6b55bdd0c0 1999-12-15 Doug Evans <dje@transmeta.com>
* dis-asm.h: Enclose in extern "C" ifdef __cplusplus.
1999-12-16 01:23:39 +00:00
Ian Lance Taylor de5d479dde 1999-09-04 Steve Chamberlain <sac@pobox.com>
* dis-asm.h (print_insn_pj): Declare.
1999-09-04 17:17:37 +00:00
Nick Clifton 2e07d71fcd Add -M command line switch to objdump - text of switch is passed on to disassembler
Add support for register name set selection ot ARM disassembler.
1999-06-16 02:24:26 +00:00
Richard Henderson a3acbf4694 19990502 sourceware import 1999-05-03 07:29:06 +00:00