Commit Graph

1368 Commits

Author SHA1 Message Date
Nick Clifton de72e93ad9 include/elf
2009-04-30  Nick Clifton  <nickc@redhat.com>

        * common.h (STT_GNU_IFUNC): Define.

elfcpp
2009-04-30  Nick Clifton  <nickc@redhat.com>

        * (enum STT): Add STT_GNU_IFUNC.

gas
2009-04-30  Nick Clifton  <nickc@redhat.com>

        * config/obj-elf.c (obj_elf_type): Add support for a
        gnu_indirect_function type.
        * config/tc-i386.c (tc_i386_fix_adjustable): Do not adjust fixups
        against indirect function symbols.
        * doc/as.texinfo (.type): Document the support for the
        gnu_indirect_function symbol type.
        * NEWS: Mention the new feature.

gas/testsuite
2009-04-30  Nick Clifton  <nickc@redhat.com>

        * gas/elf/elf.exp: Extend type test to include an ifunc symbol.
        Provide an alternative test for targets which do not support ifunc
        symbols.
        (type.s): Add entry for an ifunc symbol.
        (type.e): Add ifunc entry to expected symbol dump.
        (section2.e-armelf): Add  entry for ifunc symbol.
        (type-noifunc.s): New file.
        (type-noifunc.e): New file.

bfd/
2009-04-30  Nick Clifton  <nickc@redhat.com>

        * elf-bfd.h (struct bfd_elf_section_data): Add indirect_relocs
        section pointer.
        (struct elf_obj_data): Add has_ifunc_symbols boolean.
        * elf.c (swap_out_syms): Convert BSF_GNU_INDIRECT_FUNCTION flags
        into a STT_GNU_IFUNC symbol type.
        (_bfd_elf_is_function_type): Accept STT_GNU_IFUNC as a function
        type.
        (_bfd_elf_set_osabi): Set the osasbi field to ELFOSABI_LINUX if
        the binary contains ifunc symbols.
        * elfcode.h (elf_slurp_symbol_table): Translate the STT_GNU_IFUNC
        symbol type into a BSF_GNU_INDIRECT_FUNCTION flag.
        * elf32-i386.c (is_indirect_function): New function.
        (elf_i386_check_relocs): Create an ifunc output section.
        (allocate_dynrelocs): Create dynamic relocs in the ifunc output
        section if necessary.
        (elf_i386_relocate_section): Emit a reloc against an ifunc symbol
        if necessary.
        (elf_i386_add_symbol_hook): New function. Set the
        has_ifunc_symbols field of the elf_obj_data structure if an ifunc
        symbol is encountered.
        (elf_backend_post_process_headers): Define.
        (elf_backend_add_symbol_hook): Define.
        (elf_i386_post_process_headers): Rename to
        elf_i388_fbsd_post_process_headers.
        * elf64-x86_64.c (IS_X86_64_PCREL_TYPE): New macro.
        (is_indirect_function): New function.
        (elf64_x86_64_check_relocs): Create an ifunc output section.
        (allocate_dynrelocs): Create dynamic relocs in the ifunc output
        section if necessary.
        (elf64_x86_64_relocate_section): Emit a reloc against an ifunc
        symbol if necessary.
        (elf_i386_add_symbol_hook): Set the has_ifunc_symbols field of the
        elf_obj_data structure if an ifunc symbol is encountered.
        (elf_backend_post_process_headers): Define.
        * elflink.c (_bfd_elf_adjust_dynamic_symbol): Always create a PLT
        if we have ifunc symbols to handle.
        (get_ifunc_reloc_section_name): New function.  Computes the name
        for an ifunc section.
        (_bfd_elf_make_ifunc_reloc_section): New function.  Creates a
        section to hold ifunc relocs.
        * syms.c (BSF_GNU_INDIRECT_FUNCTION): Define.
        (bfd_print_symbol_vandf): Handle ifunc symbols.
        (bfd_decode_symclass): Likewise.
        * bfd-in2.h: Regenerate.

binutils
2009-04-30  Nick Clifton  <nickc@redhat.com>

        * readelf.c (dump_relocations): Display a relocation against an
        ifunc symbol as if it were a function invocation.
        (get_symbol_type): Handle STT_GNU_IFUNC.

ld
2009-04-30  Nick Clifton  <nickc@redhat.com>

        * NEWS: Mention support for IFUNC symbols.

ld/testsuite
2009-04-30  Nick Clifton  <nickc@redhat.com>

        * ld-ifunc: New directory.
        * ld-ifunc/ifunc.exp: New file: Run the IFUNC tests.
        * ld-ifunc/prog.c: New file.
        * ld-ifunc/lib.c: New file.
2009-04-30 15:47:11 +00:00
Cary Coutant 546065b39f include/elf/
* dwarf2.h (DW_LNE_set_discriminator): New enum value.

binutils/

	* dwarf.c (process_extended_line_op): Add DW_LNE_set_discriminator.
	Add missing newlines to HP extensions.
2009-04-24 18:28:58 +00:00
H.J. Lu fc49eaf437 Update ChangeLog entries. 2009-04-24 16:57:08 +00:00
DJ Delorie 96baa3e74a merge from gcc 2009-04-22 19:09:13 +00:00
Dave Korn e050f18f22 bfd/ChangeLog
2009-04-21  Kai Tietz  <kai.tietz@onevision.com>

	* coff-x86_64.c (PEI_HEADERS): Protect includes.
	(bfd_pe_print_pdata): Remove #ifdef PE variation.
	* pei-x86_64.c (PEI_HEADERS): Define to prevent double
	include in coff-x86_64.c of headers.
	(PDATA_ROW_SIZE): New define.
	(pex_regs[]): New static array.
	(pex64_get_runtime_function): New static function.
	(pex64_get_unwind_info): Likewise.
	(pex64_get_scope_entry): Likewise.
	(pex64_xdata_print_uwd_codes): Likewise.
	(pep_get_section_by_rva): Likewise.
	(pex64_dump_xdata): Likewise.
	(pex64_bfd_print_pdata): Likewise.
	(bfd_pe_print_pdata): Define as pex64_bfd_print_pdata.
	* peXXigen.c (_bfd_pex64_print_pdata): Removed implementation.
	* libpei.h (_bfd_pex64_print_pdata): Removed declaration.

include/ChangeLog

2009-04-21  Kai Tietz  <kai.tietz@onevision.com>

	* coff/pe.h (pex64_runtime_function): New structure.
	(external_pex64_runtime_function): Likewise.
	(pex64_unwind_code): Likewise.
	(external_pex64_unwind_code): Likewise.
	(pex64_unwind_info): Likewise.
	(external_pex64_unwind_info): Likewise.
	(external_pex64_scope): Likewise.
	(pex64_scope): Likewise.
	(pex64_scope_entry):  Likewise.
	(external_pex64_scope_entry): Likewise.
	(PEX64_IS_RUNTIME_FUNCTION_CHAINED): New macro.
	(PEX64_GET_UNWINDDATA_UNIFIED_RVA): Likewise.
	(PEX64_UNWCODE_CODE): Likewise.
	(PEX64_UNWCODE_INFO): Likewise.
	(UWOP_...): Add defines for unwind code.
	(UNW_FLAG_...): Add defined for unwind info flags.
	(PEX64_SCOPE_ENTRY_SIZE): New macro.
	(PEX64_UWI_VERSION): Likewise.
	(PEX64_UWI_FLAGS): Likewise.
	(PEX64_UWI_FRAMEREG): Likewise.
	(PEX64_UWI_FRAMEOFF): Likewise.
	(PEX64_UWI_SIZEOF_UWCODE_ARRAY): Likewise.
	(PEX64_OFFSET_TO_UNWIND_CODE): Likewise.
	(PEX64_OFFSET_TO_HANDLER_RVA): Likewise.
	(PEX64_OFFSET_TO_SCOPE_COUNT): Likewise.
	(PEX64_SCOPE_ENTRY): Likewise.
2009-04-21 02:13:48 +00:00
H.J. Lu 33990d814f bfd/
2009-04-17  H.J. Lu  <hongjiu.lu@intel.com>

	* peXXigen.c (_bfd_XX_print_private_bfd_data_common): Replace
	IMAGE_SUBSYSTEM_EFI_ROM with IMAGE_SUBSYSTEM_SAL_RUNTIME_DRIVER.

binutils/

2009-04-17  H.J. Lu  <hongjiu.lu@intel.com>

	* objcopy.c (set_pe_subsystem): Replace efi-rom with sal-rtd.
	* doc/binutils.texi: Likewise.

include/coff/

2009-04-17  H.J. Lu  <hongjiu.lu@intel.com>

	* pe.h (IMAGE_SUBSYSTEM_EFI_ROM): Renamed to ...
	(IMAGE_SUBSYSTEM_SAL_RUNTIME_DRIVER): This.
2009-04-17 15:03:47 +00:00
Nick Clifton cc0748930b Add new binutils target: moxie 2009-04-16 15:39:46 +00:00
H.J. Lu 01d23ae749 bfd/
2009-04-08  H.J. Lu  <hongjiu.lu@intel.com>

	* elflink.c (elf_link_add_object_symbols): Warn alternate ELF
	machine code.

include/

2009-04-08  H.J. Lu  <hongjiu.lu@intel.com>

	* bfdlink.h (bfd_link_info): Add warn_alternate_em.

ld/

2009-04-08  H.J. Lu  <hongjiu.lu@intel.com>

	* lexsup.c (option_values): Add OPTION_WARN_ALTERNATE_EM.
	(ld_options): Likewise.
	(parse_args): Likewise.

	* ld.texinfo: Document --warn-alternate-em.

	* NEWS: Mention --warn-alternate-em.
2009-04-08 16:04:49 +00:00
DJ Delorie 4e952f53dc [include/elf]
* mep.h (EF_MEP_CPU_C5): New.
[bfd]
	* archures.c: Add bfd_mach_mep_c5.
	* bfd-in2.h: Likewise.
	* cpu-mep.c: Add bfd_c5_arch.
	* elf32-mep.c: Support it.
[gas]
	* config/tc-mep.c: Add UCI/DSP instruction support.  Add C5 support.
	(md_show_usage): Change default endian to little.
	* config/tc-mep.h (TARGET_BYTES_BIG_ENDIAN): Change default to little.
[ld]
	* emulparams/elf32mep.sh: Change default endian to little.
2009-04-08 02:24:19 +00:00
DJ Delorie 93c75f41e4 [bfd]
* elf32-h8300.c (elf32_h8_relax_section): Relax MOVA opcodes.
[gas]
	* tc-h8300.c (do_a_fix_imm): Pass the insn, force relocs for MOVA
	immediates.
	(build_bytes): Pass insn to do_a_fix_imm.
[include/opcode]
	* h8300.h: Add relaxation attributes to MOVA opcodes.
2009-04-07 18:21:21 +00:00
Richard Sandiford cd767078de include/coff/
* xcoff.h (xcoff_link_hash_table): Move to bfd/xcofflink.c.

bfd/
	* xcofflink.c (xcoff_link_hash_table): Moved from include/coff/xcoff.h.
2009-04-01 19:38:11 +00:00
H.J. Lu 80e823e058 2009-04-01 H.J. Lu <hongjiu.lu@intel.com>
* common.h (EM_INTEL178): Removed.
	(EM_INTEL179): Likewise.
	(EM_ETPU): New.
	(EM_SLE9X): Likewise.
	(EM_INTEL181): Likewise.
	(EM_INTEL182): Likewise.
2009-04-01 17:30:35 +00:00
H.J. Lu d9749de766 2009-03-31 H.J. Lu <hongjiu.lu@intel.com>
* common.h (EM_INTEL178): New.
	(EM_INTEL179): Likewise.
	(EM_INTEL180): Likewise.
2009-03-31 21:19:03 +00:00
Ian Lance Taylor 1c0674333c include/elf:
* common.h (SHT_GNU_INCREMENTAL_INPUTS): Define.
elfcpp:
	* elfcpp.h (SHT_GNU_INCREMENTAL_INPUTS): Define.
gold:
	* incremental.cc: New file.
	* Makefile.am (CCFILES): Add incremental.cc.
	* Makefile.in: Rebuild.
2009-03-20 23:37:51 +00:00
Mark Kettenis 2db87fe669 * common.h (NT_OPENBSD_PROCINFO, NT_OPENBSD_AUXV)
(NT_OPENBSD_REGS, NT_OPENBSD_FPREGS, NT_OPENBSD_XFPREGS)
(NT_OPENBSD_WCOOKIE): New defines.
2009-03-18 15:57:17 +00:00
Alan Modra c666186be8 include/
* alloca-conf.h: Revise based on autoconf-2.61, autoconf-2.13
	documentation.
bfd/
	* elf32-m68hc1x.c: Include alloca-conf.h.
	* xsym.c: Likewise.
	* elf64-hppa.c: Likewise.  Remove existing #if's handling alloca.
	* som.c: Likewise.
	* Makefile.am: Run "make dep-am".
	* Makefile.in: Regenerate.
binutils/
	* sysdep.h: Include alloca-conf.h instead of config.h and remove
	existing #if's handling alloca.
	* Makefile.am: Run "make dep-am".
	* Makefile.in: Regenerate.
gas/
	* as.h: Include alloca-conf.h instead of config.h and remove
	existing #if's handling alloca.
	* Makefile.am: Run "make dep-am".
	* Makefile.in: Regenerate.
opcodes/
	* Makefile.am: Run "make dep-am".
	* Makefile.in: Regenerate.
	* openrisc-opc.c: Regenerate.
ld/
	* ld.h: Remove alloca handling.
2009-03-18 11:27:16 +00:00
DJ Delorie cb55223679 merge from gcc 2009-03-18 00:07:38 +00:00
Jan Kratochvil fe5c0c73f3 include/elf/
* common.h (AT_RANDOM): Define.
2009-03-16 09:45:33 +00:00
Richard Sandiford c7cf32ee27 include/coff/
* xcoff.h (XCOFF_EXPALL, XCOFF_EXPFULL): New flags.
	(xcoff_loader_info): Add auto_export_flags.

bfd/
	* bfd-in.h (bfd_xcoff_size_dynamic_sections): Replace the
	bfd_boolean export_defineds parameter with an unsigned int
	auto_export_flags parameter.
	* bfd-in2.h: Regenerate.
	* xcofflink.c (xcoff_archive_contains_shared_object_p): New function,
	split out from xcoff_build_ldsyms.
	(xcoff_covered_by_expall_p): New function.
	(xcoff_auto_export_p): New function, split out from xcoff_build_ldsyms
	but with extra code to handle -bexpfull and -bexpall.
	(xcoff_mark_auto_exports): New function.
	(xcoff_build_ldsyms): Use xcoff_auto_export_p to decide whether
	a function should be automatically exported.
	(bfd_xcoff_size_dynamic_sections): Replace the export_defineds
	parameter with an auto_export_flags parameter.  Update ldinfo
	accordingly.  Use xcoff_mark_auto_exports to mark all automatically-
	exported symbols.

ld/
	* emultempl/aix.em (auto_export_flags): New variable.
	(explicit_auto_export_flags): Likewise.
	(OPTION_EXPALL, OPTION_EXPFULL): New enum values.
	(OPTION_NOEXPALL, OPTION_NOEXPFULL): Likewise.
	(gld${EMULATION_NAME}_add_options): Add -bexpall, -bexpfull,
	-bnoexpall and -bnoexpfull.
	(gld${EMULATION_NAME}_handle_option): Handle them.
	(gld${EMULATION_NAME}_before_allocation): Update the call to
	bfd_size_dynamic_sections.

ld/testsuite/
	* ld-powerpc/aix-export-1-all.dd, ld-powerpc/aix-export-1-full.dd,
	ld-powerpc/aix-export-1a.s, ld-powerpc/aix-export-1b.s: New tests.
	* ld-powerpc/aix52.exp: Run them.
2009-03-14 09:35:45 +00:00
Richard Sandiford 443e66934c include/coff/
* internal.h (C_AIX_WEAKEXT): New macro.
	(C_WEAKEXT): Use the GNU definition in the generic part of the file,
	and conditionally reset it to C_AIX_WEAKEXT in the XCOFF part of
	the file.
	(CSECT_SYM_P): New macro.
	* xcoff.h (L_WEAK): Define.
	(EXTERN_SYM_P): New macro.

bfd/
	* coffcode.h (coff_pointerize_aux_hook): Update CSECT_SYM_P to
	check whether a symbol has csect information.
	(coff_print_aux): Likewise.
	* coff-rs6000.c (_bfd_xcoff_swap_aux_in): Handle auxillary csect
	information for C_AIX_WEAKEXT too.
	(_bfd_xcoff_swap_aux_out): Likewise.
	(xcoff_reloc_type_br): Handle defweak symbols too.
	* coff64-rs6000.c (_bfd_xcoff64_swap_aux_in): Handle auxillary csect
	information for C_AIX_WEAKEXT too.
	(_bfd_xcoff64_swap_aux_out): Likewise.
	(xcoff64_reloc_type_br): Handle defweak symbols too.
	* coffgen.c (coff_print_symbol): Handle auxillary function
	information for C_AIX_WEAKEXT too.
	* xcofflink.c (_bfd_xcoff_canonicalize_dynamic_symtab): Set BSF_WEAK
	instead of BSF_GLOBAL if the L_WEAK flag is set.
	(xcoff_dynamic_definition_p): New function.
	(xcoff_link_add_dynamic_symbols): Use it to decide whether ldsym
	defines h.  Don't change h if ldsym isn't the definition.  Otherwise,
	always take the symbol class from the ldsym.  Use weak bfd symbol
	types for weak ldsyms.
	(xcoff_link_add_symbols): Use CSECT_SYM_P and EXTERN_SYM_P.
	Fix the check for whether a definition is from a shared object.
	Allow redefinitions of weak symbols.
	(xcoff_link_check_ar_symbols): Use EXTERN_SYM_P.
	(xcoff_keep_symbol_p): Likewise.
	(bfd_xcoff_size_dynamic_sections): Use CSECT_SYM_P.
	(xcoff_link_input_bfd): Use CSECT_SYM_P and EXTERN_SYM_P.
	Add .loader entries for C_AIX_WEAKEXT as well as C_EXT symbols,
	but mark them as L_WEAK.
	(xcoff_write_global_symbol): Treat weak symbols as C_AIX_WEAKEXT
	instead of C_EXT if C_AIX_WEAKEXT == C_WEAKEXT.

gas/
	* config/tc-ppc.c (ppc_frob_symbol): Add csect information for
	C_AIX_WEAKEXT too.

ld/testsuite/
	* ld-powerpc/aix-glink-2a.s, ld-powerpc/aix-glink-2a.ex,
	ld-powerpc/aix-glink-2b.s, ld-powerpc/aix-glink-2c.s,
	ld-powerpc/aix-glink-2c.ex, ld-powerpc/aix-glink-2d.s,
	ld-powerpc/aix-glink-2-32.dd, ld-powerpc/aix-glink-2-64.dd,
	ld-powerpc/aix-weak-1a.s, ld-powerpc/aix-weak-1b.s,
	ld-powerpc/aix-weak-1-rel.hd, ld-powerpc/aix-weak-1-rel.nd,
	ld-powerpc/aix-weak-1-dso.hd, ld-powerpc/aix-weak-1-dso.nd,
	ld-powerpc/aix-weak-1-dso.dnd, ld-powerpc/aix-weak-1.ex,
	ld-powerpc/aix-weak-2a.s, ld-powerpc/aix-weak-2a.ex,
	ld-powerpc/aix-weak-2a.nd, ld-powerpc/aix-weak-2b.s,
	ld-powerpc/aix-weak-2b.nd, ld-powerpc/aix-weak-2c.s,
	ld-powerpc/aix-weak-2c.ex, ld-powerpc/aix-weak-2c.nd,
	ld-powerpc/aix-weak-2c.od, ld-powerpc/aix-weak-3a.s,
	ld-powerpc/aix-weak-3a.ex, ld-powerpc/aix-weak-3b.s,
	ld-powerpc/aix-weak-3b.ex, ld-powerpc/aix-weak-3-32.d,
	ld-powerpc/aix-weak-3-32.dd, ld-powerpc/aix-weak-3-64.d,
	ld-powerpc/aix-weak-3-64.dd: New tests.
	* ld-powerpc/aix52.exp: Run them.  Replace tmp/aix-* with
	tmp/aix64-* in 64-bit ld options.
2009-03-14 09:34:26 +00:00
Richard Sandiford 07aa5b7d9e include/coff/
* xcoff.h (XCOFF_ALLOCATED): New flag.

bfd/
	* xcofflink.c (xcoff_mark): When walking the relocations,
	only mark the target symbol or the target section, not both.
	(xcoff_final_definition_p): New function.
	(xcoff_keep_symbol_p): Use it to check whether an external XCOFF
	symbol is a valid definition of the associated output symbol.
	Use XCOFF_ALLOCATED to stop the same hash table entry having
	two output symbols.
	(bfd_xcoff_size_dynamic_sections): Set XCOFF_ALLOCATED when
	keeping a symbol.
	(xcoff_link_input_bfd): Use xcoff_final_definition_p.

ld/testsuite/
	* ld-powerpc/aix-no-dup-syms-1a.s, ld-powerpc/aix-no-dup-syms-1b.s,
	ld-powerpc/aix-no-dup-syms-1.ex, ld-powerpc/aix-no-dup-syms-1.im,
	ld-powerpc/aix-no-dup-syms-1-dso.dnd,
	ld-powerpc/aix-no-dup-syms-1-dso.drd,
	ld-powerpc/aix-no-dup-syms-1-dso.nd,
	ld-powerpc/aix-no-dup-syms-1-dso.rd,
	ld-powerpc/aix-no-dup-syms-1-rel.nd,
	ld-powerpc/aix-no-dup-syms-1-rel.rd: New tests.
	* ld-powerpc/aix52.exp: Run them.
2009-03-14 09:33:38 +00:00
Richard Sandiford 8365d22c7b include/coff/
* xcoff.h (XCOFF_CALLED, XCOFF_IMPORT): Update comments.
	(XCOFF_WAS_UNDEFINED): New flag.
	(xcoff_link_hash_table): Add an "rtld" field.

bfd/
	* coff-rs6000.c (xcoff_ppc_relocate_section): Report relocations
	against undefined symbols if the symbol's XCOFF_WAS_UNDEFINED
	flag is set.  Assert that all undefined symbols are either
	imported or defined by a dynamic object.
	* coff64-rs6000.c (xcoff64_ppc_relocate_section): Likewise.
	* xcofflink.c (xcoff_link_add_symbols): Extend function-symbol
	handling to all relocations.  Only set XCOFF_CALLED for function
	symbols.
	(xcoff_find_function): New function, split out from...
	(bfd_xcoff_export_symbol) ...here.
	(xcoff_set_import_path): New function, split out from...
	(bfd_xcoff_import_symbol): ...here.  Remove assertion for old
	meaning of XCOFF_CALLED.
	(xcoff_mark_symbol): If we mark an undefined and unimported
	symbol, find some way of defining it.  If the symbol is a function
	descriptor, fill in its definition automatically.  If the symbol
	is a function, mark its descriptor and allocate room for global
	linkage code.  Otherwise mark the symbol as implicitly imported.
	Move the code for creating function descriptors from...
	(xcoff_build_ldsyms): ...here.  Use XCOFF_WAS_UNDEFINED to
	check for symbols that were implicitly defined.
	(xcoff_mark): Don't count any dynamic relocations against
	function symbols.
	(bfd_xcoff_size_dynamic_sections): Save the rtld parameter
	in the xcoff link info.
	(xcoff_link_input_bfd): Remove handling of undefined and
	unexported symbols.

ld/
	* emultempl/aix.em (gld${EMULATION_NAME}_handle_option): Make
	-berok and -bernotok control link_info.unresolved_syms_in_objects
	and link_info.unresolved_syms_in_shared_libs instead of
	force_make_executable.

ld/testsuite/
	* ld-powerpc/aix-glink-1.ex, ld-powerpc/aix-glink-1.s,
	ld-powerpc/aix-glink-1-32.dd, ld-powerpc/aix-glink-1-64.dd,
	ld-powerpc/aix-glink-1-32.d, ld-powerpc/aix-glink-1-64.d: New tests.
	* ld-powerpc/aix52.exp: Run them.
2009-03-14 09:17:31 +00:00
Dave Korn c298c9bdbf include/ChangeLog
2009-03-12  Dave Korn  <dave.korn.cygwin@gmail.com>

	* coff/internal.h (struct internal_extra_pe_aouthdr):  Correct type
	of DllCharacteristics flags field to unsigned.
	* coff/pe.h (IMAGE_DLL_CHARACTERISTICS_DYNAMIC_BASE,
	IMAGE_DLL_CHARACTERISTICS_DYNAMIC_BASE,
	IMAGE_DLL_CHARACTERISTICS_NX_COMPAT,
	IMAGE_DLLCHARACTERISTICS_NO_ISOLATION,
	IMAGE_DLLCHARACTERISTICS_NO_SEH,
	IMAGE_DLLCHARACTERISTICS_NO_BIND,
	IMAGE_DLLCHARACTERISTICS_WDM_DRIVER,
	IMAGE_DLLCHARACTERISTICS_TERMINAL_SERVER_AWARE):  New macros to
	define flag bit values for DllCharacteristics field of PEAOUTHDR,
	PEPAOUTHDR.

ld/ChangeLog
2009-03-12  Dave Korn  <dave.korn.cygwin@gmail.com>
            Danny Smith  <dannysmith@users.sourceforge.net>

	* emultmpl/pe.em (pe_dll_characteristics): New variable.
	(OPTION_DYNAMIC_BASE, OPTION_FORCE_INTEGRITY, OPTION_NX_COMPAT,
	OPTION_NO_ISOLATION. OPTION_NO_SEH, OPTION_NO_BIND,
	OPTION_WDM_DRIVER, OPTION_TERMINAL_SERVER_AWARE):
	New macros for options to set DllCharacteristics flag bits.
	(gld${EMULATION_NAME}_add_options): Add dynamicbase, forceinteg,
	nxcompat, no-isolation, no-seh, no-bind, wdmdriver, tsaware options.
	(init): Add DllCharacteristics field.
	(gld_${EMULATION_NAME}_list_options): List new options.
	(gld${EMULATION_NAME}_handle_option): Handle new options.
	* emultmpl/pep.em (pe_dll_characteristics): New variable.
	(OPTION_DYNAMIC_BASE, OPTION_FORCE_INTEGRITY, OPTION_NX_COMPAT,
	OPTION_NO_ISOLATION. OPTION_NO_SEH, OPTION_NO_BIND,
	OPTION_WDM_DRIVER, OPTION_TERMINAL_SERVER_AWARE):
	New macros for options to set DllCharacteristics flags.
	(gld${EMULATION_NAME}_add_options): Add dynamicbase, forceinteg,
	nxcompat,no-isolation, no-seh, no-bind, wdmdriver, tsaware options.
	(init): Add DllCharacteristics field.
	(gld_${EMULATION_NAME}_list_options): List new options.
	(gld${EMULATION_NAME}_handle_option): Handle new options.
	* ldtexinfo : Document dynamicbase, forceinteg,	nxcompat,
	no-isolation, no-seh, no-bind, wdmdriver, tsaware options.
2009-03-14 03:30:26 +00:00
Alan Modra 926aac359f include/opcode/
* ppc.h (ppc_parse_cpu): Declare.
opcodes/
	* ppc-dis.c: Include "opintl.h".
	(struct ppc_mopt, ppc_opts): New.
	(ppc_parse_cpu): New function.
	(powerpc_init_dialect): Use it.
	(print_ppc_disassembler_options): Dump options from ppc_opts.
	Internationalize message.
gas/
	* config/tc-ppc.c (parse_cpu): Delete.
	(md_parse_option, ppc_machine): Use ppc_parse_cpu.
gas/testsuite/
	* gas/ppc/altivec_and_spe.d (objdump): Add -Maltivec.
	* gas/ppc/common.d: Adjust for -Mcom not including -Mppc.
2009-03-10 06:53:45 +00:00
Alan Modra 538fc09416 include/elf/
* ppc.h (R_PPC_TLSGD, R_PPC_TLSLD): Add new relocs.
	* ppc64.h (R_PPC64_TLSGD, R_PPC64_TLSLD): Add new relocs.
bfd/
	* reloc.c (BFD_RELOC_PPC_TLSGD, BFD_RELOC_PPC_TLSLD): New.
	* section.c (struct bfd_section): Add has_tls_get_addr_call.
	(BFD_FAKE_SECTION): Init new flag.
	* ecoff.c (bfd_debug_section): Likewise.
	* bfd-in2.h: Regenerate.
	* libbfd.h: Regenerate.
	* elf32-ppc.c (ppc_elf_howto_raw): Add R_PPC_TLSGD and R_PPC_TLSLD.
	(ppc_elf_reloc_type_lookup): Handle new relocs.
	(ppc_elf_check_relocs): Set has_tls_get_addr_call on finding such
	without marker relocs.
	(ppc_elf_tls_optimize): Allow out-of-order __tls_get_addr relocs
	if section has no old-style calls.
	(ppc_elf_relocate_section): Set tls_mask for non-tls relocs too.
	Don't try to optimize new-style __tls_get_addr call when handling
	arg setup relocs.  Instead do so for R_PPC_TLSGD and R_PPC_TLSLD
	relocs.
	* elf64-ppc.c (ppc64_elf_howto_raw): Add R_PPC64_TLSGD, R_PPC64_TLSLD.
	(ppc64_elf_reloc_type_lookup): Handle new relocs.
	(ppc64_elf_check_relocs): Set has_tls_get_addr_call on finding such
	without marker relocs.
	(ppc64_elf_tls_optimize): Allow out-of-order __tls_get_addr relocs
	if section has no old-style calls.  Set toc_ref for new relocs as
	appropriate.
	(ppc64_elf_relocate_section): Set tls_mask for non-tls relocs too.
	Don't try to optimize new-style __tls_get_addr call when handling
	arg setup relocs.  Instead do so for R_PPC_TLSGD and R_PPC_TLSLD
	relocs.
gas/
	* config/tc-ppc.c (ppc_elf_suffix): Error if ppc32 tls got relocs
	have non-zero addend.
	(md_assemble): Parse args of __tls_get_addr calls.
	(md_apply_fix): Handle BFD_RELOC_PPC_TLSGD and BFD_RELOC_PPC_TLSLD.
ld/testsuite/
	* ld-powerpc/tlsmark.s, * ld-powerpc/tlsmark.d: New test.
	* ld-powerpc/tlsmark32.s, * ld-powerpc/tlsmark32.d: New test.
	* ld-powerpc/powerpc.exp: Run them.
2009-03-04 05:50:48 +00:00
Nick Clifton 753a03bf8e Add support for Score7 architecture. 2009-03-02 10:33:07 +00:00
Peter Bergner c636f27d48 gas/
* config/tc-ppc.c (pre_defined_registers): Add "f32" to "f63",
	"f.32" to "f.63", "vs0" to "vs63" and "vs.0" to "vs.63".
	(parse_cpu): Extend -mpower7 to accept power7 and isel instructions.

gas/testsuite/
	* gas/ppc/e500mc.d ("wait", "waitsrv", "waitimpl"): Add tests.
	* gas/ppc/e500mc.s: Likewise.
	* gas/ppc/power6.d ("cdtbcd", "cbcdtd", "addg6s"): Add tests.
	* gas/ppc/power6.s: Likewise.
	* gas/ppc/power7.d ("lfdpx", "mffgpr", "mftgpr"): Remove invalid tests.
	("wait", "waitsrv", "waitimpl", "divwe", "divwe.", "divweo", "divweo.",
	"divweu", "divweu.", "divweuo", "divweuo.", "bpermd", "popcntw",
	"popcntd", "ldbrx", "stdbrx", "lfiwzx", "lfiwzx", "fcfids", "fcfids.",
	"fcfidus", "fcfidus.", "fctiwu", "fctiwu.", "fctiwuz", "fctiwuz.",
	"fctidu", "fctidu.", "fctiduz", "fctiduz.", "fcfidu", "fcfidu.",
	"ftdiv", "ftdiv", "ftsqrt", "ftsqrt", "dcbtt", "dcbtstt", "dcffix",
	"dcffix.", "lbarx", "lbarx", "lbarx", "lharx", "lharx", "lharx",
	"stbcx.", "sthcx.", "fre", "fre.", "fres", "fres.", "frsqrte",
	"frsqrte.", "frsqrtes", "frsqrtes.", "isel"): Add tests.
	* gas/ppc/power7.s: Likewise.
	* gas/ppc/vsx.d: New test.
	* gas/ppc/vsx.s: Likewise.
	* gas/ppc/ppc.exp: Run it.

include/opcode/
	* ppc.h (PPC_OPCODE_POWER7): New.

opcodes/
	* ppc-dis.c (powerpc_init_dialect): Extend -Mpower7 to disassemble
	the power7 and the isel instructions.
	* ppc-opc.c (insert_xc6, extract_xc6): New static functions.
	(insert_dm, extract_dm): Likewise.
	(XB6): Update comment to include XX2 form.
	(WC, XC6, SHW, DMEX, UIM, XX2, XX3RC, XX4, XX2_MASK, XX2UIM_MASK,
	XX2BF_MASK, XX3BF_MASK, XX3SHW_MASK, XX4_MASK, XWC_MASK, POWER7): New.
	(RemoveXX3DM): Delete.
	(powerpc_opcodes): <"lfdp", "lfdpx", "mcrxr", "mftb", "mffgpr",
	"mftgpr">: Deprecate for POWER7.
	<"fres", "fres.", "frsqrtes", "frsqrtes.", "fre", "fre.", "frsqrte",
	"frsqrte.">: Deprecate the three operand form and enable the two
	operand form for POWER7 and later.
	<"wait">: Extend to accept optional parameter.  Enable for POWER7.
	<"waitsrv", "waitimpl">: Add extended opcodes.
	<"ldbrx", "stdbrx">: Enable for POWER7.
	<"cdtbcd", "cbcdtd", "addg6s">: Add POWER6 opcodes.
	<"bpermd", "dcbtstt", "dcbtt", "dcffix.", "dcffix", "divde.", "divde",
	"divdeo.", "divdeo", "divdeu.", "divdeu", "divdeuo.", "divdeuo",
	"divwe.", "divwe", "divweo.", "divweo", "divweu.", "divweu", "divweuo.",
	"divweuo", "fcfids.", "fcfids", "fcfidu.", "fcfidu", "fcfidus.",
	"fcfidus", "fctidu.", "fctidu", "fctiduz.", "fctiduz", "fctiwu.",
	"fctiwu", "fctiwuz.", "fctiwuz", "ftdiv", "ftsqrt", "lbarx", "lfiwzx",
	"lharx", "popcntd", "popcntw", "stbcx.", "sthcx.">: Add POWER7 opcodes.
	<"lxsdux", "lxsdx", "lxvdsx", "lxvw4ux", "lxvw4x", "stxsdux", "stxsdx",
	"stxvw4ux", "stxvw4x", "xsabsdp", "xsadddp", "xscmpodp", "xscmpudp",
	"xscpsgndp", "xscvdpsp", "xscvdpsxds", "xscvdpsxws", "xscvdpuxds",
	"xscvdpuxws", "xscvspdp", "xscvsxddp", "xscvuxddp", "xsdivdp",
	"xsmaddadp", "xsmaddmdp", "xsmaxdp", "xsmindp", "xsmsubadp",
	"xsmsubmdp", "xsmuldp", "xsnabsdp", "xsnegdp", "xsnmaddadp",
	"xsnmaddmdp", "xsnmsubadp", "xsnmsubmdp", "xsrdpi", "xsrdpic",
	"xsrdpim", "xsrdpip", "xsrdpiz", "xsredp", "xsrsqrtedp", "xssqrtdp",
	"xssubdp", "xstdivdp", "xstsqrtdp", "xvabsdp", "xvabssp", "xvadddp",
	"xvaddsp", "xvcmpeqdp.", "xvcmpeqdp", "xvcmpeqsp.", "xvcmpeqsp",
	"xvcmpgedp.", "xvcmpgedp", "xvcmpgesp.", "xvcmpgesp", "xvcmpgtdp.",
	"xvcmpgtdp", "xvcmpgtsp.", "xvcmpgtsp", "xvcpsgnsp", "xvcvdpsp",
	"xvcvdpsxds", "xvcvdpsxws", "xvcvdpuxds", "xvcvdpuxws", "xvcvspdp",
	"xvcvspsxds", "xvcvspsxws", "xvcvspuxds", "xvcvspuxws", "xvcvsxddp",
	"xvcvsxdsp", "xvcvsxwdp", "xvcvsxwsp", "xvcvuxddp", "xvcvuxdsp",
	"xvcvuxwdp", "xvcvuxwsp", "xvdivdp", "xvdivsp", "xvmaddadp",
	"xvmaddasp", "xvmaddmdp", "xvmaddmsp", "xvmaxdp", "xvmaxsp",
	"xvmindp", "xvminsp", "xvmovsp", "xvmsubadp", "xvmsubasp", "xvmsubmdp",
	"xvmsubmsp", "xvmuldp", "xvmulsp", "xvnabsdp", "xvnabssp", "xvnegdp",
	"xvnegsp", "xvnmaddadp", "xvnmaddasp", "xvnmaddmdp", "xvnmaddmsp",
	"xvnmsubadp", "xvnmsubasp", "xvnmsubmdp", "xvnmsubmsp", "xvrdpi",
	"xvrdpic", "xvrdpim", "xvrdpip", "xvrdpiz", "xvredp", "xvresp",
	"xvrspi", "xvrspic", "xvrspim", "xvrspip", "xvrspiz", "xvrsqrtedp",
	"xvrsqrtesp", "xvsqrtdp", "xvsqrtsp", "xvsubdp", "xvsubsp", "xvtdivdp",
	"xvtdivsp", "xvtsqrtdp", "xvtsqrtsp", "xxland", "xxlandc", "xxlnor",
	"xxlor", "xxlxor", "xxmrghw", "xxmrglw", "xxsel", "xxsldwi", "xxspltd",
	"xxspltw", "xxswapd">: Add VSX opcodes.
2009-02-26 22:07:33 +00:00
H.J. Lu be6f5dfdc7 2009-02-23 H.J. Lu <hongjiu.lu@intel.com>
* common.h (STB_LOPROC): Replace Application-specific with
	Processor-specific in comments.
	(STB_HIPROC): Likewise.
	(STT_LOPROC): Likewise.
	(STT_HIPROC): Likewise.
2009-02-24 01:43:49 +00:00
Doug Evans eea6c2c9c3 * i386.h: Add comment regarding sse* insns and prefixes. 2009-02-06 23:14:34 +00:00
Joseph Myers 0462e8847a bfd:
2009-02-03  Sandip Matte  <sandip@rmicorp.com>

	* aoutx.h (NAME (aout, machine_type)): Handle bfd_mach_mips_xlr.
	* archures.c (bfd_mach_mips_xlr): Define.
	* bfd-in2.h: Regenerate.
	* cpu-mips.c (I_xlr): Define.
	(arch_info_struct): Add XLR entry.
	* elfxx-mips.c (_bfd_elf_mips_mach): Handle E_MIPS_MACH_XLR.
	(mips_set_isa_flags): Handle bfd_mach_mips_xlr
	(mips_mach_extensions): Add XLR entry.

binutils:
2009-02-03  Sandip Matte  <sandip@rmicorp.com>

	* readelf.c (get_machine_flags): Handle E_MIPS_MACH_XLR.

gas:
2009-02-03  Sandip Matte  <sandip@rmicorp.com>

	* config/tc-mips.c (macro): Handle M_MSGSND, M_MSGLD, M_MSGLD_T,
	M_MSGWAIT and M_MSGWAIT_T.
	(mips_cpu_info_table): Add XLR entry.
	* doc/c-mips.texi (-march): Document xlr.

gas/testsuite:
2009-02-03  Sandip Matte  <sandip@rmicorp.com>

	* gas/mips/mips.exp (xlr): New architecture.
	(xlr-ext): Run test.
	* gas/mips/xlr-ext.d, gas/mips/xlr-ext.s: New.

include/elf:
2009-02-03  Sandip Matte  <sandip@rmicorp.com>

	* mips.h (E_MIPS_MACH_XLR): Define.

include/opcode:
2009-02-03  Sandip Matte  <sandip@rmicorp.com>

	* mips.h (INSN_XLR): Define.
	(INSN_CHIP_MASK): Update.
	(CPU_XLR): Define.
	(OPCODE_IS_MEMBER): Update.
	(M_MSGSND, M_MSGLD, M_MSGLD_T, M_MSGWAIT, M_MSGWAIT_T): Define.

opcodes:
2009-02-03  Sandip Matte  <sandip@rmicorp.com>

	* mips-dis.c (mips_cp0_names_xlr, mips_cp0sel_names_xlr): Define.
	(mips_arch_choices): Add XLR entry.
	* mips-opc.c (XLR): Define.
	(mips_builtin_opcodes): Add XLR instructions.
2009-02-03 18:16:04 +00:00
Nick Clifton 18e271a5ff M68K TLS support.
ld/testsuite/
        * ld-m68k/got-multigot-12-13-14-34-35-ok.d: Update.
        * ld-m68k/got-multigot-14-ok.d: Update.
        * ld-m68k/m68k-got.exp: Update.
        * ld-m68k/got-negative-12-13-14-34-ok.d: Update.
        * ld-m68k/got-negative-14-ok.d: Update.
        * ld-m68k/tls-gd-1.d, ld-m68k/tls-gd-2.d: New tests.
        * ld-m68k/tls-gd-ie-1.d, ld-m68k/tls-ie-1.d: New tests.
        * ld-m68k/tls-ld-1.d, ld-m68k/tls-ld-2.d: New tests.
        * ld-m68k/tls-ld-1.s, ld-m68k/tls-ld-2.s, ld-m68k/tls-le-1.s:
        New test sources.
        * ld-m68k/tls-no-1.s, ld-m68k/tls-gd-ie-1.s, ld-m68k/tls-gd-1.s:
        New test sources.
        * ld-m68k/tls-gd-2.s, ld-m68k/tls-ie-1.s: New test sources.
        * ld-m68k/m68k.exp: Run new tests.
        (merge isa-a isa-a:nodiv): Fix.

        gas/testsuite/
        * gas/m68k/tls-gd-3.d, gas/m68k/tls-gd-3.s: New test.
        * gas/m68k/all.exp: Run it.

        gas/
        * config/m68k-parse.h (enum pic_relocation): Add values for TLS
        relocations.
        * config/m68k-parse.y (yylex): Parse TLS relocations.
        * config/tc-m68k.c (m68k_elf_cons): New static function.
        (md_pseudo_table): Use it.
        (get_reloc_code, tc_m68k_fix_adjustable, tc_gen_reloc): Handle TLS
        relocations.
        (md_apply_fix): Fix to set thread local flag.
        (m68k_elf_suffix): New static function; helper for m68k_elf_cons.

        include/elf/
        * m68k.h: Map TLS relocations to numbers.

        bfd/
        * bfd-in2.h: Regenerate.
        * elf32-m68k.c: Handle 2-slot GOT entries.  Rename variables and
        fields from n_entries to n_slots where appropriate, update comments.
        (HOWTO): Add TLS relocations.
        (reloc_map): Map BFD_RELOC_68K_TLS_* to R_68K_TLS_*.
        (enum elf_m68k_got_offset_size): New enum.
        (struct elf_m68k_got_entry.type): Move field to ...
        (struct elf_m68k_got_entry_key): ... here.  Update all uses.
        (elf_m68k_reloc_got_type, elf_m68k_reloc_got_offset_size): New static
        functions.
        (elf_m68k_reloc_got_n_entries, elf_m68k_reloc_tls_p): New static
        functions.
        (struct elf_m68k_got): merge rel_8o_n_entries and rel_8o_16o_n_entries
        fields into n_entries array.  Update comments.
        (elf_m68k_init_got): Simplify, update all uses.
        (elf_m68k_init_got_entry_key): Handle R_68K_TLS_LDM32 reloc, update.
        (ELF_M68K_REL_8O_MAX_N_ENTRIES_IN_GOT): Adjust to handle 2-slot
        GOT entries; update name, update all uses.
        (ELF_M68K_REL_8O_16O_MAX_N_ENTRIES_IN_GOT): Ditto.
        (elf_m68k_get_got_entry): Update.
        (elf_m68k_update_got_entry_type): Rewrite to handle TLS GOT entries,
        simplify.
        (elf_m68k_remove_got_entry_type): Simplify.
        (elf_m68k_add_entry_to_got, elf_m68k_can_merge_gots_1): Update.
        (elf_m68k_can_merge_gots): Update.
        (elf_m68k_merge_gots_1, elf_m68k_merge_gots): Update.
        (struct elf_m68k_finalize_got_offsets_arg): Rewrite to handle 2-slot
        GOT entries, simplify.
        (elf_m68k_finalize_got_offsets_1, elf_m68k_finalize_got_offsets): Same.
        (struct elf_m68k_partition_multi_got_arg): Add slots_relas_diff
        field, remove obsoleted local_n_entries field.
        (elf_m68k_partition_multi_got_2): New static function.
        (elf_m68k_partition_multi_got_1, elf_m68k_partition_multi_got): Use it;
        update.
        (elf_m68k_remove_got_entry_type): Update.
        (elf_m68k_install_rela, dtpoff_base, tpoff): New static functions.
        (elf_m68k_check_relocs): Handle TLS relocations.  Remove unnecessary
        update of sgot->size and srelgot->size.
        (elf_m68k_gc_sweep_hook): Update.
        (elf_m68k_install_rela, dtpoff_base, tpoff): New static functions.
        (elf_m68k_relocate_section, elf_m68k_finish_dynamic_symbol): Handle
        TLS relocations.
        * reloc.c (BFD_RELOC_68K_TLS_*): Declare TLS relocations.
        * libbfd.h (bfd_reloc_code_real_names): Add BFD_RELOC_68K_TLS_*.
2009-02-03 14:36:47 +00:00
Doug Evans 9c87160882 fix typo in previous entry 2009-01-29 00:37:12 +00:00
Doug Evans 88db8cbb6a * opcode/i386.h: Add multiple inclusion protection.
(EAX_REG_NUM,ECX_REG_NUM,EDX_REGNUM,EBX_REG_NUM,ESI_REG_NUM)
	(EDI_REG_NUM): New macros.
	(MODRM_MOD_FIELD,MODRM_REG_FIELD,MODRM_RM_FIELD): New macros.
	(SIB_SCALE_FIELD,SIB_INDEX_FIELD,SIB_BASE_FIELD): New macros.
	(REG_PREFIX_P): New macro.

	* amd64-tdep.h (amd64_displaced_step_copy_insn): Declare.
	(amd64_displaced_step_fixup): Declare.
	* amd64-tdep.c: #include opcode/i386.h, dis-asm.h.
	(amd64_arch_regmap): Move out of amd64_analyze_stack_align
	and make static global.
	(amd64_arch_regmap_len): New static global.
	(amd64_arch_reg_to_regnum): New function.
	(struct amd64_insn): New struct.
	(struct displaced_step_closure): New struct.
	(onebyte_has_modrm,twobyte_has_modrm): New static globals.
	(rex_prefix_p,skip_prefixes)
	(amd64_insn_length_fprintf,amd64_insn_length_init_dis)
	(amd64_insn_length,amd64_get_unused_input_int_reg)
	(amd64_get_insn_details,fixup_riprel,fixup_displaced_copy)
	(amd64_displaced_step_copy_insn)
	(amd64_absolute_jmp_p,amd64_absolute_call_p,amd64_ret_p)
	(amd64_call_p,amd64_breakpoint_p,amd64_syscall_p)
	(amd64_displaced_step_fixup): New functions.
	* amd64-linux-tdep.c: #include arch-utils.h.
	(amd64_linux_init_abi): Install displaced stepping support.

	* gdb.arch/amd64-disp-step.S: New file.
	* gdb.arch/amd64-disp-step.exp: New file.
	* gdb.arch/i386-disp-step.S: New file.
	* gdb.arch/i386-disp-step.exp: New file.
2009-01-29 00:29:53 +00:00
Andrew Stubbs c309a17b32 2009-01-15 Andrew Stubbs <ams@codesourcery.com>
Julian Brown   <julian@codesourcery.com>

	bfd/
	* elf-bfd.h (NUM_KNOWN_OBJ_ATTRIBUTES): Set to 71 to include all known
	ARM attributes in ABI 2.07.
	* elf32-arm.c (get_secondary_compatible_arch): New function.
	(set_secondary_compatible_arch): New function.
	(tag_cpu_arch_combine): New function.
	(elf32_arm_copy_one_eabi_other_attribute): Delete function.
	(elf32_arm_copy_eabi_other_attribute_list): Delete function.
	(elf32_arm_merge_eabi_attributes): Rename order_312 to order_021 to
	make it fit with order_01243.
	Add support for Tag_also_compatible_with,
	Tag_CPU_unaligned_access, Tag_T2EE_use, Tag_Virtualization_use,
	Tag_MPextension_use, Tag_nodefaults and Tag_conformance.
	Improve/tidy up support for Tag_CPU_raw_name, Tag_CPU_name,
	Tag_CPU_arch, Tag_ABI_HardFP_use, Tag_VFP_HP_extension,
	Tag_ABI_FP_denormal, Tag_ABI_PCS_GOT_use, Tag_ABI_align8_needed,
	Tag_VFP_arch and Tag_ABI_FP_16bit_format.
	Rework the way unknown attributes are handled.
	Defer errors until all attributes have been processed.

	gas/
	* config/tc-arm.c (cpu_arch): Change ARM_ARCH_V6M to 11.

	include/elf/
	* arm.h (TAG_CPU_ARCH_V6_M, TAG_CPU_ARCH_V6S_M): New defines.
	(MAX_TAG_CPU_ARCH, TAG_CPU_ARCH_V4T_PLUS_V6_M): New defines.
	(Tag_NEON_arch): Rename to Tag_Advanced_SIMD_arch to match ARM ABI
	version 2.07.
	(Tag_undefined39, Tag_nodefaults): New enum values.
	(Tag_also_compatible_with, Tag_T2EE_use): Likewise.
	(Tag_conformance, Tag_Virtualization_use): Likewise.
	(Tag_undefined69, Tag_MPextension_use): Likewise.
2009-01-15 18:00:49 +00:00
Nick Clifton be0d808ef8 * include/elf/ia64.h (SHT_IA_64_VMS_DISPLAY_NAME_INFO,
EF_IA_64_ARCHVER_1): New macros. Minor reformatting.

        * bfd/Makefile.am (BFD32_BACKENDS): Add new object vmsutil.lo
        (BFD32_BACKENDS_CFILES): Add new file vmsutil.c
        (vmsutil.lo): Add dependency rule
        * bfd/Makefile.in: Regenerate
        * bfd/config.bfd (ia64*-*-*vms*): Add case.
        * bfd/configure.in (bfd_elf64_ia64_vms_vec): Add case.
        * bfd/configure: Regenerate
        * bfd/vmsutil.[ch]: New files
        * bfd/elf-bfd.h (struct bfd_elf_special_section): Change type of
        attr to bfd_vma.
        * bfd/elfxx-ia64.c (elfNN_vms_post_process_headers,
        elfNN_vms_section_processing, elfNN_vms_final_write_processing,
        elfNN_vms_close_and_cleanup, elfNN_vms_section_from_shdr,
        elfNN_vms_object_p): New functions
        * bfd/targets.c (bfd_elf64_ia64_vms_vec): New target.

        * gas/configure.tgt(ia64-*-*vms*): New target.
        * gas/dwarf2dbg.h (dwarf2_loc_mark_labels): Make extern.
        * gas/tc.h (md_number_to_chars): Declare iff undefined.
        * gas/config/obj-elf.c (obj_elf_change_section): Change type of
        arg attr to bfd_vma.
        (obj_elf_parse_section_letters): Return a bfd_vma. Change type of
        variables attr, md_attr to bfd_vma.
        (obj_elf_section_word): Likewise.
        (obj_elf_section): Change type of variable attr to bfd_vma
        * gas/config/obj-elf.h (obj_elf_change_section): Change type of
        arg attr to bfd_vma
        * gas/config/tc-ia64.c (bfdver.h,time.h): Include.
        (ia64_elf_section_letter): Now returns a bfd_vma.
        Handle VMS specific attributes.
        (ia64_elf_section_flags): Arg attr now a bfd_vma.
        (ia64_init): Don't turn on dependency checking for VMS.
        (ia64_target_format): Check for VMS flag bit.
        (do_alias): Hande decc$ functions.
        (get_vms_time): New function.
        (ia64_vms_note): New function.
        * gas/config/tc-ia64.h (ia64_elf_section_letter): Now returns a bfd_vma.
        (ia64_elf_section_flags): Arg attr now a bfd_vma.
        (tc_init_after_args): Define for VMS.
        * gas/config/tc-alpha.c (alpha_elf_section_letter): Return a bfd_vma.
        (alpha_elf_section_flags): Change type of arg attr to bfd_vma.
        * gas/config/tc-alpha.h: Likewise.
        * gas/config/tc-i386.c (x86_64_section_letter): Return a bfd_vma.
        (x86_64_section_word): Return a bfd_vma.
        * gas/config/tc-i386.h: Likewise.
        * gas/config/tc-ip2k.c (ip2k_elf_section_flags): Change type of arg
        attr to bfd_vma.
        * gas/config/tc-ip2k.h: Likewise.
        * gas/config/tc-mep.c (mep_elf_section_letter): Return a bfd_vma.
        (mep_elf_section_flags): Change type of arg attr to bfd_vma.
        * gas/config/tc-mep.h: Likewise.
        * gas/config/tc-ppc.c  (ppc_section_letter): Return a bfd_vma.
        (ppc_section_word): Return a bfd_vma.
        (ppc_section_flags): Change type of arg attr to bfd_vma.
        * gas/config/tc-ppc.h: Likewise.
        * gas/config/te-vms.h (DWARF2_DIR_SHOULD_END_WITH_SEPARATOR,
        DWAR2_FILE_TIME_NAME, DWARF2_FILE_SIZE_NAME, DWARF2_FILEN_NAME):
        New file with new macros
        * gas/dwarf2dbg.c (get_filenum, out_file_list): Default and call new
        macros.
2009-01-15 12:42:52 +00:00
Cary Coutant 9c60088a81 * plugin-api.h (LDPS_BAD_HANDLE): New constant.
(ld_plugin_get_input_file): New typedef.
	(ld_plugin_release_input_file): New typedef.
	(LDPT_GET_INPUT_FILE, LDPT_RELEASE_INPUT_FILE): New constants.
	(struct ld_plugin_tv): Add two new fields.
2009-01-15 01:28:14 +00:00
Joel Brobecker 4eff98a240 Update the copyright notice of some of the files I missed
in the previous copyright update.
2009-01-14 10:53:04 +00:00
Peter Bergner 91d9410bd0 gas/
* config/tc-ppc.c (ppc_setup_opcodes): Remove PPC_OPCODE_NOPOWER4 test.
	Test the new "deprecated" opcode field.

include/opcode/
	* ppc.h (struct powerpc_opcode): New field "deprecated".
	(PPC_OPCODE_NOPOWER4): Delete.

opcodes/
	* ppc-opc.c (PPCNONE): Define.
	(NOPOWER4): Delete.
	(powerpc_opcodes): Initialize the new "deprecated" field.
2009-01-09 18:50:57 +00:00
Hans-Peter Nilsson 98d47b2d0d * callback.h (struct host_callback_struct): Mark member error as
pointing to a noreturn function.
2009-01-06 23:38:44 +00:00
Nick Clifton 2f6f0bbeae Add LM32 port. 2008-12-23 19:10:21 +00:00
Nick Clifton a432f50100 * coffcode.h (coff_write_object_contents): Always initialise
section.s_page.

            * ti.h (COFF_ADJUST_SCNHDR_OUT_PRE): Define.
2008-12-23 10:59:56 +00:00
Nick Clifton 15be19c17c Remove STT_IFUNC support. 2008-12-23 09:01:50 +00:00
Hans-Peter Nilsson 59ca6f3ea1 * cris.h (R_CRIS_32_IE): New relocation. 2008-12-20 00:24:16 +00:00
DJ Delorie e1748ea155 merge from gcc 2008-12-10 23:28:15 +00:00
Nick Clifton 5c1cf8812f include/elf/
* common.h (STT_IFUNC): Define.
elfcpp/
            * elfcpp.h (enum STT): Add STT_IFUNC.
bfd/
            * syms.c (struct bfd_symbol): Add new flag BSF_INDIRECT_FUNCTION.
            Remove redundant flag BFD_FORT_COMM_DEFAULT_VALUE.  Renumber flags
            to remove gaps.
            (bfd_print_symbol_vandf): Return 'i' for BSF_INDIRECT_FUNCTION.
            (bfd_decode_symclass): Likewise.
            * elf.c (swap_out_syms): Translate BSF_INDIRECT_FUNCTION into
            STT_IFUNC.
            (elf_find_function): Treat STT_IFUNC in the same way as STT_FUNC.
            (_bfd_elf_is_function_type): Likewise.
            * elf32-arm.c (arm_elf_find_function): Likewise.
            (elf32_arm_adjust_dynamic_symbol): Likewise.
            (elf32_arm_swap_symbol_in): Likewise.
            (elf32_arm_additional_program_headers): Likewise.
            * elf32-i386.c (is_indirect_symbol): New function.
            (elf_i386_check_relocs): Also generate dynamic relocs for
            relocations against STT_IFUNC symbols.
            (allocate_dynrelocs): Likewise.
            (elf_i386_relocate_section): Likewise.
            * elf64-x86-64.c (is_indirect_symbol): New function.
            (elf64_x86_64_check_relocs): Also generate dynamic relocs for
            relocations against STT_IFUNC symbols.
            (allocate_dynrelocs): Likewise.
            (elf64_x86_64_relocate_section): Likewise.
            * elfcode.h (elf_slurp_symbol_table): Translate STT_IFUNC into
            BSF_INDIRECT_FUNCTION.
            * elflink.c (_bfd_elf_adjust_dynamic_reloc_section): Add support
            for STT_IFUNC symbols.
            (get_ifunc_reloc_section_name): New function.
            (_bfd_elf_make_ifunc_reloc_section): New function.
            * elf-bfd.h (struct bfd_elf_section_data): Add indirect_relocs field.
            * bfd-in2.h: Regenerate.
gas/
            * config/obj-elf.c (obj_elf_type): Add support for STT_IFUNC type.
            * doc/as.texinfo: Document new feature.
            * NEWS: Mention new feature.
gas/testsuite/
            * gas/elf/type.s: Add test of STT_IFUNC symbol type.
            * gas/elf/type.e: Update expected disassembly.
            * gas/elf/elf.exp: Update grep of symbol types.
ld/
            * NEWS: Mention new feature.
            * pe-dll.c (process_def_file): Replace use of redundant
            BFD_FORT_COMM_DEFAULT_VALUE with 0.
            * scripttempl/elf.sc: Add .rel.ifunc.dyn and .rela.ifunc.dyn
            sections.
ld/testsuite/
            * ld-mips-elf/reloc-1-n32.d: Updated expected output for reloc
            descriptions.
            * ld-mips-elf/reloc-1-n64.d: Likewise.
            * ld-i386/ifunc.d: New test.
            * ld-i386/ifunc.s: Source file for the new test.
            * ld-i386/i386.exp: Run the new test.
2008-12-03 14:50:56 +00:00
Cary Coutant 15bb3d1e84 gold/ChangeLog:
* plugin.cc (ld_plugin_message): Change format parameter to const.
	Fix mismatch between new[] and delete.

include/ChangeLog:

	* plugin-api.h (ld_plugin_message): Change format parameter to const.
2008-12-01 19:50:49 +00:00
Cary Coutant 54e01333f7 * plugin-api.h: Fix syntax error when compiling with C++. 2008-12-01 19:05:46 +00:00
Thiemo Seufer 6e40cdfc86 * aoutx.h (NAME): Add case statements for bfd_mach_mips14000,
bfd_mach_mips16000.
	* archures.c (bfd_architecture): Add .#defines for bfd_mach_mips14000,
	bfd_mach_mips16000.
	* bfd-in2.h: Regenerate.
	* cpu-mips.c: Add enums I_mips14000, I_mips16000.
	(arch_info_struct): Add refs to R14000, R16000.
	* elfxx-mips.c (mips_set_isa_flags): Handle bfd_mach_mips14000,
	bfd_mach_mips16000.
	(mips_mach_extensions): Map R14000, R16000 to R10000.

	* config/tc-mips.c (hilo_interlocks): Handle CPU_R14000, CPU_R16000.
	(mips_cpu_info_table): Add r14000, r16000.
	* doc/c-mips.texi: Add entries for 14000, 16000.

	* mips-dis.c (mips_arch_choices): Add r14000, r16000.

	* mips.h: Define CPU_R14000, CPU_R16000.
        (OPCODE_IS_MEMBER): Include R14000, R16000 in test.
2008-11-28 18:02:17 +00:00
Swami Reddy M R 8ba027ecb9 * cr16.h (R_CR16_GOT_REGREL20, R_CR16_GOTC_REGREL20 and
R_CR16_GLOB_DAT): New relocations.
2008-11-27 11:35:39 +00:00
Alan Modra 4163e9fbdb include/
PR 7047
	* bfdlink.h (struct bfd_elf_version_expr): Delete "symbol".
	Add "literal".
bfd/
	PR 7047
	* configure.in: Bump version.
	* configure: Regenerate.
	* elflink.c (_bfd_elf_link_assign_sym_version): Continue matching
	against version nodes when a global match is a wildcard.  Similarly
	continue matching on local wildcard matches, rather than only
	continuing for "*".  Have any global wildcard match override a
	local wildcard match.  Correct logic hiding unversioned symbol.
	(bfd_elf_size_dynamic_sections): Update for changes to struct
	bfd_elf_version_expr.
ld/
	PR 7047
	* emultempl/ppc64elf.em (gld${EMULATION_NAME}_new_vers_pattern): Update
	for changes to struct bfd_elf_version_expr.
	* ldlang.c (lang_vers_match, version_expr_head_hash): Likewise.
	(version_expr_head_eq, lang_finalize_version_expr_head): Likewise.
	(lang_register_vers_node): Likewise.
	(lang_new_vers_pattern): Likewise.  Ensure "literal" is set when
	no glob chars found in "pattern".
	(realsymbol): Correct backslash quote logic.
	* ld.texinfo (VERSION): Warn about global wildcards.
2008-11-26 01:04:12 +00:00
Hans-Peter Nilsson de33833d1f * cris.h (R_CRIS_32_TPREL): Correct comment.
(R_CRIS_DTPMOD): Open up for use elsewhere than the fourth GOT entry.
2008-11-25 03:08:13 +00:00
Sterling Augustine d6f6f50285 2008-11-21 Sterling Augustine <sterling@tensilica.com>
* xtensa-isa.c (xtensa_state_is_shared_or): New function.

2008-11-21  Sterling Augustine  <sterling@tensilica.com>

        * xtensa-isa-internal.h (XTENSA_STATE_IS_SHARED_OR): New flag.
        * xtensa-isa.h (xtensa_state_is_shared_or): New prototype.

2008-11-21  Sterling Augustine  <sterling@tensilica.com>

        * config/tc-xtensa.c (check_t1_t2_reads_and_writes): Call
        xtensa_state_is_shared_or to allow multiple opcodes within a
        single FLIX bundle to write to these special states.
2008-11-21 22:13:32 +00:00
Bob Wilson 7562a08bb4 include/
* xtensa-config.h (XCHAL_HAVE_MUL16, XCHAL_HAVE_MUL32, XCHAL_HAVE_DIV32)
	(XCHAL_HAVE_MINMAX, XCHAL_HAVE_SEXT, XCHAL_HAVE_THREADPTR)
	(XCHAL_HAVE_RELEASE_SYNC, XCHAL_HAVE_S32C1I): Change to 1.
	(XCHAL_NUM_AREGS): Change to 32.
	(XCHAL_ICACHE_SIZE, XCHAL_DCACHE_SIZE): Change to 16K.
	(XCHAL_ICACHE_LINESIZE, XCHAL_DCACHE_LINESIZE): Change to 32.
	(XCHAL_ICACHE_LINEWIDTH, XCHAL_DCACHE_LINEWIDTH): Change to 5.
	(XCHAL_DCACHE_IS_WRITEBACK): Change to 1.
	(XCHAL_DEBUGLEVEL): Change to 6.
bfd/
	* xtensa-modules.c (sysregs): Add MMID, VECBASE, EPC5, EPC6, EPC7,
	EXCSAVE5, EXCSAVE6, EXCSAVE7, EPS5, EPS6, EPS7, CPENABLE,
	SCOMPARE1, and THREADPTR registers.
	(NUM_SYSREGS, MAX_USER_REG): Update.
	(states): Change width of INTERRUPT, WindowBase, WindowStart, and
	INTENABLE.  Add VECBASE, EPC5, EPC6, EPC7, EXCSAVE5, EXCSAVE6,
	EXCSAVE7, EPS6, EPS6, EPS7, THREADPTR, CPENABLE, and SCOMPARE1 states.
	(NUM_STATES): Update.
	(enum xtensa_state_id): Add entries for new states.
	(enum xtensa_field_id): Add entries for xt_wbr15_imm and xt_wbr18_imm
	fields, along with functions to extract and set them.
	(regfiles): Change number of AR registers to 32.
	(Operand_ar0_encode, Operand_ar4_encode, Operand_ar8_encode,
	Operand_ar12_encode, Operand_ars_entry_encode): Update register mask.
	(operands): Add entries for tp7, xt_wbr15_label, xt_wbr18_label,
	xt_wbr15_imm, and xt_wbr18_imm operands, along with functions to
	encode and decode them.
	(enum xtensa_operand_id): Add entries for new operands.
	(Iclass_xt_iclass_rfi_stateArgs): Add EPC5, EPC6, EPC7, EPS5, EPS6, and
	EPC7 states.
	(Iclass_xt_iclass_rfdo_stateArgs): Replace EPC4 and EPS4 by EPC6 and
	EPS6, respectively.
	(iclasses): Add entries for rur_threadptr, wur_threadptr,
	xt_iclass_wsr_176, xt_iclass_rsr_epc5, xt_iclass_wsr_epc5,
	xt_iclass_xsr_epc5, xt_iclass_rsr_excsave5, xt_iclass_wsr_excsave5,
	xt_iclass_xsr_excsave5, xt_iclass_rsr_epc6, xt_iclass_wsr_epc6,
	xt_iclass_xsr_epc6, xt_iclass_rsr_excsave6, xt_iclass_wsr_excsave6,
	xt_iclass_xsr_excsave6, xt_iclass_rsr_epc7, xt_iclass_wsr_epc7,
	xt_iclass_xsr_epc7, xt_iclass_rsr_excsave7, xt_iclass_wsr_excsave7,
	xt_iclass_xsr_excsave7, xt_iclass_rsr_eps5, xt_iclass_wsr_eps5,
	xt_iclass_xsr_eps5, xt_iclass_rsr_eps6, xt_iclass_wsr_eps6,
	xt_iclass_xsr_eps6, xt_iclass_rsr_eps7, xt_iclass_wsr_eps7,
	xt_iclass_xsr_eps7, xt_iclass_rsr_vecbase, xt_iclass_wsr_vecbase,
	xt_iclass_xsr_vecbase, xt_iclass_mul16, xt_iclass_wsr_mmid,
	xt_iclass_icache_lock, xt_iclass_dcache_lock, xt_iclass_rsr_cpenable,
	xt_iclass_wsr_cpenable, xt_iclass_xsr_cpenable, xt_iclass_clamp,
	xt_iclass_minmax, xt_iclass_sx, xt_iclass_l32ai, xt_iclass_s32ri,
	xt_iclass_s32c1i, xt_iclass_rsr_scompare1, xt_iclass_wsr_scompare1,
	xt_iclass_xsr_scompare1, xt_iclass_div, and xt_iclass_mul32, along
	with corresponding argument and state argument arrays.  Change
	number of state arguments for xt_iclass_rfi.  Add arguments for
	xt_iclass_rfdo.
	(enum xtensa_iclass_id): Add entries for new iclasses.
	(opcodes): Add entries for RUR_THREADPTR, WUR_THREADPTR, WSR_176,
	RSR_EPC5, WSR_EPC5, XSR_EPC5, RSR_EXCSAVE5, WSR_EXCSAVE5, XSR_EXCSAVE5,
	RSR_EPC6, WSR_EPC6, XSR_EPC6, RSR_EXCSAVE6, WSR_EXCSAVE6, XSR_EXCSAVE6,
	RSR_EPC7, WSR_EPC7, XSR_EPC7, RSR_EXCSAVE7, WSR_EXCSAVE7, XSR_EXCSAVE7,
	RSR_EPS5, WSR_EPS5, XSR_EPS5, RSR_EPS6, WSR_EPS6, XSR_EPS6, RSR_EPS7,
	WSR_EPS7, XSR_EPS7, RSR_VECBASE, WSR_VECBASE, XSR_VECBASE, MUL16U,
	MUL16S, WSR_MMID, IPFL, IHU, IIU, DPFL, DHU, DIU, RSR_CPENABLE,
	WSR_CPENABLE, XSR_CPENABLE, CLAMPS, MIN, MAX, MINU, MAXU, SEXT, L32AI,
	S32RI, S32C1I, RSR_SCOMPARE1, WSR_SCOMPARE1, XSR_SCOMPARE1, QUOU, QUOS,
	REMU, REMS, and MULL opcodes, along with the corresponding functions
	to encode them.
	(enum xtensa_opcode_id): Add entries for new opcodes.
	(Slot_inst_decode): Handle new opcodes.
	(Slot_inst_get_field_fns, Slot_inst_set_field_fns): Add entries for
	xt_wbr15_imm and xt_wbr18_imm fields.
	(Slot_inst16a_get_field_fns, Slot_inst16a_set_field_fns): Likewise.
	(Slot_inst16b_get_field_fns, Slot_inst16b_set_field_fns): Likewise.
	(xtensa_modules): Update number of fields, operands, iclasses and
	opcodes.
2008-11-19 18:25:19 +00:00
Catherine Moore b1230ddef7 Add support for ARM half-precision conversion instructions. 2008-11-18 15:45:05 +00:00
Nick Clifton 5025372c28 bfd/
* elf.c (assign_file_positions_for_load_sections): Use header_size
        to avoid moving the load address of file headers.
        (assign_file_positions_for_load_sections): Set header_size for
        segments containing the file header.

        include/elf/
        * internal.h (struct elf_segment_map): Add header_size field.
2008-11-14 14:44:09 +00:00
Tristan Gingold c34ce41114 bfd/
2008-11-14  Tristan Gingold  <gingold@adacore.com>

	* configure.com: Handle bfd_default_target_size, BFD_HOST_LONG_LONG,
	BFD_HOST_64BIT_LONG_LONG, BFD_HOSTPTR_T, bfd_file_ptr.
	Generate bfdver.h.
	* vms-hdr.c (_bfd_vms_write_hdr): Use strdup/free instead of alloca.
	* hosts/alphavms.h: Defines macros to bypass i18n.
	* makefile.vms (OBJS): Update file list.
	(DEFS): Remove VMS_DEBUG, const, add DEBUGDIR.
	(CFLAGS): Update flags.
	* bfdio.c (real_fopen): Add code specific to VMS: extract attributes
	from modes.

binutils/
2008-11-14  Tristan Gingold  <gingold@adacore.com>

	* configure.com: Get version from configure.in of bfd.
	* makefile.vms-in (DEBUG_OBJS): Add dwarf.obj.
	(CFLAGS): Update flags.

include/
2008-11-14  Tristan Gingold  <gingold@adacore.com>

	* fopen-vms.h (FOPEN_RB): Use a single string to match the
	standard prototype.
	(FOPEN_WB): Ditto.
	(FOPEN_AB): Ditto.
	(FOPEN_RUB): Ditto.
	(FOPEN_WUB): Ditto.
	(FOPEN_AUB): Ditto.

libiberty/
2008-11-14  Tristan Gingold  <gingold@adacore.com>

	* makefile.vms (OBJS): Update objects list.
	(CFLAGS): Update.
	(libiberty.olb): Remove alloca-conf.h dependency.
	* config.h-vms: Use new macro sets, use builtin alloca.

opcodes/
2008-11-14  Tristan Gingold  <gingold@adacore.com>

	* makefile.vms (OBJS): Update list of objects.
	(DEFS): Update
	(CFLAGS): Update.
2008-11-14 09:57:33 +00:00
Ulrich Weigand 2c58170b7e gdb/ChangeLog:
* auxv.c (fprint_target_auxv): Handle AT_BASE_PLATFORM and
	AT_EXECFN.  Re-sort AT_SECURE.

include/elf/ChangeLog:

	* common.h (AT_BASE_PLATFORM, AT_EXECFN): Define.
2008-11-13 15:07:54 +00:00
Chao-ying Fu 5dd0d5828f 2008-11-06 Chao-ying Fu <fu@mips.com>
* mips.h: Doucument '1' for 5-bit sync type.
2008-11-06 19:32:42 +00:00
Alan Modra 054dcc734c * obstack.h (obstack_finish <!__GNUC__>): Cast result to void *. 2008-10-20 23:03:31 +00:00
Nathan Froyd c7fadd4142 include/elf/
* ppc.h: Add Tag_GNU_Power_ABI_Struct_Return.
bfd/
	* elf32-ppc.c (ppc_elf_merge_obj_attributes): Merge
	Tag_GNU_Power_ABI_Struct_Return.
binutils/
	* readelf.c (display_power_gnu_attribute): Decode
	Tag_GNU_Power_ABI_Struct_Return.
ld/testsuite/
	* ld-powerpc/gnu-attr-12-1.s: New file.
	* ld-powerpc/gnu-attr-12-2.s: New file.
	* ld-powerpc/gnu-attr-12-11.d: New file.
	* ld-powerpc/gnu-attr-12-21.d: New file.
	* ld-powerpc/powerpc.exp: Run new dump tests.
2008-10-10 20:55:36 +00:00
DJ Delorie 7dfaa59e82 merge from gcc 2008-10-07 01:27:53 +00:00
Hans-Peter Nilsson 59b56f957a * cris.h (R_CRIS_32_GOT_GD, R_CRIS_16_GOT_GD, R_CRIS_32_GD)
(R_CRIS_DTP, R_CRIS_32_DTPREL, R_CRIS_16_DTPREL, R_CRIS_DTPMOD)
	(R_CRIS_32_GOT_TPREL, R_CRIS_16_GOT_TPREL, R_CRIS_32_TPREL)
	(R_CRIS_16_TPREL): New relocations.
2008-10-04 17:16:30 +00:00
Richard Henderson a890f63b33 include/
* elf/dwarf2.h (DW_OP_GNU_encoded_addr): New.
binutils/
	* dwarf.c (size_of_encoded_value, get_encoded_value): Move up.
	(decode_location_expression): Add section parameter.  Handle
	DW_OP_GNU_encoded_addr.
	(read_and_display_attr_value): Update decode_location_expression call.
	(display_debug_loc, display_debug_frames): Likewise.
gas/
        * dw2gencfi.c (DWARF2_ADDR_SIZE): Provide default.
        (struct cfi_insn_data): Add ea member.
        (CFI_val_encoded_addr, dot_cfi_val_encoded_addr): New.
        (output_cfi_insn): Handle CFI_val_encoded_addr.
        (select_cie_for_fde): Don't match CFI_val_encoded_addr.
        * doc/as.texinfo (.cfi_val_encoded_addr): Document.
2008-09-24 23:21:04 +00:00
Ian Lance Taylor 2c8f862a44 * plugin-api.h (ld_plugin_status): Remove comma from the last item.
Use C style comment.
	(ld_plugin_api_version, ld_plugin_output_file_type,
	ld_plugin_symbol_kind, ld_plugin_symbol_visibility,
	ld_plugin_symbol_resolution, ld_plugin_level, ld_plugin_tag): Remove
	comma from the last item.
2008-09-22 16:37:41 +00:00
Cary Coutant 1d1c001cb4 Add plugin functionality for link-time optimization (LTO).
include/:
	* plugin-api.h: New file.

gold/:
	* configure.ac (plugins): Add --enable-plugins option.
	* configure: Regenerate.
	* config.in: Regenerate.
	* Makefile.am (LIBDL): New variable.
	(CCFILES): Add plugin.cc.
	(HFILES): Add plugin.h.
	(ldadd_var): Add LIBDL.
	* Makefile.in: Regenerate.

	* archive.cc: Include "plugin.h".
	(Archive::setup): Don't preread archive symbols when using a plugin.
	(Archive::get_file_and_offset): Add memsize parameter.  Change callers.
	(Archive::get_elf_object_for_member): Call plugin hooks for claiming
	files.
	(Archive::include_member): Add symbols from plugin objects.
	* archive.h (Archive::get_file_and_offset): Add memsize parameter.
	* descriptors.cc (Descriptors::open): Check for file descriptors
	abandoned by plugins.
	(Descriptors::claim_for_plugin): New function.
	* descriptors.h (Descriptors::claim_for_plugin): New function.
	(Open_descriptor::is_claimed): New field.
	(claim_descriptor_for_plugin): New function.
	* fileread.cc (File_read::claim_for_plugin): New function.
	* fileread.h (File_read::claim_for_plugin): New function.
	(File_read::descriptor): New function.
	* gold.cc: Include "plugin.h".
	(queue_initial_tasks): Add task to call plugin hooks for generating
	new object files.
	* main.cc: Include "plugin.h".
	(main): Load plugin libraries.
	* object.h (Pluginobj): Declare.
	(Object::pluginobj): New function.
	(Object::do_pluginobj): New function.
	(Object::set_target): New function.
	* options.cc: Include "plugin.h".
	(General_options::parse_plugin): New function.
	(General_options::General_options): Initialize plugins_ field.
	(General_options::add_plugin): New function.
	* options.h (Plugin_manager): Declare.
	(General_options): Add --plugin option.
	(General_options::has_plugins): New function.
	(General_options::plugins): New function.
	(General_options::add_plugin): New function.
	(General_options::plugins_): New field.
	* plugin.cc: New file.
	* plugin.h: New file.
	* readsyms.cc: Include "plugin.h".
	(Read_symbols::do_read_symbols): Check for archive before checking
	for ELF file.  Call plugin hooks to claim files.
	* resolve.cc (Symbol_table::resolve): Record when symbol is referenced
	from a real object file; force override when processing replacement
	files.
	* symtab.cc (Symbol::init_fields): Initialize in_real_elf_ field.
	(Symbol::init_base_object): Likewise.
	(Symbol::init_base_output_data): Likewise.
	(Symbol::init_base_output_segment): Likewise.
	(Symbol::init_base_constant): Likewise.
	(Symbol::init_base_undefined): Likewise.
	(Symbol::output_section): Assert that object is not a plugin.
	(Symbol_table::add_from_pluginobj): New function.
	(Symbol_table::sized_finalize_symbol): Treat symbols from plugins as
	undefined.
	(Symbol_table::sized_write_globals): Likewise.
	(Symbol_table::add_from_pluginobj): Instantiate template.
	* symtab.h (Sized_pluginobj): Declare.
	(Symbol::in_real_elf): New function.
	(Symbol::set_in_real_elf): New function.
	(Symbol::in_real_elf_): New field.
	(Symbol_table::add_from_pluginobj): New function.

	* testsuite/Makefile.am (AM_CFLAGS): New variable.
	(LIBDL): New variable.
	(LDADD): Add LIBDL.
	(check_PROGRAMS): Add plugin_test_1 and plugin_test_2.
	(check_SCRIPTS): Add plugin_test_1.sh and plugin_test_2.sh.
	(check_DATA): Add plugin_test_1.err and plugin_test_2.err.
	(MOSTLYCLEANFILES): Likewise.
	* testsuite/Makefile.in: Regenerate.
	* testsuite/plugin_test.c: New file.
	* testsuite/plugin_test_1.sh: New file.
	* testsuite/plugin_test_2.sh: New file.
2008-09-19 22:54:57 +00:00
DJ Delorie e841b018cb merge from gcc 2008-09-09 18:21:42 +00:00
Tristan Gingold bfe1d14847 2008-08-28 Tristan Gingold <gingold@adacore.com>
* stab.def: Add BNSYM, ENSYM, OSO for darwin.
2008-08-28 16:04:18 +00:00
H.J. Lu ecaf487248 gas/
2008-08-28  H.J. Lu  <hongjiu.lu@intel.com>

	* config/tc-ia64.c (CR_IIB0): New.
	(CR_IIB1): Likewise.
	(cr): Add cr.iib0 and cr.iib1.
	(specify_resource): Handle IA64_RS_CR_IIB and CR_IIB0/CR_IIB1.

gas/testsuite/

2008-08-28  H.J. Lu  <hongjiu.lu@intel.com>

	* gas/ia64/dv-raw-err.s: Add tests for cr.iib0 and cr.iib1.
	* gas/ia64/dv-waw-err.s: Likewise.
	* gas/ia64/regs.s: Likewise.

	* gas/ia64/dv-raw-err.l: Updated.
	* gas/ia64/dv-waw-err.l: Likewise.
	* gas/ia64/regs.d: Likewise.

include/opcode/

2008-08-28  H.J. Lu  <hongjiu.lu@intel.com>

	* ia64.h (ia64_resource_specifier): Add IA64_RS_CR_IIB.  Update
	IA64_RS_CR.

opcodes/

2008-08-28  H.J. Lu  <hongjiu.lu@intel.com>

	* ia64-dis.c (print_insn_ia64): Handle cr.iib0 and cr.iib1.
	* ia64-gen.c (lookup_specifier): Likewise.

	* ia64-ic.tbl: Add support for cr.iib0 and cr.iib1.
	* ia64-raw.tbl: Likewise.
	* ia64-waw.tbl: Likewise.
	* ia64-asmtab.c: Regenerated.
2008-08-28 14:07:48 +00:00
Alan Modra 576677295f * binary-io.h: New file, imported from gnulib, but don't
#include <fcntl.h> or <stdio.h>.
2008-08-25 04:36:03 +00:00
Bob Wilson 4a4f863459 2008-08-20 Bob Wilson <bob.wilson@acm.org>
bfd/
        * elf-bfd.h (elf_object_id): Add XTENSA_ELF_TDATA.
        * elf32-xtensa.c (elf_howto_table): Add TLS relocations.
        (elf_xtensa_reloc_type_lookup): Likewise.
        (TCB_SIZE): Define.
        (elf_xtensa_link_hash_entry): New.
        (GOT_UNKNOWN, GOT_NORMAL, GOT_TLS_GD, GOT_TLS_IE, GOT_TLS_ANY): Define.
        (elf_xtensa_hash_entry): Define.
        (elf_xtensa_obj_tdata): New.
        (elf_xtensa_tdata): Define.
        (elf_xtensa_local_got_tls_type): Define.
        (elf_xtensa_local_tlsfunc_refcounts): Define.
        (is_xtensa_elf): Define.
        (elf_xtensa_mkobject): New.
        (elf_xtensa_link_hash_table): Add tlsbase field.
        (elf_xtensa_link_hash_newfunc): New.
        (elf_xtensa_link_hash_table_create): Use elf_xtensa_link_hash_newfunc.
        Create an entry for "_TLS_MODULE_BASE_" and save it in tlsbase field.
        (elf_xtensa_copy_indirect_symbol): New.
        (elf_xtensa_check_relocs): Rewrite to handle TLS relocations.
        (elf_xtensa_gc_sweep_hook): Likewise.
        (elf_xtensa_allocate_dynrelocs): Optimize away GOT entries for
        TLSDESC_FN relocations when an IE reference is seen.
        (elf_xtensa_allocate_local_got_size): Likewise.
        (elf_xtensa_always_size_sections): New.
        (dtpoff_base, tpoff): New.
        (elf_xtensa_do_reloc): Handle TLS relocations.
        (replace_tls_insn): New.
        (IS_XTENSA_TLS_RELOC): Define.
        (elf_xtensa_relocate_section): Handle TLS relocations.
        (get_indirect_call_dest_reg): New.
        (bfd_elf32_mkobject): Define.
        (elf_backend_always_size_sections): New.
        (elf_backend_copy_indirect_symbol): New.
        * reloc.c (BFD_RELOC_XTENSA_TLSDESC_FN, BFD_RELOC_XTENSA_TLSDESC_ARG)
        (BFD_RELOC_XTENSA_TLS_DTPOFF, BFD_RELOC_XTENSA_TLS_TPOFF)
        (BFD_RELOC_XTENSA_TLS_FUNC, BFD_RELOC_XTENSA_TLS_ARG)
        (BFD_RELOC_XTENSA_TLS_CALL): New.
        * bfd-in2.h: Regenerate.
        * libbfd.h: Regenerate.
gas/
        * config/tc-xtensa.c (O_tlsfunc, O_tlsarg, O_tlscall): Define.
        (O_tpoff, O_dtpoff): Define.
        (suffix_relocs): Add entries for TLS suffixes.
        (xtensa_elf_cons): Check for invalid use of TLS relocations.
        (map_operator_to_reloc): Add is_literal parameter and use it to
        control translating TLS instruction relocations to the corresponding
        literal relocations.
        (xg_valid_literal_expression): Allow TLS operators.
        (xg_build_to_insn): Copy TLS operators from pseudo-instruction
        operands to generated literals.
        (xg_assemble_literal): Handle TLS operators.  Update call to
        map_operator_to_reloc.
        (md_assemble): Handle CALLXn.TLS pseudo-instruction.
        (md_apply_fix): Handle TLS relocations.
        (emit_single_op): Handle TLS operators.
        (convert_frag_immed): Update call to map_operator_to_reloc.
        (vinsn_to_insnbuf): Emit relocations for TLS-related instructions.
        * config/xtensa-istack.h (tinsn_struct): Add tls_reloc field.
        * config/xtensa-relax.c (append_literal_op): Add src_op parameter
        to initialize the op_data field of the BuildOp.
        (build_transition): Use it here to record the source operand
        corresponding to a generated literal.
        * config/xtensa-relax.h (build_op): Comment op_data use for literals.
include/elf/
        * xtensa.h (R_XTENSA_TLSDESC_FN, R_XTENSA_TLSDESC_ARG)
        (R_XTENSA_TLS_DTPOFF, R_XTENSA_TLS_TPOFF, R_XTENSA_TLS_FUNC)
        (R_XTENSA_TLS_ARG, R_XTENSA_TLS_CALL): New.
ld/testsuite/
        * ld-xtensa/tlsbin.dd, ld-xtensa/tlsbin.rd, ld-xtensa/tlsbin.s,
        ld-xtensa/tlsbin.sd, ld-xtensa/tlsbin.td, ld-xtensa/tlslib.s,
        ld-xtensa/tlspic.dd, ld-xtensa/tlspic.rd, ld-xtensa/tlspic.sd,
        ld-xtensa/tlspic.td, ld-xtensa/tlspic1.s, ld-xtensa/tlspic2.s: New.
        * ld-xtensa/xtensa.exp: Run them.
2008-08-20 23:28:58 +00:00
Alan Modra f609b6715a bfd/
* bfd.c (struct _bfd): Correct outsymbols comment.
	* bfd-in2.h: Regenerate.
	* linker.c (bfd_generic_link_read_symbols): Renamed from..
	(generic_link_read_symbols): ..this, and made global.

include/
	* bfdlink.h (bfd_generic_link_read_symbols): Declare.
ld/
	PR 6478
	* ldcref.c (check_local_sym_xref): Use bfd_generic_link_read_symbols.
	Don't free symbol pointer array.
	(check_refs): Likewise.
	* ldmain.c (warning_callback): Likewise.
	* ldmisc.c (vfinfo): Likewise.
	* pe-dll.c (process_def_file): Likewise.
	(pe_walk_relocs_of_symbol, generate_reloc): Likewise.
	* emultempl/pe.em (pe_find_data_imports): Likewise.
	(gld_${EMULATION_NAME}_after_open): Likewise.
	* emultempl/pep.em (pep_find_data_imports): Likewise.
	(gld_${EMULATION_NAME}_after_open): Likewise.
	* ldlang.h (lang_input_statement_type): Delete asymbols, symbol_count,
	passive_position, closed.
	* ldlang.c (new_afile): Don't set asymbols and symbol_count.
	* ldmain.c (add_archive_element): xcalloc lang_input_statement_type.
2008-08-17 03:12:50 +00:00
Eric Weddington a15b3bdef7 Add AVR architectures avr25, avr31, avr35, and avr51 to match GCC.
bfd/
	* archures.c (bfd_mach_avr25, bfd_mach_avr31, bfd_mach_avr35,
	bfd_mach_avr51): New.
	* bfd-in2.h: Regenerate.
	* cpu-avr.c (arch_info_struct): Add avr25, avr31, avr35, and avr51
	architectures. Change comments to match architecture comments in GCC.
	(compatible): Add test for new AVR architectures.
	* elf32-avr.c (bfd_elf_avr_final_write_processing): Recognize
	bfd_mach_avr25, bfd_mach_avr31, bfd_mach_avr35 and bfd_mach_avr51.
	(elf32_avr_object_p): Recognize E_AVR_MACH_AVR25, E_AVR_MACH_AVR31,
	E_AVR_MACH_AVR35 and E_AVR_MACH_AVR51.

gas/
	* config/tc-avr.c (mcu_types): Add avr25, avr31, avr35, and avr51
	architectures. Reorganize list to put mcu types in correct architectures
	and to order list same as in GCC. Use new ISA definitions in
	include/opcode/avr.h.
	* doc/c-avr.texi: Add avr25, avr31, avr35, and avr51 architecture
	descriptions. Reorganize descriptions to put mcu types in correct
	architectures and to order lists same as in GCC.

include/
	* elf/avr.h (E_AVR_MACH_AVR25, E_AVR_MACH_AVR31,
	E_AVR_MACH_AVR35, E_AVR_MACH_AVR51): Define.
	(EF_AVR_MACH): Redefine to 0x7F.
	* opcode/avr.h (AVR_ISA_TINY3, AVR_ISA_ALL, AVR_ISA_USB162): Remove.
	(AVR_ISA_AVR3): Redefine.
	(AVR_ISA_AVR1, AVR_ISA_AVR2, AVR_ISA_AVR31, AVR_ISA_AVR35,
	AVR_ISA_AVR3_ALL, AVR_ISA_AVR4, AVR_ISA_AVR5, AVR_ISA_AVR51,
	AVR_ISA_AVR6): Define.

ld/
	* Makefile.am (ALL_EMULATIONS): Add eavr25.o, eavr31.o, eavr35.o,
	and eavr51.o.
	Add rules for eavr25.c, eavr31.c, eavr35.c, eavr51.c.
	* Makefile.in: Regenerate.
	* configure.tgt (avr-*-*, targ_extra_emuls): Add avr25, avr31, avr35
	and avr51.
	* emulparams/avr25.sh: New file.
	* emulparams/avr31.sh: New file.
	* emulparams/avr35.sh: New file.
	* emulparams/avr51.sh: New file.
2008-08-09 05:35:13 +00:00
Daniel Jacobowitz 97c16b1b23 2008-08-08 Richard Sandiford <rdsandiford@googlemail.com>
Daniel Jacobowitz  <dan@codesourcery.com>
	    Catherine Moore  <clm@codesourcery.com>
	    Mark Shinwell  <shinwell@codesourcery.com>
	    Maxim Kuvyrkov  <maxim@codesourcery.com>

	* elf32-mips.c (mips_vxworks_copy_howto_rela): Replace with...
	(elf_mips_copy_howto): ...this howto.  Clear the size fields.
	(mips_vxworks_jump_slot_howto_rela): Replace with...
	(elf_mips_jump_slot_howto): ...this howto.
	(bfd_elf32_bfd_reloc_type_lookup): Handle BFD_RELOC_MIPS_COPY
	and BFD_RELOC_MIPS_JUMP_SLOT.
	(bfd_elf32_bfd_reloc_name_lookup): Handle "R_MIPS_COPY" and
	"R_MIPS_JUMP_SLOT".
	(mips_elf32_rtype_to_howto): Handle R_MIPS_COPY and R_MIPS_JUMP_SLOT.
	(elf_backend_plt_readonly): Define.
	(elf_backend_plt_sym_val): Define for non-VxWorks targets.
	(mips_vxworks_bfd_reloc_type_lookup): Delete.
	(mips_vxworks_bfd_reloc_name_lookup): Likewise.
	(mips_vxworks_rtype_to_howto): Likewise.
	(elf_backend_want_dynbss): Don't define for VxWorks.
	(elf_backend_plt_readonly): Likewise.
	(bfd_elf32_bfd_reloc_type_lookup): Likewise.
	(bfd_elf32_bfd_reloc_name_lookup): Likewise.
	(elf_backend_mips_rtype_to_howto): Likewise.
	(elf_backend_adjust_dynamic_symbol): Likewise.
	(elf_backend_got_symbol_offset): Don't define.
	* elfn32-mips.c (elf_mips_copy_howto, elf_mips_jump_slot_howto): New.
	(bfd_elf32_bfd_reloc_type_lookup): Handle BFD_RELOC_MIPS_COPY
	and BFD_RELOC_MIPS_JUMP_SLOT.
	(bfd_elf32_bfd_reloc_name_lookup): Handle "R_MIPS_COPY" and
	"R_MIPS_JUMP_SLOT".
	(mips_elf32_n32_rtype_to_howto): Handle R_MIPS_COPY and
	R_MIPS_JUMP_SLOT.
	(elf_backend_rela_plts_and_copies_p, elf_backend_plt_readonly)
	(elf_backend_plt_sym_val): Define.
	* elf64-mips.c (elf_mips_copy_howto, elf_mips_jump_slot_howto): New.
	(bfd_elf64_bfd_reloc_type_lookup): Handle BFD_RELOC_MIPS_COPY
	and BFD_RELOC_MIPS_JUMP_SLOT.
	(bfd_elf64_bfd_reloc_name_lookup): Handle "R_MIPS_COPY" and
	"R_MIPS_JUMP_SLOT".
	(mips_elf64_rtype_to_howto): Handle R_MIPS_COPY and R_MIPS_JUMP_SLOT.
	(elf_backend_rela_plts_and_copies_p, elf_backend_plt_readonly)
	(elf_backend_plt_sym_val): Define.
	* elfxx-mips.h (_bfd_mips_vxworks_adjust_dynamic_symbol): Delete.
	(_bfd_mips_elf_use_plts_and_copy_relocs, _bfd_mips_elf_init_stubs)
	(_bfd_mips_elf_plt_sym_val, _bfd_mips_post_process_headers): Declare.
	* elfxx-mips.c (mips_elf_la25_stub): New structure.
	(LA25_LUI, LA25_J, LA25_ADDIU): New macros.
	(mips_elf_link_hash_entry): Add "la25_stubs", "has_static_relocs"
	and "has_nonpic_branches" fields.  Remove "is_relocation_target" and
	"is_branch_target".
	(mips_elf_link_hash_table): Add blank lines.  Add
	"use_plts_and_copy_relocs", "reserved_gotno", "strampoline",
	"la25_stubs" and "add_stub_section" fields.
	(mips_htab_traverse_info): New structure.
	(PIC_OBJECT_P, MIPS_ELF_LOAD_WORD): New macros.
	(MIPS_RESERVED_GOTNO): Delete.
	(mips_o32_exec_plt0_entry, mips_n32_exec_plt0_entry)
	(mips_n64_exec_plt0_entry, mips_exec_plt_entry): New tables.
	(mips_elf_link_hash_newfunc): Update after the changes to
	mips_elf_link_hash_entry.
	(mips_elf_check_mips16_stubs): Replace the DATA parameter with
	an INFO parameter.  Don't look through warnings symbols here;
	do it in mips_elf_check_symbols instead.
	(mips_elf_create_stub_symbol): New function.
	(mips_elf_la25_stub_hash, mips_elf_la25_stub_eq): New functions.
	(_bfd_mips_elf_init_stubs, mips_elf_local_pic_function_p): Likewise.
	(mips_elf_add_la25_intro, mips_elf_add_la25_trampoline): Likewise.
	(mips_elf_add_la25_stub, mips_elf_check_symbols): New functions.
	(mips_elf_gotplt_index): Check for VxWorks.
	(mips_elf_output_dynamic_relocation): Take the relocation index
	as an extra parameter.  Do not increment reloc_count here.
	(mips_elf_initialize_tls_slots): Update the calls to
	mips_elf_output_dynamic_relocation accordingly.
	(mips_elf_multi_got): Use htab->reserved_gotno instead of
	MIPS_RESERVED_GOTNO.
	(mips_elf_create_got_section): Don't allocate reserved GOT
	entries here.  Unconditionally create .got.plt, but don't
	set its alignment here.
	(mips_elf_relocation_needs_la25_stub): New function.
	(mips_elf_calculate_relocation): Redirect branches and jumps to
	a non-PIC stub if one exists.  Check !h->has_static_relocs instead
	of !htab->is_vxworks when deciding whether to create dynamic
	relocations for R_MIPS_32, R_MIPS_REL32 and R_MIPS_64.
	(_bfd_mips_elf_create_dynamic_sections): Unconditionally call
	_bfd_elf_create_dynamic_sections.  Unconditionally set up
	htab->splt and htab->sdynbss.  Set htab->srelplt to ".rel.plt"
	if !htab->is_vxworks.  Add non-VxWorks values of
	htab->plt_header_size and htab->plt_entry_size.
	(_bfd_mips_elf_check_relocs): Set pointer_equality_needed for
	non-branch static relocations.  Set has_nonpic_branches when an la25
	stub might be required.  Set can_make_dynamic_p to TRUE if R_MIPS_32,
	R_MIPS_REL32 and R_MIPS_64 relocations can be made dynamic,
	rather than duplicating the condition.  Do not make them dynamic
	for read-only sections in non-PIC executable objects.
	Do not protect this code with dynobj == NULL || htab->sgot == NULL;
	handle each group of cases separately.  Add a default case that
	sets has_static_relocs for non-GOT relocations that cannot be
	made dynamic.  Don't set is_relocation_target and is_branch_target.
	Reject non-PIC static relocations in shared objects.
	(_bfd_mips_vxworks_adjust_dynamic_symbol): Fold into...
	(_bfd_mips_elf_adjust_dynamic_symbol): ...here, using
	htab->use_plts_and_copy_relocs instead of htab->is_vxworks
	to select PLT and copy-reloc handling.  Set the alignment of
	.plt and .got.plt when allocating the first entry.  Generalize
	code to handle REL as well as RELA sections and 64-bit as well as
	32-bit GOT entries.  Complain if we find a static-only reloc
	against an externally-defined symbol and if we cannot create
	dynamic relocations for it.  Allocate copy relocs using
	mips_elf_allocate_dynamic_relocations on non-VxWorks targets.
	Set possibly_dynamic_relocs to 0 when using PLTs or copy relocs.
	Skip reserved .got.plt entries.
	(_bfd_mips_elf_always_size_sections): Use mips_elf_check_symbols
	instead of mips_elf_check_mips16_stubs to process each symbol.
	Do the traversal for relocatable objects too.
	(mips_elf_lay_out_got): Use htab->reserved_gotno instead of
	MIPS_RESERVED_GOTNO.
	(_bfd_mips_elf_size_dynamic_sections): Exclude sdynbss if it
	is empty.  Extend the DT_PLTREL, DT_JMPREL and DT_PLTRELSZ handling
	to non-VxWorks targets.  Only add DT_REL{,A}, DT_REL{,A}SZ and
	DT_REL{,A}ENT if .rel.dyn is nonempty.  Create a symbol for the
	PLT.  Allocate a nop at the end of the PLT.  Allocate DT_MIPS_PLTGOT.
	(mips_elf_create_la25_stub_info): New function.
	(_bfd_mips_elf_finish_dynamic_symbol): Write out PLT entries
	and copy relocs where necessary.  Check pointer_equality_needed.
	(mips_finish_exec_plt): New function.
	(_bfd_mips_elf_finish_dynamic_sections): Always set DT_PLTGOT
	to the beginning of htab->sgot.  Use htab->reserved_gotno instead
	of MIPS_RESERVED_GOTNO.  Assert htab->use_plts_and_copy_relocs
	instead of htab->is_vxworks for DT_PLTREL, DT_PLTRELSZ and DT_JMPREL.
	Set DT_PLTREL to DT_REL instead of DT_RELA on non-VxWorks targets.
	Use mips_finish_exec_plt to create non-VxWorks PLT headers.  Set
	DT_MIPS_PLTGOT.
	(_bfd_mips_elf_copy_indirect_symbol): Copy has_static_relocs
	from the indirect symbol to the direct symbol.  Also copy
	has_nonpic_branches for indirect symbols.
	(_bfd_mips_elf_get_target_dtag): Handle DT_MIPS_PLTGOT and
	DT_MIPS_RWPLT.
	(_bfd_mips_elf_link_hash_table_create): Initialize the new
	mips_elf_link_hash_table fields.
	(_bfd_mips_vxworks_link_hash_table_create): Set
	use_plts_and_copy_relocs to TRUE.  Use TRUE rather than 1
	when setting is_vxworks.
	(_bfd_mips_elf_use_plts_and_copy_relocs): New function.
	(_bfd_mips_elf_final_link): Call mips_elf_create_la25_stub for
	each la25_stub.
	(_bfd_mips_elf_merge_private_bfd_data): Treat dynamic objects
	as PIC.  Generalize message about linking PIC and non-PIC.
	(_bfd_mips_elf_plt_sym_val, _bfd_mips_post_process_headers): New
	functions.
	* reloc.c: Update comment near BFD_RELOC_MIPS_JUMP_SLOT.
	* bfd-in2.h: Regenerated.

2008-08-08  Richard Sandiford  <rdsandiford@googlemail.com>
	    Daniel Jacobowitz  <dan@codesourcery.com>
	    Catherine Moore  <clm@codesourcery.com>
	    Mark Shinwell  <shinwell@codesourcery.com>

	* readelf.c (get_mips_symbol_other): Handle STO_MIPS_PLT and
	STO_MIPS_PIC.
	(slurp_rela_relocs, slurp_rel_relocs): Handle MIPS ELF64 here.
	(dump_relocations, debug_apply_relocations): Don't handle it here.
	(get_mips_dynamic_type): Handle DT_MIPS_PLTGOT and DT_MIPS_RWPLT.
	(print_mips_pltgot_entry): New function.
	(process_mips_specific): Dump the PLT GOT.

2008-08-08  Richard Sandiford  <rdsandiford@googlemail.com>
	    Daniel Jacobowitz  <dan@codesourcery.com>

	* config/tc-mips.c (OPTION_CALL_NONPIC): New macro.
	(OPTION_NON_SHARED, OPTION_XGOT, OPTION_MABI, OPTION_32)
	(OPTION_N32, OPTION_64, OPTION_MDEBUG, OPTION_NO_MDEBUG)
	(OPTION_PDR, OPTION_NO_PDR, OPTION_MVXWORKS_PIC): Bump by 1.
	(md_longopts): Add -call_nonpic.
	(md_parse_option): Handle OPTION_CALL_NONPIC.
	(md_show_usage): Add -call_nonpic.

2008-08-08  Richard Sandiford  <rdsandiford@googlemail.com>

	* gas/mips/call-nonpic-1.s, gas/mips/call-nonpic-1.d: New test.
	* gas/mips/mips.exp: Run it.

2008-08-08  Richard Sandiford  <rdsandiford@googlemail.com>
	    Daniel Jacobowitz  <dan@codesourcery.com>
	    Catherine Moore  <clm@codesourcery.com>
	    Mark Shinwell  <shinwell@codesourcery.com>

	* mips.h (STO_MIPS_PLT, ELF_ST_IS_MIPS_PLT, ELF_ST_SET_MIPS_PLT)
	(STO_MIPS_PIC, DT_MIPS_PLTGOT, DT_MIPS_RWPLT): New macros.

2008-08-08  Richard Sandiford  <rdsandiford@googlemail.com>
	    Daniel Jacobowitz  <dan@codesourcery.com>

	* emulparams/elf32bmip.sh (GOT): Define, moving .got.plt to...
	(OTHER_RELRO_SECTIONS, OTHER_READWRITE_SECTIONS): ...one of these
	two variables.
	* emulparams/elf32bmipn32-defs.sh: Likewise.
	* emultempl/mipself.em: Include ldctor.h, elf/mips.h and elfxx-mips.h.
	(is_mips_elf): New macro.
	(stub_file, stub_bfd): New variables.
	(hook_stub_info): New structure.
	(hook_in_stub): New function.
	(mips_add_stub_section): Likewise.
	(mips_create_output_section_statements): Likewise.
	(mips_before_allocation): Likewise.
	(real_func): New variable.
	(mips_for_each_input_file_wrapper): New function.
	(mips_lang_for_each_input_file): Likewise.
	(lang_for_each_input_file): Define.
	(LDEMUL_BEFORE_ALLOCATION): Likewise.
	(LDEMUL_CREATE_OUTPUT_SECTION_STATEMENTS): Likewise.

2008-08-08  Richard Sandiford  <rdsandiford@googlemail.com>
	    Daniel Jacobowitz  <dan@codesourcery.com>

	* ld-mips-elf/mips16-pic-3a.s,
	ld-mips-elf/mips16-pic-3b.s,
	ld-mips-elf/mips16-pic-3.dd,
	ld-mips-elf/mips16-pic-3.gd,
	ld-mips-elf/mips16-pic-3.rd,
	ld-mips-elf/mips16-pic-3.inc,
	ld-mips-elf/pic-and-nonpic-1a.s,
	ld-mips-elf/pic-and-nonpic-1b.s,
	ld-mips-elf/pic-and-nonpic-1.ld,
	ld-mips-elf/pic-and-nonpic-1.dd,
	ld-mips-elf/pic-and-nonpic-1.nd,
	ld-mips-elf/pic-and-nonpic-1-rel.dd,
	ld-mips-elf/pic-and-nonpic-1-rel.nd,
	ld-mips-elf/pic-and-nonpic-2a.s,
	ld-mips-elf/pic-and-nonpic-2b.s,
	ld-mips-elf/pic-and-nonpic-2.d,
	ld-mips-elf/pic-and-nonpic-3a.s,
	ld-mips-elf/pic-and-nonpic-3a.ld,
	ld-mips-elf/pic-and-nonpic-3a.dd,
	ld-mips-elf/pic-and-nonpic-3a.gd,
	ld-mips-elf/pic-and-nonpic-3a.sd,
	ld-mips-elf/pic-and-nonpic-3b.s,
	ld-mips-elf/pic-and-nonpic-3b.ld,
	ld-mips-elf/pic-and-nonpic-3b.ad,
	ld-mips-elf/pic-and-nonpic-3b.dd,
	ld-mips-elf/pic-and-nonpic-3b.gd,
	ld-mips-elf/pic-and-nonpic-3b.nd,
	ld-mips-elf/pic-and-nonpic-3b.pd,
	ld-mips-elf/pic-and-nonpic-3b.rd,
	ld-mips-elf/pic-and-nonpic-3b.sd,
	ld-mips-elf/pic-and-nonpic-3-error.d,
	ld-mips-elf/pic-and-nonpic-4a.s,
	ld-mips-elf/pic-and-nonpic-4b.s,
	ld-mips-elf/pic-and-nonpic-4b.ld,
	ld-mips-elf/pic-and-nonpic-4b.ad,
	ld-mips-elf/pic-and-nonpic-4b.dd,
	ld-mips-elf/pic-and-nonpic-4b.gd,
	ld-mips-elf/pic-and-nonpic-4b.nd,
	ld-mips-elf/pic-and-nonpic-4b.rd,
	ld-mips-elf/pic-and-nonpic-4b.sd,
	ld-mips-elf/pic-and-nonpic-4-error.d,
	ld-mips-elf/pic-and-nonpic-5a.s,
	ld-mips-elf/pic-and-nonpic-5b.s,
	ld-mips-elf/pic-and-nonpic-5b.ld,
	ld-mips-elf/pic-and-nonpic-5b.ad,
	ld-mips-elf/pic-and-nonpic-5b.dd,
	ld-mips-elf/pic-and-nonpic-5b.gd,
	ld-mips-elf/pic-and-nonpic-5b.nd,
	ld-mips-elf/pic-and-nonpic-5b.rd,
	ld-mips-elf/pic-and-nonpic-5b.sd,
	ld-mips-elf/pic-and-nonpic-5b.pd,
	ld-mips-elf/pic-and-nonpic-6.ld,
	ld-mips-elf/pic-and-nonpic-6-o32a.s,
	ld-mips-elf/pic-and-nonpic-6-o32b.s,
	ld-mips-elf/pic-and-nonpic-6-o32c.s,
	ld-mips-elf/pic-and-nonpic-6-o32.ad,
	ld-mips-elf/pic-and-nonpic-6-o32.dd,
	ld-mips-elf/pic-and-nonpic-6-o32.gd,
	ld-mips-elf/pic-and-nonpic-6-o32.nd,
	ld-mips-elf/pic-and-nonpic-6-o32.pd,
	ld-mips-elf/pic-and-nonpic-6-o32.rd,
	ld-mips-elf/pic-and-nonpic-6-o32.sd,
	ld-mips-elf/pic-and-nonpic-6-n32a.s,
	ld-mips-elf/pic-and-nonpic-6-n32b.s,
	ld-mips-elf/pic-and-nonpic-6-n32c.s,
	ld-mips-elf/pic-and-nonpic-6-n32.ad,
	ld-mips-elf/pic-and-nonpic-6-n32.dd,
	ld-mips-elf/pic-and-nonpic-6-n32.gd,
	ld-mips-elf/pic-and-nonpic-6-n32.nd,
	ld-mips-elf/pic-and-nonpic-6-n32.pd,
	ld-mips-elf/pic-and-nonpic-6-n32.rd,
	ld-mips-elf/pic-and-nonpic-6-n32.sd,
	ld-mips-elf/pic-and-nonpic-6-n64a.s,
	ld-mips-elf/pic-and-nonpic-6-n64b.s,
	ld-mips-elf/pic-and-nonpic-6-n64c.s,
	ld-mips-elf/pic-and-nonpic-6-n64.ad,
	ld-mips-elf/pic-and-nonpic-6-n64.dd,
	ld-mips-elf/pic-and-nonpic-6-n64.gd,
	ld-mips-elf/pic-and-nonpic-6-n64.nd,
	ld-mips-elf/pic-and-nonpic-6-n64.pd,
	ld-mips-elf/pic-and-nonpic-6-n64.rd,
	ld-mips-elf/pic-and-nonpic-6-n64.sd: New tests.
	* ld-mips-elf/mips-elf.exp: Run them.
2008-08-08 19:24:49 +00:00
Alan Modra ef432bbddf * common.h (ELFOSABI_AROS): Update comment. 2008-08-03 23:20:42 +00:00
Peter Bergner b5bffab8d3 gas/
* config/tc-ppc.c (parse_cpu): Rename altivec_or_spe to retain_flags.
	Handle -mvsx and -mpower7.
	(md_show_usage): Document -mpower7 and -mvsx.
	* doc/as.texinfo (Target PowerPC): Document -mvsx.
	* doc/c-ppc.texi (PowerPC-Opts): Document -mvsx and -mpower7.

gas/testsuite/
	* gas/ppc/power7.d: New.
	* gas/ppc/power7.s: Likewise.
	* gas/ppc/ppc.exp: Run power7 test.

include/opcode/
	* ppc.h (PPC_OPCODE_VSX, PPC_OPERAND_VSR): New.

opcodes/
	* ppc-dis.c (powerpc_init_dialect): Handle power7 and vsx options.
	(print_insn_powerpc): Prepend 'vs' when printing VSX registers.
	(print_ppc_disassembler_options): Document -Mpower7 and -Mvsx.
	* ppc-opc.c (insert_xt6): New static function.
	(extract_xt6): Likewise.
	(insert_xa6): Likewise.
	(extract_xa6: Likewise.
	(insert_xb6): Likewise.
	(extract_xb6): Likewise.
	(insert_xb6s): Likewise.
	(extract_xb6s): Likewise.
	(XS6, XT6, XA6, XB6, XB6S, DM, XX3, XX3DM, XX1_MASK, XX3_MASK,
	XX3DM_MASK, PPCVSX): New.
	(powerpc_opcodes): Add opcodes "lxvd2x", "lxvd2ux", "stxvd2x",
	"stxvd2ux", "xxmrghd", "xxmrgld", "xxpermdi", "xvmovdp", "xvcpsgndp".
2008-08-02 04:38:51 +00:00
Alan Modra 79ea8bbb10 include/opcode/
* ppc.h (PPC_OPCODE_405): Define.
	(PPC_OPERAND_FSL, PPC_OPERAND_FCR, PPC_OPERAND_UDI): Define.
gas/
	* config/tc-ppc.c (parse_cpu): Separate handling of -m403/405.
	(md_show_usage): Likewise.
opcodes/
	* ppc-dis.c (print_insn_powerpc): Disassemble FSL/FCR/UDI fields.
	* ppc-opc.c (powerpc_operands): Add Xilinx APU related operands.
	(insert_sprg, PPC405): Use PPC_OPCODE_405.
	(powerpc_opcodes): Add Xilinx APU related opcodes.
2008-07-30 06:29:21 +00:00
Alan Modra d9f2119e32 Support PowerPC single-precision float. 2008-07-26 13:10:47 +00:00
Luis Machado 191f3bae17 * bfd/elf-bfd.h: Declare elfcore_write_ppc_vsx.
* bfd/elf.c (elfcore_grok_ppc_vsx): New function.
	(elfcore_write_ppc_vsx): New function
	(elfcore_grok_note): Handle VSX notes.
	(elfcore_write_register_note): Handle VSX notes.
	* include/elf/common.h: Define NT_PPC_VSX.
	* binutils/readelf.c (get_note_type): Handle VSX notes.
2008-07-21 05:33:37 +00:00
Jie Zhang 5423479e3f Revert my last change since it has not been approved. 2008-07-12 08:54:12 +00:00
Jie Zhang fb122200f5 bfd/
* elf.c (_bfd_elf_map_sections_to_segments): Don't put
	executable sections into the same segment with other
	read only sections if --sep-code.
	* elf32-bfin.c (elf32_bfin_code_in_l1): New variable.
	(elf32_bfin_data_in_l1): New variable.
	(elf32_bfin_final_write_processing): New.
	(elf32_bfin_special_sections[]): New.
	(elf_backend_final_write_processing): Define.
	(elf_backend_special_sections): Define.

	binutils/
	* readelf.c (get_machine_flags): Deal with Blackfin specific
	flags.

	include/
	* bfdlink.h (struct bfd_link_info): Add sep_code member
	variable.
	* elf/bfin.h (EF_BFIN_CODE_IN_L1): Define.
	(EF_BFIN_DATA_IN_L1): Define.

	ld/
	* Makefile.am (eelf32bfin.c): Depend on bfin.em.
	(eelf32bfinfd.c): Likewise.
	* Makefile.in: Regenerate.
	* gen-doc.texi: Set Blackfin.
	* ld.texinfo: Document --sep-code and Blackfin specific
	options.
	* ldmain.c (main): Initialize link_info.sep_code.
	* lexsup.c (enum option_values): Add OPTION_SEP_CODE.
	(ld_options[]): Add --sep-code.
	(parse_args): Deal with --sep-code.
	* emulparams/bfin.sh (EXTRA_EM_FILE): Define.
	* emulparams/elf32bfinfd.sh (OTHER_SECTIONS): Define.
	* emultempl/bfin.em: New file.
2008-07-11 19:24:39 +00:00
Richard Sandiford 186a804c15 include/elf/
* mips.h (ELF_ST_IS_MIPS16, ELF_ST_SET_MIPS16): New macros.

bfd/
	* elfxx-mips.c (mips_elf_check_mips16_stubs): Use ELF_ST_IS_MIPS16.
	(mips_elf_calculate_relocation): Likewise.
	(_bfd_mips_elf_add_symbol_hook): Likewise.
	(_bfd_mips_elf_finish_dynamic_symbol): Likewise.
	(_bfd_mips_vxworks_finish_dynamic_symbol): Likewise.

opcodes/
	* mips-dis.c (_print_insn_mips): Use ELF_ST_IS_MIPS16.

gas/
	* config/tc-mips.c (mips16_mark_labels): Use ELF_ST_SET_MIPS16.
	(mips_fix_adjustable): Likewise.
	(mips_frob_file_after_relocs): Likewise.

gas/testsuite/
	* gas/mips/mips16-vis-1.d, gas/mips/mips16-vis-1.s: New tests.
	* gas/mips/mips.exp: Run them.
2008-07-10 19:05:28 +00:00
Stan Shebs dd5e3247eb 2008-07-07 Stan Shebs <stan@codesourcery.com>
* dis-asm.h (struct disassemble_info): Add endian_code field.
2008-07-07 18:40:13 +00:00
Joel Brobecker d68240794e * safe-ctype.h: Add #include of ctype.h before redefining
the ctype.h macros.
2008-07-07 17:09:31 +00:00
Joel Brobecker 4261a8d107 * safe-ctype.h: Remove #error when detecting that ctype.h has been
included. Redefine the various macros provided by ctype.h as
        undefined variables.
2008-07-04 17:11:29 +00:00
DJ Delorie 6b9b8ecd85 merge from gcc 2008-06-24 03:01:29 +00:00
Swami Reddy M R 9c8883d423 common.h (EM_CR16): Correct value.
(EM_CR16): Rename to EM_CR16_OLD.
2008-06-18 11:04:29 +00:00
Swami Reddy M R 7f33231964 common.h (EM_CR16): Correct value.
(EM_CR16): Rename to EM_CR16_OLD.
2008-06-18 11:03:03 +00:00
Nick Clifton 4055a11236 * app.c (do_scrub_chars): Do not UNGET an EOF value.
* ti.h (GET_SCNHDR_NLNNO): Provide an alternative version of this
        macro which does not trigger an array bounds warning in gcc.
        (PUT_SCNHDR_NLNNO): Likewise.
        (GET_SCNHDR_FLAGS): Likewise.
        (PUT_SCNHDR_FLAGS): Likewise.
        (GET_SCNHDR_PAGE): Likewise.
        (PUT_SCNHDR_PAGE): Likewise.
2008-06-17 16:01:28 +00:00
Peter Bergner bc089f5083 include/opcode/
* ppc.h (ppc_cpu_t): New typedef.
	(struct powerpc_opcode <flags>): Use it.
	(struct powerpc_operand <insert, extract>): Likewise.
	(struct powerpc_macro <flags>): Likewise.

gas/
	* config/tc-ppc.c (ppc_cpu): Use ppc_cpu_t typedef.
	(ppc_insert_operand): Likewise.
	(ppc_machine): Likewise.
	* config/tc-ppc.h: #include "opcode/ppc.h"
	(struct _ppc_fix_extra <ppc_cpu>): Use ppc_cpu_t typedef.
	(ppc_cpu): Update extern decl.

opcodes/
	* ppc-dis.c (print_insn_powerpc): Update prototye to use new
	ppc_cpu_t typedef.
	(struct dis_private): New.
	(POWERPC_DIALECT): New define.
	(powerpc_dialect): Renamed to...
	(powerpc_init_dialect): This.  Update to use ppc_cpu_t and
	struct dis_private.
	(print_insn_big_powerpc): Update for using structure in
	info->private_data.
	(print_insn_little_powerpc): Likewise.
	(operand_value_powerpc): Change type of dialect param to ppc_cpu_t.
	(skip_optional_operands): Likewise.
	(print_insn_powerpc): Likewise.  Remove initialization of dialect.
	* ppc-opc.c (extract_bat, extract_bba, extract_bdm, extract_bdp,
	extract_bo, extract_boe, extract_fxm, extract_mb6, extract_mbe,
	extract_nb, extract_nsi, extract_rbs, extract_sh6, extract_spr,
	extract_sprg, extract_tbr insert_bat, insert_bba, insert_bdm,
	insert_bdp, insert_bo, insert_boe, insert_fxm, insert_mb6, insert_mbe,
	insert_nsi, insert_ral, insert_ram, insert_raq, insert_ras, insert_rbs,
	insert_sh6, insert_spr, insert_sprg, insert_tbr): Change the dialect
	param to be of type ppc_cpu_t.  Update prototype.
2008-06-13 20:16:00 +00:00
Nick Clifton dc70030aba * mips.h: Document new field descriptors +Q.
(OP_SH_SEQI, OP_MASK_SEQI): New bit mask and shift count for SEQI.

opcodes/

        * mips-dis.c (print_insn_args): Handle field descriptor +Q.
        * mips-opc.c (mips_builtin_opcodes): Add Octeon instructions seq,
        seqi, sne and snei.

gas/

        * config/tc-mips.c (validate_mips_insn): Handle field descriptor +Q.
        (mips_ip): Likewise.
        (macro_build): Likewise.
        (CPU_HAS_SEQ): New macro.
        (macro2) <M_SEQ_I, M_SNE_I>: Use it.  Emit seq/sne and seqi/snei.

gas/testsuite/

        * gas/mips/octeon.s, gas/mips/octeon.d: Add tests for seq* and sne*.
        * gas/mips/octeon-ill.s, gas/mips/octeon-ill.s: Add tests for seqi
        and snei.
2008-06-12 21:44:53 +00:00
DJ Delorie 637fe5e44f * common.h (EM_M32C_NEW): Rename to EM_M32C.
(EM_M32C): Rename to EM_M32C_OLD.

* elf32-m32c.c (ELF_MACHINE_ALT1): Define as EM_M32C_OLD.

* readelf.c (guess_is_rela): Add EM_M32C_OLD.
(dump_relocations): Likewise.
(process_section_headers): Likewise.
(is_32bit_abs_reloc): Likewise.
(is_16bit_abs_reloc): Likewise.
2008-06-12 19:49:47 +00:00
Nick Clifton d73fd47d38 include/opcode/
* mips.h: Document new field descriptors +x, +X, +p, +P, +s, +S.
        Update comment before MIPS16 field descriptors to mention MIPS16.
        (OP_SH_BBITIND, OP_MASK_BBITIND): New bit mask and shift count for
        BBIT.
        (OP_SH_CINSPOS, OP_MASK_CINSPOS, OP_SH_CINSLM1, OP_MASK_CINSLM1):
        New bit masks and shift counts for cins and exts.

gas/

        * config/tc-mips.c (validate_mips_insn): Handle field descriptors
        +x, +X, +p, +P, +s, +S.
        (mips_ip): Likewise.

opcodes/

        * mips-dis.c (print_insn_args): Handle field descriptors +x, +p,
        +s, +S.
        * mips-opc.c (mips_builtin_opcodes): Add Octeon instructions
        baddu, bbit*, cins*, dmul, pop, dpop, exts*, mtm*, mtp*, syncs,
        syncw, syncws, vm3mulu, vm0 and vmulu.

gas/testsuite/

        * gas/mips/octeon.s, gas/mips/octeon.d: Add tests for baddu,
        bbit*, cins*, dmul, pop, dpop, exts*, mtm*, mtp*, syncs, syncw,
        syncws, vm3mulu, vm0 and vmulu.
        * gas/mips/octeon-ill.s, gas/mips/octeon-ill.s: New test.
        * gas/mips/mips.exp: Run it.  Run octeon test with
        run_dump_test_arches.
2008-06-12 16:14:52 +00:00
Joseph Myers 345be70ea2 * common.h: Update e_machine table. 2008-06-12 12:44:01 +00:00
Kaz Kojima 27a07c4596 * sh.h (EF_SH_BFD_TABLE): Set bfd_mach_sh for EF_SH_UNKNOWN. 2008-06-09 22:20:46 +00:00
Joseph Myers f4b8818426 * common.h: Change registry@caldera.com to registry@sco.com. 2008-06-09 14:07:18 +00:00
Alan Modra 0345ae5042 include/
* bfdlink.h (struct bfd_link_info): Add "path_separator".
bfd/
	* elf32-spu.c (spu_elf_auto_overlay): Relax requirement that
	file names be unique.  Specify archive:path in overlay script.
ld/
	* ldlang.c (name_match): New function.
	(unique_section_p, walk_wild_consider_section): Use it here.
	(walk_wild_section_general): And here.
	(archive_path): New function.
	(walk_wild): Match archive:path filespecs.
	(open_input_bfds): Don't load archive:path files.
	* emultempl/spuelf.em (choose_target): Set path_separator.
	* emulparams/elf32_spu.sh: Add ._ea.* sections to ._ea output.
2008-06-06 06:01:53 +00:00
Nick Clifton 804c0cc6d0 * reloc-macros.h: Add a comment about the use of the
END_RELOC_NUMBERS symbol as a sentinel value.
        * arm.h (END_RELOC_NUMBERS): Provide a maximum value.
2008-05-21 14:50:07 +00:00
Adam Nemet b1d07c81ca * mips.h (INSN_MACRO): Move it up to the the pinfo macros.
(INSN2_M_FP_S, INSN2_M_FP_D): New pinfo2 macros.
2008-04-28 16:59:27 +00:00
David S. Miller a4ed1daa7f * elf/sparc.h (R_SPARC_GOTDATA_HIX22,
R_SPARC_GOTDATA_LOX10, R_SPARC_GOTDATA_OP_HIX22,
	R_SPARC_GOTDATA_OP_LOX10, R_SPARC_GOTDATA_OP,
	R_SPARC_H34, R_SPARC_SIZE32, R_SPARC_SIZE64): New relocs.
2008-04-16 08:35:17 +00:00
Nick Clifton 7ed2b9c492 Move entries for changes in sub-directories into the changelogs in those sub-
directories.
2008-04-16 08:33:54 +00:00
Alan Modra 962c961a36 ppc e500mc support 2008-04-14 11:01:38 +00:00
Andreas Krebbel 1d0a4e1490 2008-04-10 Andreas Krebbel <krebbel1@de.ibm.com>
* s390-dis.c (init_disasm): Evaluate disassembler_options.
	(print_s390_disassembler_options): New function.
	* disassemble.c (disassembler_usage): Invoke
	print_s390_disassembler_options.

2008-04-10  Andreas Krebbel  <krebbel1@de.ibm.com>

	* dis-asm.h (print_s390_disassembler_options):
	Prototype added.
2008-04-10 13:36:43 +00:00
Swami Reddy M R 3322254d27 sim-cr16.h: New file. Added for cr16 target. 2008-04-08 08:33:51 +00:00
H.J. Lu f47b47fb18 binutils/
2008-04-03  H.J. Lu  <hongjiu.lu@intel.com>

	* dwarf.c (dwarf_regnames_i386): Add AVX registers.
	(dwarf_regnames_x86_64): Likewise.

gas/

2008-04-03  H.J. Lu  <hongjiu.lu@intel.com>

	* NEWS: Mention AES, CLMUL, AVX/FMA and -msse2avx.

	* doc/c-i386.texi: Add avx, aes, clmul and fma to -march=.
	Document -msse2avx, .avx, .aes, .clmul and .fma.

	* config/tc-i386.c (YMMWORD_MNEM_SUFFIX): New.
	(vex_prefix): Likewise.
	(sse2avx): Likewise.
	(CPU_FLAGS_ARCH_MATCH): Likewise.
	(CPU_FLAGS_64BIT_MATCH): Likewise.
	(CPU_FLAGS_32BIT_MATCH): Likewise.
	(CPU_FLAGS_PERFECT_MATCH): Likewise.
	(regymm): Likewise.
	(vex_imm4): Likewise.
	(fits_in_imm4): Likewise.
	(build_vex_prefix): Likewise.
	(VEX_check_operands): Likewise.
	(bad_implicit_operand): Likewise.
	(OPTION_MSSE2AVX): Likewise.
	(T_YMMWORD): Likewise.
	(_i386_insn): Add vex.
	(cpu_arch): Add .avx, .aes, .clmul and .fma.
	(cpu_flags_match): Changed to take a pointer to const template.
	Enable encoding SSE instructions with VEX prefix for -msse2avx.
	(match_mem_size): Also check ymmword.
	(operand_type_match): Clear ymmword.
	(md_begin): Allow '_' in mnemonic.
	(type_names): Add OPERAND_TYPE_VEX_IMM4.
	(process_immext): Update assert.
	(md_assemble): Don't call process_immext if sse2avx and immext
	are true.  Call build_vex_prefix if vex is true.
	(parse_insn): Updated for cpu_flags_match.
	(swap_operands): Handle 5 operands.
	(match_template): Handle 5 operands. Updated for cpu_flags_match.
	Check regymm.  Call VEX_check_operands. Handle YMMWORD_MNEM_SUFFIX.
	(process_suffix): Handle YMMWORD_MNEM_SUFFIX.
	(check_byte_reg): Check regymm.
	(process_operands): Duplicate the destination register for
	-msse2avx if needed.
	(build_modrm_byte): Updated for instructions with VEX encoding.
	(output_insn): Output VEX prefix if needed.
	(md_longopts): Add msse2avx.
	(md_parse_option): Handle OPTION_MSSE2AVX.
	(md_show_usage): Add avx, aes, clmul, fma and -msse2avx.
	(intel_e09): Support YMMWORD.
	(intel_e11): Likewise.
	(intel_get_token): Likewise.

gas/testsuite/

2008-04-03  H.J. Lu  <hongjiu.lu@intel.com>

	* gas/i386/i386.exp: Run aes, aes-intel, x86-64-aes,
	x86-64-aes-intel, avx, avx-intel, inval-avx, x86-64-avx,
	x86-64-avx-intel and x86-64-inval-avx.

	* gas/cfi/cfi-i386.s: Add tests for AVX register maps.
	* gas/cfi/cfi-x86_64.s: Likewise.

	* gas/i386/aes.d: New.
	* gas/i386/aes.s: Likewise.
	* gas/i386/aes-intel.d: Likewise.
	* gas/i386/avx.d: Likewise.
	* gas/i386/avx.s: Likewise.
	* gas/i386/avx-intel.d: Likewise.
	* gas/i386/clmul.d: Likewise.
	* gas/i386/clmul-intel.d: Likewise.
	* gas/i386/clmul.s: Likewise.
	* gas/i386/i386.exp: Likewise.
	* gas/i386/inval-avx.l: Likewise.
	* gas/i386/inval-avx.s: Likewise.
	* gas/i386/sse2avx.d: Likewise.
	* gas/i386/sse2avx.s: Likewise.
	* gas/i386/x86-64-aes.d: Likewise.
	* gas/i386/x86-64-aes.s: Likewise.
	* gas/i386/x86-64-aes-intel.d: Likewise.
	* gas/i386/x86-64-avx.d: Likewise.
	* gas/i386/x86-64-avx.s: Likewise.
	* gas/i386/x86-64-avx-intel.d: Likewise.
	* gas/i386/x86-64-clmul.d: Likewise.
	* gas/i386/x86-64-clmul-intel.d: Likewise.
	* gas/i386/x86-64-clmul.s: Likewise.
	* gas/i386/x86-64-inval-avx.l: Likewise.
	* gas/i386/x86-64-inval-avx.s: Likewise.
	* gas/i386/x86-64-sse2avx.d: Likewise.
	* gas/i386/x86-64-sse2avx.s: Likewise.

	* gas/i386/arch-10.s: Add tests for AVX, AES, CLMUL and FMA.
	* gas/i386/x86-64-arch-2.s: Likewise.

	* gas/i386/rexw.s: Add AVX tests.

	* gas/i386/x86-64-opcode-inval.s: Remove lds/les test.

	* gas/cfi/cfi-i386.d: Updated.
	* gas/cfi/cfi-x86_64.d: Likewise.
	* gas/i386/arch-10.d:  Likewise.
	* gas/i386/arch-10-1.l: Likewise.
	* gas/i386/arch-10-2.l: Likewise.
	* gas/i386/arch-10-3.l: Likewise.
	* gas/i386/arch-10-4.l: Likewise.
	* gas/i386/rexw.d: Likewise.
	* gas/i386/x86-64-arch-2.d: Likewise.
	* gas/i386/x86-64-opcode-inval.d: Likewise.
	* gas/i386/x86-64-opcode-inval-intel.d: Likewise.

include/opcode/

2008-04-03  H.J. Lu  <hongjiu.lu@intel.com>

	* i386.h (MAX_OPERANDS): Set to 5.
	(MAX_MNEM_SIZE): Changed to 20.

opcodes/

2008-04-03  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-dis.c (OP_E_register): New.
	(OP_E_memory): Likewise.
	(OP_VEX): Likewise.
	(OP_EX_Vex): Likewise.
	(OP_EX_VexW): Likewise.
	(OP_XMM_Vex): Likewise.
	(OP_XMM_VexW): Likewise.
	(OP_REG_VexI4): Likewise.
	(PCLMUL_Fixup): Likewise.
	(VEXI4_Fixup): Likewise.
	(VZERO_Fixup): Likewise.
	(VCMP_Fixup): Likewise.
	(VPERMIL2_Fixup): Likewise.
	(rex_original): Likewise.
	(rex_ignored): Likewise.
	(Mxmm): Likewise.
	(XMM): Likewise.
	(EXxmm): Likewise.
	(EXxmmq): Likewise.
	(EXymmq): Likewise.
	(Vex): Likewise.
	(Vex128): Likewise.
	(Vex256): Likewise.
	(VexI4): Likewise.
	(EXdVex): Likewise.
	(EXqVex): Likewise.
	(EXVexW): Likewise.
	(EXdVexW): Likewise.
	(EXqVexW): Likewise.
	(XMVex): Likewise.
	(XMVexW): Likewise.
	(XMVexI4): Likewise.
	(PCLMUL): Likewise.
	(VZERO): Likewise.
	(VCMP): Likewise.
	(VPERMIL2): Likewise.
	(xmm_mode): Likewise.
	(xmmq_mode): Likewise.
	(ymmq_mode): Likewise.
	(vex_mode): Likewise.
	(vex128_mode): Likewise.
	(vex256_mode): Likewise.
	(USE_VEX_C4_TABLE): Likewise.
	(USE_VEX_C5_TABLE): Likewise.
	(USE_VEX_LEN_TABLE): Likewise.
	(VEX_C4_TABLE): Likewise.
	(VEX_C5_TABLE): Likewise.
	(VEX_LEN_TABLE): Likewise.
	(REG_VEX_XX): Likewise.
	(MOD_VEX_XXX): Likewise.
	(PREFIX_0F38DB..PREFIX_0F38DF): Likewise.
	(PREFIX_0F3A44): Likewise.
	(PREFIX_0F3ADF): Likewise.
	(PREFIX_VEX_XXX): Likewise.
	(VEX_OF): Likewise.
	(VEX_OF38): Likewise.
	(VEX_OF3A): Likewise.
	(VEX_LEN_XXX): Likewise.
	(vex): Likewise.
	(need_vex): Likewise.
	(need_vex_reg): Likewise.
	(vex_i4_done): Likewise.
	(vex_table): Likewise.
	(vex_len_table): Likewise.
	(OP_REG_VexI4): Likewise.
	(vex_cmp_op): Likewise.
	(pclmul_op): Likewise.
	(vpermil2_op): Likewise.
	(m_mode): Updated.
	(es_reg): Likewise.
	(PREFIX_0F38F0): Likewise.
	(PREFIX_0F3A60): Likewise.
	(reg_table): Add REG_VEX_71...REG_VEX_73 and REG_VEX_AE.
	(prefix_table): Add PREFIX_0F38DB..PREFIX_0F38DF, PREFIX_0F3ADF
	and PREFIX_VEX_XXX entries.
	(x86_64_table): Use VEX_C4_TABLE and VEX_C5_TABLE.
	(three_byte_table): Use PREFIX_0F38DB..PREFIX_0F38DF and
	PREFIX_0F3ADF.
	(mod_table): Use VEX_C4_TABLE, VEX_C5_TABLE and VEX_LEN_TABLE.
	Add MOD_VEX_XXX entries.
	(ckprefix): Initialize rex_original and rex_ignored.  Store the
	REX byte in rex_original.
	(get_valid_dis386): Handle the implicit prefix in VEX prefix
	bytes and USE_VEX_LEN_TABLE/USE_VEX_C4_TABLE/USE_VEX_C5_TABLE.
	(print_insn): Set need_vex/need_vex_reg/vex_i4_done to 0 before
	calling get_valid_dis386.  Use rex_original and rex_ignored when
	printing out REX.
	(putop): Handle "XY".
	(intel_operand_size): Handle VEX, xmm_mode, xmmq_mode and
	ymmq_mode.
	(OP_E_extended): Updated to use OP_E_register and
	OP_E_memory.
	(OP_XMM): Handle VEX.
	(OP_EX): Likewise.
	(XMM_Fixup): Likewise.
	(CMP_Fixup): Use ARRAY_SIZE.

	* i386-gen.c (cpu_flag_init): Add CpuAES, CPU_CLMUL_FLAGS,
	CPU_FMA_FLAGS and CPU_AVX_FLAGS.
	(operand_type_init): Add OPERAND_TYPE_REGYMM and
	OPERAND_TYPE_VEX_IMM4.
	(cpu_flags): Add CpuAVX, CpuAES, CpuCLMUL and CpuFMA.
	(opcode_modifiers): Add Implicit1stXmm0, Vex, Vex256, VexNDD,
	VexNDS, VexW0, VexW1, Vex0F, Vex0F38, Vex0F3A, Vex3Sources,
	VexImmExt and SSE2AVX.
	(operand_types): Add RegYMM, Ymmword and Vex_Imm4.

	* i386-opc.h (CpuAVX): New.
	(CpuAES): Likewise.
	(CpuCLMUL): Likewise.
	(CpuFMA): Likewise.
	(Vex): Likewise.
	(Vex256): Likewise.
	(VexNDS): Likewise.
	(VexNDD): Likewise.
	(VexW0): Likewise.
	(VexW1): Likewise.
	(Vex0F): Likewise.
	(Vex0F38): Likewise.
	(Vex0F3A): Likewise.
	(Vex3Sources): Likewise.
	(VexImmExt): Likewise.
	(SSE2AVX): Likewise.
	(RegYMM): Likewise.
	(Ymmword): Likewise.
	(Vex_Imm4): Likewise.
	(Implicit1stXmm0): Likewise.
	(CpuXsave): Updated.
	(CpuLM): Likewise.
	(ByteOkIntel): Likewise.
	(OldGcc): Likewise.
	(Control): Likewise.
	(Unspecified): Likewise.
	(OTMax): Likewise.
	(i386_cpu_flags): Add cpuavx, cpuaes, cpuclmul and cpufma.
	(i386_opcode_modifier): Add implicit1stxmm0, vex, vex256,
	vexnds, vexndd, vexw0, vexw1, vex0f, vex0f38, vex0f3a,
	vex3sources, veximmext and sse2avx.
	(i386_operand_type): Add regymm, ymmword and vex_imm4.

	* i386-opc.tbl: Add AES, CLMUL, AVX and FMA new instructions.

	* i386-reg.tbl: Add AVX registers, ymm0..ymm15.

	* i386-init.h: Regenerated.
	* i386-tbl.h: Likewise.
2008-04-03 14:03:20 +00:00
Eric Weddington 07e2a8f376 /gas:
2008-03-28  Eric B. Weddington  <eric.weddington@atmel.com>

	* config/tc-avr.c (mcu_types): Add attiny167.
	* doc/c-avr.texi: Likewise.

/include:
2008-03-28  Eric B. Weddington  <eric.weddington@atmel.com>

	* opcode/avr.h (AVR_ISA_TINY3): Define new opcode set for attiny167.
2008-03-28 21:51:38 +00:00
Nick Clifton cb411288ce Add support for thin archives.
* bfd/archive.c (_bfd_find_nested_archive): New function.
    (get_extended_arelt_filename): Add origin parameter.
    (_bfd_generic_read_ar_hdr_mag): Deal with extended name
    combined with a file offset.
    (append_relative_path): New function.
    (_bfd_get_elt_at_filepos): Deal with external members and
    nested archives.
    (bfd_generic_openr_next_archived_file): Thin archives.
    (bfd_generic_archive_p): Recognize new magic string.
    (adjust_relative_path): New function.
    (_bfd_construct_extended_name_table): Construct extended
    names for thin archive members.
    (_bfd_write_archive_contents): Emit new magic string, skip
    copying files for thin archives.
    * bfd/bfd-in.h (bfd_is_thin_archive): New macro.
    * bfd/bfd.c (struct bfd): New fields for thin archives.
    * bfd/libbfd-in.h (struct areltdata): New field for thin archives.
    * bfd/opncls.c (bfd_close): Delete BFDs for nested archives.
    * binutils/ar.c (make_thin_archive): New global flag.
    (map_over_members): Deal with full pathnames in thin archives.
    (usage, main): Add 'T' option for building thin archives.
    (replace_members): Pass thin archive flag to ar_emul_append.
    * binutils/arsup.c (ar_open): Initialize new flag.
    * binutils/binemul.c (ar_emul_append): Add new parameter for
    flattening nested archives.
    (do_ar_emul_default_append): New function.
    (ar_emul_default_append): Factored out recursive code.
    * binutils/binemul.h (ar_emul_default_append): Add new parameter.
    (struct bin_emulation_xfer_struct): New parameter for ar_append.
    * binutils/dlltool.c (gen_lib_file): Initialize thin archive flag.
    * binutils/emul_aix.c (ar_emul_aix_internal): Add new flatten
    parameter, currently unimplemented.
    All callers changed.
    * binutils/objcopy.c (copy_archive): Preserve thin archive flag.
    * binutils/doc/binutils.texi: Update ar documentation.
    * binutils/testsuite/binutils-all/ar.exp: Add thin archive tests.
    * include/aout/ar.h (ARMAGT): New magic string for thin archives.
2008-03-28 06:49:44 +00:00
Ian Lance Taylor 73de02f44b * common.h (NT_GNU_GOLD_VERSION): Define. 2008-03-25 04:58:21 +00:00
DJ Delorie f63cadb81a merge from gcc 2008-03-25 01:02:08 +00:00
Ian Lance Taylor c01f99ec87 Bring patch correction over from gcc repository. 2008-03-25 00:21:18 +00:00
Ian Lance Taylor f45a832315 * md5.h: Add extern "C" when compiled with C++. 2008-03-24 23:43:26 +00:00
Ian Lance Taylor b00c2ef98f * filenames.h: Add extern "C" when compiled with C++. 2008-03-21 23:40:18 +00:00
Andreas Krebbel 197dffcbd6 2008-03-19 Andreas Krebbel <krebbel1@de.ibm.com>
* opcodes/s390-mkopc.c (s390_opcode_cpu_val): S390_OPCODE_Z10 added.
	(s390_cond_extensions): Reduced extensions to the compare related.
	(main): z10 cpu type option added.
	(expandConditionalJump): Renamed to ...
	(insertExpandedMnemonic): ... this.

	* opcodes/s390-opc.c: Re-group the operand format makros.
	(INSTR_RIE_RRPU, INSTR_RIE_RRP0, INSTR_RIE_RUPI,
	INSTR_RIE_R0PI, INSTR_RIE_RUPU, INSTR_RIE_R0PU, INSTR_RIE_R0IU,
	INSTR_RIE_R0I0, INSTR_RIE_R0UU, INSTR_RIE_R0U0,
	INSTR_RIE_RRUUU, INSTR_RIS_RURDI, INSTR_RIS_R0RDI, INSTR_RIS_RURDU,
	INSTR_RIS_R0RDU, INSTR_RRF_U0RR, INSTR_RRF_00RR, INSTR_RRS_RRRDU,
	INSTR_RRS_RRRD0, INSTR_RXY_URRD, INSTR_SIY_IRD, INSTR_SIL_RDI,
	INSTR_SIL_RDU): New instruction formats added.
	(MASK_RIE_RRPU, MASK_RIE_RRP0, MASK_RIE_RUPI, MASK_RIE_R0PI,
	MASK_RIE_RUPU, MASK_RIE_R0PU, MASK_RIE_R0IU, MASK_RIE_R0I0,
	MASK_RIE_R0UU, MASK_RIE_R0U0, MASK_RIE_RRUUU, MASK_RIS_RURDI,
	MASK_RIS_R0RDI, MASK_RIS_RURDU, MASK_RIS_R0RDU, MASK_RRF_U0RR,
	MASK_RRF_00RR, MASK_RRS_RRRDU, MASK_RRS_RRRD0, MASK_RXY_URRD,
	MASK_SIY_IRD, MASK_SIL_RDI, MASK_SIL_RDU): New instruction format
	masks added.
	(s390_opformats): New formats added "ris", "rrs", "sil".
	* opcodes/s390-opc.txt: Add the conditional jumps with the
	extensions removed from automatic expansion in s390-mkopc.c manually.
	(asi - trtre): Add new System z10 EC instructions.
	* include/opcode/s390.h (s390_opcode_cpu_val): S390_OPCODE_Z10 added.

2008-03-19  Andreas Krebbel  <krebbel1@de.ibm.com>

	* config/tc-s390.c (md_parse_option): z10 option added.

2008-03-19  Andreas Krebbel  <krebbel1@de.ibm.com>

	* gas/s390/zarch-z10.d: New file.
	* gas/s390/zarch-z10.s: New file.
	* gas/s390/s390.exp: Run the z10 testcases.
2008-03-19 10:29:18 +00:00
Alan Modra fe389b5bfa include/elf/
* internal.h (Elf_Internal_Shdr): Change sh_link and sh_info from
	unsigned long to unsigned int.  Change sh_addralign to bfd_vma.
	Order struct as for external version.
bfd/
	* elf.c (_bfd_elf_make_section_from_shdr): Remove unnecessary cast.
	(_bfd_elf_assign_file_position_for_section): Simplify align.
	(_bfd_elf_init_reloc_shdr): Ensure shift expression wide enough
	for sh_addralign.
	(elf_fake_sections, swap_out_syms): Likewise.
	* elflink.c (bfd_elf_final_link): Likewise.
binutils/
	* readelf.c: Use %u throughout when printing sh_link or sh_info,
	%lu when printing sh_addralign.
	(process_version_sections): Use identical formats when printing
	all offset and sh_link fields.
2008-03-13 05:27:41 +00:00
Alan Modra 674310fb40 include/elf/
PR 5900
	* common.h (SHN_BAD): Delete.
	(SHN_LORESERVE .. SHN_HIRESERVE): Move to..
	* external.h: ..here.
	* internal.h (SHN_LORESERVE, SHN_HIRESERVE): Define.
	(SHN_LOPROC, SHN_HIPROC, SHN_LOOS, SHN_HIOS): Define.
	(SHN_ABS, SHN_COMMON, SHN_XINDEX, SHN_BAD): Define.
bfd/
	PR 5900
	* elf-bfd.h: Include elf/internal.h after elf/external.h.
	* elfcode.h (elf_swap_symbol_in): Map reserved shndx range.
	(elf_swap_symbol_out): Adjust SHN_XINDEX test.
	(elf_swap_ehdr_out): Mask SHN_LORESERVE and SHN_XINDEX to values
	seen in external structs.
	(valid_section_index_p): Delete.
	(elf_object_p): Don't increment section numbers over reserved range.
	Simplify test for valid sh_link, sh_info and e_shstrndx fields.
	(elf_write_shdrs_and_ehdr): Mask SHN_LORESERVE and SHN_XINDEX to values
	seen in external structs.  Don't increment section numbers over
	reserved range.
	* elf.c (bfd_elf_sym_name): Remove redundant tests on st_shndx.
	(bfd_section_from_shdr): Likewise.
	(group_signature): Range check before accessing elf_elfsections.
	(_bfd_elf_setup_sections): Likewise.
	(bfd_section_from_shdr): Likewise.
	(bfd_section_from_shdr): Don't increment section number over
	reserved sections.
	(assign_file_positions_for_non_load_sections): Likewise.
	(assign_file_positions_except_relocs): Likewise.
	(_bfd_elf_write_object_contents): Likewise.
	(assign_section_numbers): Likewise.  Adjust for changed SHN_*.
	(prep_headers): Delete unused variable.
	* elflink.c (bfd_elf_link_record_local_dynamic_symbol): Adjust
	for changed SHN_* values.
	(check_dynsym, elf_link_input_bfd): Likewise.
	(bfd_elf_final_link): Likewise.  Don't skip over reserved section
	range.
	(elf_fixup_link_order): Check that sh_link field is valid.
	* elf-hppa.h (elf_hppa_add_symbol_hook): Make "index" unsigned.
	* elf32-arm.c (elf32_arm_gc_mark_extra_sections): Range check before
	accesssing elf_elfsections.
	* elf32-avr.c (elf32_avr_size_stubs): Likewise.
	* elf32-hppa.c (elf32_hppa_size_stubs): Likewise.
	* elf32-m68hc1x.c (elf32_m68hc11_size_stubs): Likewise.
	* elf64-hppa.c (elf64_hppa_check_relocs): Adjust for changed
	SHN_* defines.  Test for SHN_BAD return from
	_bfd_elf_section_from_bfd_section
binutils/
	PR 5900
	* readelf.c (SECTION_HEADER_INDEX, SECTION_HEADER_NUM): Delete.
	Remove use throughout file.
	(SECTION_HEADER): Likewise.
	(dump_relocations): Don't adjust st_shndx for reserved range.
	(process_file_header): Mask SHN_XINDEX to values seen in external
	elf structs.  Simplify valid section index tests.
	(get_32bit_elf_symbols, get_64bit_elf_symbols): Mask SHN_XINDEX.
	Map reserved st_shndx to internal form.
	(process_section_groups): Test that group symbol st_shndx is in
	range, not just non-zero.  Delete reserved range check.
	(get_symbol_index_type): Mask "type" to 16 bits when printing PRC,
	OS or RSV.
gdb/
	PR 5900
	* elfread.c (elf_symtab_read): Make shndx an unsigned int.
	* mipsread.c: Include elf/internal.h.
	(read_alphacoff_dynamic_symtab): Map external reserved sym_shndx
	to internal range.
ld/testsuite/
	PR 5900
	* ld-elf/sec64k.exp: Update.
2008-03-12 08:36:58 +00:00
Alan Modra 93f73715d1 * elf/cr16c.h (SHN_CR16C_FCOMMON): Define using SHN_LORESERVE.
(SHN_CR16C_NCOMMON): Likewise.
	* elf/hppa.h (SHN_PARISC_ANSI_COMMON): Likewise.
	(SHN_PARISC_HUGE_COMMON): Likewise.
	* elf/ia64.h (SHN_IA_64_ANSI_COMMON): Likewise.
	(SHN_IA_64_VMS_SYMVEC): Define using SHN_LOOS.
	* elf/m32r.h (SHN_M32R_SCOMMON): Define using SHN_LORESERVE.
	* elf/mips.h (SHN_MIPS_ACOMMON, SHN_MIPS_TEXT): Likewise.
	(SHN_MIPS_DATA, SHN_MIPS_SCOMMON, SHN_MIPS_SUNDEFINED): Likewise.
	* elf/score.h (SHN_SCORE_TEXT, SHN_SCORE_DATA): Likewise.
	(SHN_SCORE_SCOMMON): Likewise.
	* elf/sparc.h (SHN_BEFORE, SHN_AFTER): Likewise.
	* elf/v850.h (SHN_V850_SCOMMON, SHN_V850_TCOMMON): Likewise.
	(SHN_V850_ZCOMMON): Likewise.
	* elf/x86-64.h (SHN_X86_64_LCOMMON): Likewise.
2008-03-11 23:21:08 +00:00
Paul Brook 3461c83a05 2008-03-09 Paul Brook <paul@codesourcery.com>
bfd/
	* elf32-arm.c (elf32_arm_merge_eabi_attributes): Handle new
	Tag_VFP_arch values.

	binutils/
	* readelf.c (arm_attr_tag_VFP_arch): Add "VFPv3-D16".

	gas/
	* config/tc-arm.c (fpu_vfp_ext_d32): New vairable.
	(parse_vfp_reg_list, encode_arm_vfp_reg): Use it.
	(arm_option_cpu_value): Add vfpv3-d16, vfpv2 and vfpv3.
	(aeabi_set_public_attributes): Handle Tag_VFP_arch=VFPV3-D16.
	* doc/c-arm.texi: Document new ARM FPU variants.

	gas/testsuite/
	* gas/arm/vfpv3-d16-bad.d: New test.
	* gas/arm/vfpv3-d16-bad.l: New test.

	include/opcode/
	* arm.h (FPU_VFP_EXT_D32, FPU_VFP_V3D16, FPU_ARCH_VFP_V3D16): Define.
2008-03-09 13:23:29 +00:00
Paul Brook e3bf57046b 2008-03-04 Paul Brook <paul@codesourcery.com>
gas/
	* config/tc-arm.c (arm_ext_barrier, arm_ext_msr): New.
	(arm_ext_v7m): Rename...
	(arm_ext_m): ... to this.  Include v6-M.
	(do_t_add_sub): Allow narrow low-reg non flag setting adds.
	(do_t_mrs, do_t_msr, aeabi_set_public_attributes): Use arm_ext_m.
	(md_assemble): Allow wide msr instructions.
	(insns): Add classifications for v6-m instructions.
	(arm_cpu_option_table): Add cortex-m1.
	(arm_arch_option_table): Add armv6-m.
	(cpu_arch): Add ARM_ARCH_V6M.  Fix numbering of other v6 variants.

	gas/testsuite/
	* gas/arm/archv6m.d: New test.
	* gas/arm/archv6m.s: New test.
	* gas/arm/t16-bad.s: Test low register non flag setting add.
	* gas/arm/t16-bad.l: Update expected output.

	include/opcode/
	* arm.h (ARM_EXT_V6M, ARM_EXT_BARRIER, ARM_EXT_THUMB_MSR): Define.
	(ARM_AEXT_V6T2, ARM_AEXT_V7_ARM, ARM_AEXT_V7M): Use new flags.
	(ARM_AEXT_V6M, ARM_ARCH_V6M): Define.
2008-03-05 01:31:26 +00:00
Nick Clifton 193b9a616d * dwarf2.h: (enum dwarf_location_atom): Add new DW_OP,
DW_OP_PGI_omp_thread_num.

* dwarf.c (decode_location_expression): Handle
  DW_OP_PGI_omp_thread_num.
2008-03-03 10:19:01 +00:00
Nick Clifton fb91cb7a41 Change accreditation for patch for PR3134 2008-02-29 14:43:17 +00:00
Nick Clifton ca504a0dee PR 3134
* h8300.h (h8_opcodes): Add an encoding for a mov.l instruction
   with a 32-bit displacement but without the top bit of the 4th byte
   set.

   * gas/h8300/pr3134.s: New test.
   * gas/h8300/pr3134.d: Expected disassembly
   * gas/h8300/h8300.exp: Run the new test.

   * gas/h8300/h8300-coff.exp: Fix test for COFF based ports to
   accept h8300-rtemscoff not just h8300-rtems.
2008-02-27 12:33:42 +00:00
Nick Clifton 344f17f1fa * cr16.h (cr16_num_optab): Declared.
* cr16-opc.c  (cr16_num_optab): Defined
2008-02-18 13:46:45 +00:00
Alan Modra d039978069 include/
* bfdlink.h (struct bfd_link_hash_table): Delete creator field.
	(struct bfd_link_info): Add output_bfd.
bfd/
	* elflink.c: Replace all accesses to hash->creator field with
	output_bfd->xvec.
	* cofflink.c: Likewise.
	* coff-h8300.c: Likewise.
	* ecoff.c: Likewise.
	* elf32-m68hc1x.c: Likewise.
	* elf32-ppc.c: Likewise.
	* elf64-alpha.c: Likewise.
	* elf64-ppc.c: Likewise.
	* elf64-sparc.c: Likewise.
	* elfxx-mips.c: Likewise.
	* i386linux.c: Likewise.
	* m68klinux.c: Likewise.
	* sparclinux.c: Likewise.
	* sunos.c: Likewise.
	* xcofflink.c: Likewise.
	* linker.c: Likewise.
	(_bfd_link_hash_table_init): Don't store creator.
ld/
	* ldmain.h (output_bfd): Delete.
	* ldmain.c (output_bfd): Delete.
	Replace all occurrences of output_bfd with link_info.output_bfd.
	* ldcref.c: Likewise.
	* ldctor.c: Likewise.
	* ldemul.c: Likewise.
	* ldexp.c: Likewise.
	* ldfile.c: Likewise.
	* ldlang.c: Likewise.
	* ldmisc.c: Likewise.
	* ldwrite.c: Likewise.
	* pe-dll.c: Likewise.
	* emultempl/aix.em: Likewise.
	* emultempl/alphaelf.em: Likewise.
	* emultempl/armcoff.em: Likewise.
	* emultempl/armelf.em: Likewise.
	* emultempl/avrelf.em: Likewise.
	* emultempl/beos.em: Likewise.
	* emultempl/elf-generic.em: Likewise.
	* emultempl/elf32.em: Likewise.
	* emultempl/gld960.em: Likewise.
	* emultempl/hppaelf.em: Likewise.
	* emultempl/irix.em: Likewise.
	* emultempl/linux.em: Likewise.
	* emultempl/lnk960.em: Likewise.
	* emultempl/m68hc1xelf.em: Likewise.
	* emultempl/mmix-elfnmmo.em: Likewise.
	* emultempl/mmo.em: Likewise.
	* emultempl/pe.em: Likewise.
	* emultempl/pep.em: Likewise.
	* emultempl/ppc32elf.em: Likewise.
	* emultempl/ppc64elf.em: Likewise.
	* emultempl/scoreelf.em: Likewise.
	* emultempl/sh64elf.em: Likewise.
	* emultempl/spuelf.em: Likewise.
	* emultempl/sunos.em: Likewise.
	* emultempl/vanilla.em: Likewise.
	* emultempl/vxworks.em: Likewise.
	* emultempl/xtensaelf.em: Likewise.
	* emultempl/z80.em: Likewise.
	* ldlang.c (open_output): Don't return output, instead write
	link_info_output_bfd directly.
	* emultempl/alphaelf.em: Replace occurrences of link_info.hash->creator
	with link_info.output_bfd->xvec.
	* emultempl/hppaelf.em: Likewise.
	* emultempl/ppc32elf.em: Likewise.
	* emultempl/ppc64elf.em: Likewise.
	* emultempl/spuelf.em: Likewise.
2008-02-15 03:35:51 +00:00
Nick Clifton f16db7f54e PR gas/2626
* avr.h (AVR_ISA_2xxe): Define.

        * config/tc-avr.c (mcu_types): Change the ISA tyoe of the attiny26
        to AVR_ISA_2xxe.
        (avr_operand): Disallow post-increment addressing in the lpm
        instruction for the attiny26.
2008-02-14 13:04:29 +00:00
Bob Wilson 001e850653 * xtensa-config.h (XCHAL_HAVE_THREADPTR): Redefine to zero.
(XCHAL_NUM_AREGS, XCHAL_MAX_INSTRUCTION_SIZE): New.
2008-02-11 17:53:04 +00:00
Adam Nemet 58d470721b * mips.h: Update copyright.
(INSN_CHIP_MASK): New macro.
	(INSN_OCTEON): New macro.
	(CPU_OCTEON): New macro.
	(OPCODE_IS_MEMBER): Handle Octeon instructions.
2008-02-04 19:25:05 +00:00
Adam Nemet ce4a642382 * mips.h: Update copyright.
(E_MIPS_MACH_OCTEON): New macro.
2008-02-04 19:21:25 +00:00
Nick Clifton f022e6b98e Add OpenVMS extensions.
* ia64.h (SHF_IA_64_VMS_GLOBAL, SHF_IA_64_VMS_OVERLAID)
        (SHF_IA_64_VMS_SHARED, SHF_IA_64_VMS_VECTOR)
        (SHF_IA_64_VMS_ALLOC_64BIT, SHF_IA_64_VMS_PROTECTED)
        (SHT_IA_64_VMS_TRACE, SHT_IA_64_VMS_TIE_SIGNATURES)
        (SHT_IA_64_VMS_DEBUG, SHT_IA_64_VMS_DEBUG_STR)
        (SHT_IA_64_VMS_LINKAGES, SHT_IA_64_VMS_SYMBOL_VECTOR)
        (SHT_IA_64_VMS_FIXUP, DT_IA_64_VMS_SUBTYPE)
        (DT_IA_64_VMS_IMGIOCNT, DT_IA_64_VMS_LNKFLAGS)
        (DT_IA_64_VMS_VIR_MEM_BLK_SIZ, DT_IA_64_VMS_IDENT)
        (DT_IA_64_VMS_NEEDED_IDENT, DT_IA_64_VMS_IMG_RELA_CNT)
        (DT_IA_64_VMS_SEG_RELA_CNT, DT_IA_64_VMS_FIXUP_RELA_CNT)
        (DT_IA_64_VMS_FIXUP_NEEDED, DT_IA_64_VMS_SYMVEC_CNT)
        (DT_IA_64_VMS_XLATED, DT_IA_64_VMS_STACKSIZE)
        (DT_IA_64_VMS_UNWINDSZ, DT_IA_64_VMS_UNWIND_CODSEG)
        (DT_IA_64_VMS_UNWIND_INFOSEG, DT_IA_64_VMS_LINKTIME)
        (DT_IA_64_VMS_SEG_NO, DT_IA_64_VMS_SYMVEC_OFFSET)
        (DT_IA_64_VMS_SYMVEC_SEG, DT_IA_64_VMS_UNWIND_OFFSET)
        (DT_IA_64_VMS_UNWIND_SEG, DT_IA_64_VMS_STRTAB_OFFSET)
        (DT_IA_64_VMS_SYSVER_OFFSET, DT_IA_64_VMS_IMG_RELA_OFF)
        (DT_IA_64_VMS_SEG_RELA_OFF, DT_IA_64_VMS_FIXUP_RELA_OFF)
        (DT_IA_64_VMS_PLTGOT_OFFSET, DT_IA_64_VMS_PLTGOT_SEG)
        (DT_IA_64_VMS_FPMODE, SHN_IA_64_VMS_SYMVEC): Define

        * readelf.c (dump_relocations): Decode OpenVMS-specific sections.
        (get_ia64_dynamic_type): Decode OpenVMS-specific tags.
        (get_dynamic_type): Handle IA64-specific tags.
        (get_ia64_section_type_name): Handle OpenVMS-specific sections.
        (get_section_type_name): Handle OS-specific sections (and
        particularly IA64 OpenVMS one).
        (get_elf_section_flags): Makes flags static.  Add entries for IA64 and
        decode them.
2008-01-30 10:37:43 +00:00
David Daney a665fef641 include/
2008-01-26  David Daney  <ddaney@avtrex.com>

	* demangle.h (demangle_component_type):  Add
	DEMANGLE_COMPONENT_JAVA_RESOURCE,
	DEMANGLE_COMPONENT_COMPOUND_NAME, and
	DEMANGLE_COMPONENT_CHARACTER as new enum values.
	(demangle_component): Add struct s_character to union u.

libiberty/
2008-01-26  David Daney  <ddaney@avtrex.com>

	* cp-demangle.c (d_dump): Handle DEMANGLE_COMPONENT_JAVA_RESOURCE,
	DEMANGLE_COMPONENT_COMPOUND_NAME, and
	DEMANGLE_COMPONENT_CHARACTER cases.
	(d_make_comp): Handle DEMANGLE_COMPONENT_COMPOUND_NAME and
	DEMANGLE_COMPONENT_JAVA_RESOURCE cases.
	(d_make_character): New function.
	(d_java_resource): Same.
	(d_special_name): Handle "Gr" case.
	(d_print_comp): Handle DEMANGLE_COMPONENT_JAVA_RESOURCE,
	DEMANGLE_COMPONENT_COMPOUND_NAME, and
	DEMANGLE_COMPONENT_CHARACTER cases.
	* testsuite/demangle-expected: Add test for java resource name
	mangling.
2008-01-27 06:25:45 +00:00
Eric Weddington 4be948a34a /gas:
2008-01-23  Eric B. Weddington  <eric.weddington@atmel.com>

	* config/tc-avr.c (mcu_types): Change opcode set for at86rf401.

/include:
2008-01-23  Eric B. Weddington  <eric.weddington@atmel.com>

	* opcode/avr.h (AVR_ISA_RF401): Add new opcode set for at86rf401.
2008-01-23 17:36:23 +00:00
Mark Kettenis 60308c48f2 * common.h (AT_SUN_AUXFLAGS): Define. 2008-01-16 22:01:42 +00:00
Eric Weddington c7b8bedfb2 /gas:
2008-01-03  Eric B. Weddington  <eric.weddington@atmel.com>

	* config/tc-avr.c (mcu_types): Change opcode set for avr3,
	at90usb82, at90usb162.
	* doc/c-avr.texi: Change architecture grouping for at90usb82,
	at90usb162.
	These changes support the new avr35 architecture group in gcc.

/include:
2008-01-03  Eric B. Weddington  <eric.weddington@atmel.com>

	* opcode/avr.h (AVR_ISA_USB162): Add new opcode set.
	(AVR_ISA_AVR3): Likewise.
2008-01-16 17:59:07 +00:00
Daniel Jacobowitz 2dba9eb2d4 Updated copyright notices for most files. 2008-01-01 22:53:22 +00:00
Daniel Jacobowitz fb09a73e93 * dwarf2.h (DW_AT_hi_user): Correct value. 2007-12-11 12:56:21 +00:00
Bob Wilson 1995e606d8 2007-12-07 Bob Wilson <bob.wilson@acm.org>
include/elf/
	* xtensa.h (R_XTENSA_32_PCREL): New.

bfd/
	* elf32-xtensa.c (elf_howto_table): Add R_XTENSA_32_PCREL.
	(elf_xtensa_reloc_type_lookup): Handle BFD_RELOC_32_PCREL.
	(elf_xtensa_check_relocs): Use default case for all relocations that
	need nothing done here.
	(elf_xtensa_do_reloc): Compute self_address for all relocation types.
	Handle R_XTENSA_32_PCREL.
	(elf_xtensa_relocate_section): Check for R_XTENSA_32_PCREL for dynamic
	symbols.
	(check_section_ebb_pcrels_fit): Ignore R_XTENSA_32_PCREL relocations.

gas/
	* config/tc-xtensa.c (O_pcrel): Define.
	(suffix_relocs): Add pcrel suffix.
	(md_pseudo_table): Add 4byte and 2byte directives.
	(xtensa_elf_cons): Pass correct pcrel argument to fix_new_exp.
	(xg_assemble_literal): Likewise.  Check for O_pcrel.
	(expression_maybe_register): Reorganize.  Handle BFD_RELOC_32_PCREL.
	(xg_valid_literal_expression): Allow O_pcrel.
	(md_pcrel_from, md_apply_fix): Handle BFD_RELOC_32_PCREL.
	(tc_gen_reloc): Fix punctuation in error message.

gas/testsuite/
	* gas/xtensa/all.exp: Run new pcrel test.
	* gas/xtensa/err-pcrel.s: New.
	* gas/xtensa/pcrel.d: New.
	* gas/xtensa/pcrel.s: New.
	* gas/xtensa/xtensa-err.exp: New.
2007-12-07 22:52:08 +00:00
Mark Shinwell 47c9864a0a bfd/
* archures.c (bfd_mach_mips_loongson_2e): New.
	(bfd_mach_mips_loongson_2f): New.
	* bfd-in2.h (bfd_mach_mips_loongson_2e): New.
	(bfd_mach_mips_loongson_2f): New.
	* cpu-mips.c: Add I_loongson_2e and I_loongson_2f to
	anonymous enum.
	(arch_info_struct): Add Loongson-2E and Loongson-2F entries.
	* elfxx-mips.c (_bfd_elf_mips_mach): Handle Loongson-2E
	and Loongson-2F flags.
	(mips_set_isa_flags): Likewise.
	(mips_mach_extensions): Add Loongson-2E and Loongson-2F
	entries.

	binutils/
	* readelf.c (get_machine_flags): Handle Loongson-2E and -2F
	flags.

	gas/
	* config/tc-mips.c (mips_cpu_info_table): Add loongson2e
	and loongson2f entries.
	* doc/c-mips.texi: Document -march=loongson{2e,2f} options.

	gas/testsuite/
	* gas/mips/mips.exp: Add loongson-2e and -2f tests.
	* gas/mips/loongson-2e.d: New.
	* gas/mips/loongson-2e.s: New.
	* gas/mips/loongson-2f.d: New.
	* gas/mips/loongson-2f.s: New.

	include/elf/
	* mips.h (E_MIPS_MACH_LS2E): New.
	(E_MIPS_MACH_LS2F): New.

	include/opcode/
	* mips.h (INSN_LOONGSON_2E): New.
	(INSN_LOONGSON_2F): New.
	(CPU_LOONGSON_2E): New.
	(CPU_LOONGSON_2F): New.
	(OPCODE_IS_MEMBER): Update for Loongson-2E and -2F flags.

	opcodes/
	* mips-dis.c (mips_arch_choices): Add Loongson-2E and -2F
	entries.
	* mips-opc.c (IL2E): New.
	(IL2F): New.
	(mips_builtin_opcodes): Add Loongson-2E and -2F instructions.
	Allow movz and movn for Loongson-2E and -2F.  Add movnz entry.
	Move coprocessor encodings to the end of the table.  Allow
	certain MIPS V .ps instructions on the Loongson-2E and -2F.
2007-11-29 12:23:44 +00:00
Mark Shinwell 35e137475d include/opcode/
* mips.h (INSN_ISA*): Redefine certain values as an
	enumeration.  Update comments.
	(mips_isa_table): New.
	(ISA_MIPS*): Redefine to match enumeration.
	(OPCODE_IS_MEMBER): Modify to correctly test new INSN_ISA*
	values.

	opcodes/
	* mips-opc.c (I3_32, I3_33, I4_32, I4_33, I5_33): New.
	(mips_builtin_opcodes): Use these new I* values.
2007-11-29 11:55:19 +00:00
Nathan Sidwell 02cb1fd853 * internal.h (ELF_IS_SECTION_IN_SEGMENT): Adjust to cope with
segments at the end of memory.
2007-11-28 13:53:05 +00:00
Thiemo Seufer 91f2f75ac8 [ld/testsuite/ChangeLog]
* ld-mips-elf/attr-gnu-4-14.d, ld-mips-elf/attr-gnu-4-41.d:
	Adjust warning message for -mfp64 flag.
	* ld-mips-elf/attr-gnu-4-5.s, ld-mips-elf/attr-gnu-4-04.d,
	ld-mips-elf/attr-gnu-4-51.d, ld-mips-elf/attr-gnu-4-05.d,
	ld-mips-elf/attr-gnu-4-15.d, ld-mips-elf/attr-gnu-4-24.d,
	ld-mips-elf/attr-gnu-4-25.d, ld-mips-elf/attr-gnu-4-34.d,
	ld-mips-elf/attr-gnu-4-35.d, ld-mips-elf/attr-gnu-4-42.d,
	ld-mips-elf/attr-gnu-4-43.d, ld-mips-elf/attr-gnu-4-44.d,
	ld-mips-elf/attr-gnu-4-45.d, ld-mips-elf/attr-gnu-4-40.d,
	ld-mips-elf/attr-gnu-4-14.d: New testcases files.
	* ld-mips-elf/mips-elf.exp: Run new testcases.

	[binutils/ChangeLog]
	* readelf.c (display_mips_gnu_attribute): Recognize -mips32r2 -mfp64
	objects.

	[include/ChangeLog]
	* elf/mips.h (Tag_GNU_MIPS_ABI_FP): Mention -mips32r2 -mfp64 variant
	in comment.

	[bfd/ChangeLog]
	* elfxx-mips.c (mips_elf_merge_obj_attributes): Handle -mips32r2
	-mfp64 attribute.

	[gas/ChangeLog]
	* doc/as.texinfo: Document the new attribute value.
2007-11-17 13:38:57 +00:00
Nick Clifton 3c48ef66da * dwarf2.h: Mention the location of the DWARF3 spec on the web.
(DW_AT_stride_size): Rename to DW_AT_bit_stride.
  (DW_AT_stride): Rename to DW_AT_byte_stride.
* dwarf.c (process_extended_line_op): Add cases for HP extensions to the line ops.
  Mention if an unknown op code is in the user defined range.
  (decode_location_expression): Add cases for HP extensions, the DW_OP_GNU_uninit extension and the DW_OP_call_frame_cfa and DW_OP_bit_piece DWARF3 operators.
  (read_and_display_attr): Correct list of attributes which can reference a location list.
  (read_and_display_attr_value): Add cases for DWARF3 values and HP extensions.
  Correct list of attributes which can reference a location list.
  (get_AT_name): Add cases for DWARF3 values and HP and PGI extensions.
2007-11-16 15:36:21 +00:00
Nathan Sidwell 75a1688a39 include/elf/
* vxworks.h: New.

	bfd/
	* elf-vxworks.h (elf_vxworks_add_dynamic_entries): Declare.
	(elf_vxworks_finish_dynamic_entry): Declare.
	* elf-vxworks.c: Include elf/vxworks.h.
	(elf_vxworks_add_dynamic_entries): New.
	(elf_vxworks_finish_dynamic_entry): New.
	* Makefile.am (elf-vxworks.lo): Add dependency.
	* Makefile.in (elf-vxworks.lo): Add dependency.
	* elf32-i386.c (elf_i386_size_dynamic_sections,
	elf_i386_finish_dynamic_sections): Call
	elf_vxworks_add_dynamic_entries and
	elf_vxworks_finish_dynamic_entry.
	* elf32-ppc.c (ppc_elf_size_dynamic_sections,
	ppc_elf_finish_dynamic_sections): Likewise.
	* elfxx-sparc.c (_bfd_sparc_elf_size_dynamic_sections,
	sparc_finish_dyn): Likewise.
	* elf32-sh.c (sh_elf_size_dynamic_sections,
	sh_elf_finish_dynamic_sections): Likewise.
	* elfxx-mips.c (_bfd_mips_elf_size_dynamic_sections,
	_bfd_mips_elf_finish_dynamic_sections): Likewise.
	* elf32-arm.c (elf32_arm_size_dynamic_sections,
	elf32_arm_finish_dynamic_sections): Likewise.

	ld/
	* ld-vxworks/tls-2.d: New.
	* ld-vxworks/tls-2.s: New.
2007-11-08 13:51:07 +00:00
Joseph Myers 33e178064d include:
2007-11-07  Joseph Myers  <joseph@codesourcery.com>
	    Daniel Jacobowitz  <dan@codesourcery.com>

	* floatformat.h (struct floatformat): Add split_half field.
	(floatformat_ibm_long_double): New.

libiberty:
2007-11-07  Joseph Myers  <joseph@codesourcery.com>
	    Daniel Jacobowitz  <dan@codesourcery.com>

	* floatformat.c (mant_bits_set): New.
	(floatformat_to_double): Use it.  Note no special handling of
	split formats.
	(floatformat_from_double): Note no special handing of split
	formats.
	(floatformat_ibm_long_double_is_valid,
	floatformat_ibm_long_double): New.
	(floatformat_ieee_single_big, floatformat_ieee_single_little,
	floatformat_ieee_double_big, floatformat_ieee_double_little,
	floatformat_ieee_double_littlebyte_bigword, floatformat_vax_f,
	floatformat_vax_d, floatformat_vax_g, floatformat_i387_ext,
	floatformat_m68881_ext, floatformat_i960_ext,
	floatformat_m88110_ext, floatformat_m88110_harris_ext,
	floatformat_arm_ext_big, floatformat_arm_ext_littlebyte_bigword,
	floatformat_ia64_spill_big, floatformat_ia64_spill_little,
	floatformat_ia64_quad_big, floatformat_ia64_quad_little): Update
	for addition of split_half field.

gdb:
2007-11-07  Joseph Myers  <joseph@codesourcery.com>
	    Daniel Jacobowitz  <dan@codesourcery.com>

	* gdbtypes.c (floatformats_ibm_long_double): New.
	* gdbtypes.h (floatformats_ibm_long_double): Declare.
	* ia64-tdep.c (floatformat_ia64_ext): Update for addition of
	split_half field.
	* mips-tdep.c (n32n64_floatformat_always_valid,
	floatformat_n32n64_long_double_big, floatformats_n32n64_long):
	Remove.
	(mips_gdbarch_init): Use floatformats_ibm_long_double instead of
	floatformats_n32n64_long.
	* ppc-linux-tdep.c (ppc_linux_init_abi): Use 128-bit IBM long
	double.
	* doublest.c (convert_floatformat_to_doublest,
	convert_doublest_to_floatformat): Handle split floating-point
	formats.
	* ppc-sysv-tdep.c (ppc_sysv_abi_push_dummy_call): Handle IBM long
	double arguments.
	(ppc64_sysv_abi_push_dummy_call): Likewise.
	(do_ppc_sysv_return_value): Handle IBM long double return.
2007-11-08 00:08:48 +00:00
Danny Smith 026d54aa23 include
* coff/pe.h (COFF_ENCODE_ALIGNMENT) Define.

gas
	* read.c (ALIGN_LIMIT): Rename to ...
	(TC_ALIGN_LIMIT): Guard against prior definition.
	* config/tc-i386.h (TC_ALIGN_LIMIT)[TE_PE]: Define.

bfd
	* pe-i386.c (COFF_SECTION_ALIGNMENT_ENTRIES): Let .data, .text
	 and .bss section use the default.
	* pei-i386.c (COFF_SECTION_ALIGNMENT_ENTRIES): Likewise.

ld/testsuite
	* ld-scripts/align.exp: Enable for PECOFF.
	* ld-scripts/alignof.exp: Likewise.
2007-11-04 23:49:08 +00:00
Nick Clifton 3ce8215a01 * mn10300.h (R_MN10300_ALIGN): Define.
* reloc.c (BFD_RELOC_MN10300_ALIGN): Add.
* bfd-in2.h: Regenerate.
* libbfd.h: Regenerate.
* elf-m10300.h: Handle R_MN10300_ALIGN relocs.
* mn10300_elf_relax_delete_bytes): Honour R_MN10300_ALIGN relocs.
  Re-fix off by one error in comparisons.
* config/tc-mn10300.c (tc_gen_reloc): Fix test that decides when
  sym_diff relocs should be generated.
  (md_apply_fix): Skip R_MN10300_ALIGN relocs.
  (mn10300_fix_adjustable): Do not adjust R_MN10300_ALIGN relocs.
  (mn10300_handle_align): New function.  Generate R_MN10300_ALIGN
  relocs to record alignment requests.
* config/tc-mn10300.h (TC_FORCE_RELOCATION_SUB_SAME): Also force
  R_MN10300_ALIGN relocs.
  (HANDLE_ALIGN): Define.  Call mn10300_handle_align.
* gas/all/gas.exp: Do not run diff1.s test for mn10300.
* ld-mn10300/mn10300.exp: Run new tests.  Skip i126256 test if
  a compiler is not available.
* ld-mn10300/i112045-3.s: New test.
* ld-mn10300/i112045-3.d: Expected disassembly.
* ld-mn10300/i135409.s: Rename to i135409-1.s.
* ld-mn10300/i135409.d: Rename to i135409-1.d
* ld-mn10300/i135409-2.s: New test.
* ld-mn10300/i135409-2.d: Expected symbol table.
* ld-mn10300/i36434.d: Adjust expected disassembly.
2007-10-30 15:18:29 +00:00
Daniel Jacobowitz 2b50cd503e * elf32-ppc.c (ppc_elf_merge_obj_attributes): Add support for
Tag_GNU_Power_ABI_Vector.

	* readelf.c (display_power_gnu_attribute): Add support for
	Tag_GNU_Power_ABI_Vector.

	* ppc.h (Tag_GNU_Power_ABI_Vector): New.

	* ld-powerpc/attr-gnu-8-1.s, ld-powerpc/attr-gnu-8-11.d,
	ld-powerpc/attr-gnu-8-2.s, ld-powerpc/attr-gnu-8-23.d,
	ld-powerpc/attr-gnu-8-3.s, ld-powerpc/attr-gnu-8-31.d: New.
	* ld-powerpc/powerpc.exp: Run new tests.
2007-10-25 15:20:24 +00:00
Nick Clifton 873e6f9d97 Add MN10300 linker relaxation support for symbol differences 2007-10-19 17:31:31 +00:00
Roland McGrath ffa1a46abd . 2007-10-18 09:57:07 +00:00
Roland McGrath 5565177f97 2007-10-18 Roland McGrath <roland@redhat.com>
* common.h (NT_PPC_VMX): New macro.
2007-10-18 09:57:04 +00:00
Daniel Jacobowitz dd52035079 * NEWS: Document target described register support for PowerPC.
* ppc-tdep.h: Remove ppc_spr constants.
	(struct gdbarch_tdep): Remove regs, ppc_sr0_regnum, and
	ppc_builtin_type_vec128 members.
	(PPC_R0_REGNUM, PPC_F0_REGNUM, PPC_PC_REGNUM, PPC_MSR_REGNUM)
	(PPC_CR_REGNUM, PPC_LR_REGNUM, PPC_CTR_REGNUM, PPC_XER_REGNUM)
	(PPC_FPSCR_REGNUM, PPC_MQ_REGNUM, PPC_SPE_UPPER_GP0_REGNUM)
	(PPC_SPE_ACC_REGNUM, PPC_SPE_FSCR_REGNUM, PPC_VR0_REGNUM)
	(PPC_VSCR_REGNUM, PPC_VRSAVE_REGNUM, PPC_NUM_REGS): New constants.
	* rs6000-tdep.c: Include preparsed descriptions.
	(init_sim_regno_table): Do not iterate over pseudo registers.
	Look up segment registers by name.  Use sim_spr_register_name
	for SPRs.
	(rs6000_register_sim_regno): Call init_sim_regno_table here.
	(rs6000_builtin_type_vec128): Delete.
	(rs6000_register_name): Only handle SPE pseudo registers and upper
	halves.  Call tdesc_register_name for everything else.
	(rs6000_register_type): Delete.  Replace with...
	(rs6000_pseudo_register_type): ...this new function.  Only handle
	SPE pseudo registers.
	(rs6000_register_reggroup_p): Delete.  Replace with...
	(rs6000_pseudo_register_reggroup_p): ...this new function.  Only
	handle SPE pseudo registers.
	(rs6000_convert_register_p): Use ppc_fp0_regnum instead of
	"struct reg".
	(rs6000_register_to_value, rs6000_value_to_register): Remove check
	of reg->fpr.
	(e500_register_reggroup_p): Delete.
	(STR, R, R4, R8, R16, F, P8, R32, R64, R0, A4, S, S4, SN4, S64)
	(COMMON_UISA_REGS, PPC_UISA_SPRS, PPC_UISA_NOFP_SPRS)
	(PPC_SEGMENT_REGS, PPC_OEA_SPRS, PPC_ALTIVEC_REGS, PPC_SPE_GP_REGS)
	(PPC_SPE_UPPER_GP_REGS, PPC_EV_PSEUDO_REGS): Delete macros.
	(registers_powerpc, registers_403, registers_403GC, registers_505)
	(registers_860, registers_601, registers_602, registers_603)
	(registers_604, registers_750, registers_7400, registers_e500): Delete
	variables.
	(struct variant): Delete nregs, npregs, num_tot_regs, and regs.  Add
	tdesc.
	(tot_num_registers, num_registers, num_pseudo_registers): Delete.
	(variants): Delete outdated comment.  Use standard target descriptions
	instead of "struct reg" arrays.
	(init_variants): Delete.
	(rs6000_gdbarch_init): Do not guess word size from the BFD
	architecture if we have a target description.  Select a variant
	before creating a new architecture.  Use the variant's target
	description if the target did not define a register layout.
	Validate target-supplied registers.  Reject mismatches.  Use
	fixed register numbers and new constants instead of magic
	numbers.  Call set_gdbarch_ps_regnum.  Call tdesc_use_registers.
	(_initialize_rs6000_tdep): Initialize the preparsed target
	descriptions.
	* target-descriptions.c (tdesc_predefined_types): Add int128 and
	uint128.
	(tdesc_find_register_early): New function.
	(tdesc_numbered_register): Use it.
	(tdesc_register_size): New function.
	(tdesc_use_registers): Take a target_desc argument.  Do not use
	gdbarch_target_desc.
	* target-descriptions.h (tdesc_use_registers): Update prototype
	and comment.
	(tdesc_register_size): New prototype.
	* Makefile.in (powerpc_32_c, powerpc_403_c, powerpc_403gc_c)
	(powerpc_505_c, powerpc_601_c, powerpc_602_c, powerpc_603_c)
	(powerpc_604_c, powerpc_64_c, powerpc_7400_c, powerpc_750_c)
	(powerpc_860_c, powerpc_e500_c, rs6000_c): New macros.
	(rs6000-tdep.o): Update.
	* arm-tdep.c (arm_gdbarch_init): Update call to tdesc_use_registers.
	* m68k-tdep.c (m68k_gdbarch_init): Likewise.
	* mips-tdep.c (mips_gdbarch_init): Likewise.

	* gdb.texinfo (Predefined Target Types): Add int128
	and uint128.
	(Standard Target Features): Add PowerPC features.

	* gdb.xml/tdesc-regs.exp: Add PowerPC support.

	* sim-ppc.h (sim_spr_register_name): New prototype.

	* gdb-sim.c (regnum2spr): Rename to...
	(sim_spr_register_name): ... this.  Make global.
2007-10-15 19:45:31 +00:00
Daniel Jacobowitz baa0b44938 2007-10-11 Jesper Nilsson <jesper.nilsson@axis.com>
* callback.c (cb_is_stdin, cb_is_stdout, cb_is_stderr): Add functions.
	* syscall.c (cb_syscall): Test for stdin/out/err, not just fd 0/1/2.

2007-10-11  Jesper Nilsson  <jesper.nilsson@axis.com>

	* callback.h (cb_is_stdin, cb_is_stdout, cb_is_stderr): Add prototypes.

2007-10-11  Jesper Nilsson  <jesper.nilsson@axis.com>

	* sim/cris/c/freopen2.c: Added testcase.
2007-10-11 18:44:06 +00:00
Daniel Jacobowitz 0f07c3b30f 2007-10-11 Jesper Nilsson <jesper.nilsson@axis.com>
* callback.c (cb_is_stdin): Add.
	* syscall.c (cb_syscall): Test for stdin, not just fd 0.

2007-10-11  Jesper Nilsson  <jesper.nilsson@axis.com>

	* callback.h (cb_is_stdin): Add prototype.
2007-10-11 18:40:28 +00:00