If a CPU implements EL2 as its highest exception level then programs
using newlib may start in hypervisor mode. In that state it is not
trivial to switch into the various EL1 modes to configure the
individual exception stacks, so do not try.
Author: Mike Frysinger <vapier@gentoo.org>
Date: Mon Jan 17 22:20:20 2022 -0500
newlib: internalize HAVE_INITFINI_ARRAY
This define is only used by newlib internally, so stop exporting it
as HAVE_INITFINI_ARRAY since this can conflict with defines packages
use themselves.
We don't really need to add _ to HAVE_INIT_FINI too since it isn't
exported in newlib.h, but might as well be consistent here.
We can't (easily) add this to newlib_cflags like HAVE_INIT_FINI is
because this is based on a compile-time test in the top configure,
not on plain shell code in configure.host. We'd have to replicate
the test in every subdir in order to have it passed down.
SP initialization changes:
1. set default value in semihosting case as well
2. moved existing SP & SL init code for processor modes in separate routine and made it as "hook"
3. init SP for processor modes in Thumb mode as well
Add new macro FN_RETURN, FN_EH_START and FN_EH_END.
The Semihosting v2 protocol requires us to output the Armv8-a HLT instruction
when in mixed mode (SEMIHOST_V2_MIXED_MODE), however it also requires this to
be done for Armv7-a and earlier architectures.
The HLT instruction is defined in the undefined encoding space for older
architectures but simulators such as QEMU already trap on it [1] for all
architectures and is a requirement for semihosting v2 [2].
Unfortunately the GAS restricts the use of HLT to Armv8-a which requires us to
use the instruction encodings we want directly in crt0.
This patch does this, I have not updated newlib/libc/* as that is quite out of
date already. A proper sync is needed in order to get things back in sync.
A different patch for this would be best.
[1] 19a6e31c9d
[2] https://developer.arm.com/docs/100863/latest/the-semihosting-interface
When simulating arm code, the target program startup code (crt0) uses
semihosting invocations to get the command line from the simulator. The
simulator returns the command line and its size into the area passed in
parameter. (ARM 32-bit specifications :
http://infocenter.arm.com/help/topic/com.arm.doc.dui0058d/DUI0058.pdf
chapter "5.4.19 SYS_GET_CMDLINE").
The memory area pointed by the semihosting register argument is located
in .text section (usually not writtable (RX)).
If we run this code on a simulator that respects this rights properties
(qemu user-mode for instance), the command line will not be written to
the .text program memory, in particular the length of the string. The
program runs with an empty command line. This problem hasn't been seen
earlier probably because qemu user-mode is not so much used, but this can
happen with another simulator that refuse to write in a read-only segment.
With this modification, the command line can be correctly passed to the
target program.
Changes:
- libgloss/arm/crt0.S : Arguments passed to the AngelSWI_Reason_GetCmdLine
semihosting invocation are placed into .data section instead of .text
- libgloss/aarch64/crt0.S : Idem for aarch64 AngelSVC_Reason_GetCmdLine
semihosting.
libgloss:
* arm/Makefile.in: Add newlib/libc/machine/arm to the include path if
newlib is present.
* arm/arm.h: Include acle-compat.h.
(THUMB_V7_V6M): Rename to ...
(PREFER_THUMB): This. Use ACLE macros __ARM_ARCH_ISA_ARM instead of
__ARM_ARCH_6M__ to decide whether to define it.
(THUMB1_ONLY): Define for Thumb-1 only targets.
(THUMB_V7M_V6M): Rename to ...
(THUMB_VXM): This. Defined based on __ARM_ARCH_ISA_ARM, excluding
ARMv7.
* arm/crt0.S: Use THUMB1_ONLY rather than __ARM_ARCH_6M__,
!__ARM_ARCH_ISA_ARM rather than THUMB_V7M_V6M for fp enabling, and
PREFER_THUMB rather than THUMB_V7_V6M. Rename other occurences of
THUMB_V7M_V6M to THUMB_VXM.
* arm/linux-crt0.c: Likewise.
* arm/redboot-crt0.S: Likewise.
* arm/swi.h: Likewise.
* arm/trap.S: Likewise.
newlib:
* libc/machine/arm/memcpy-stub.c: Use ACLE macros __ARM_ARCH_ISA_THUMB
and __ARM_ARCH_ISA_ARM to check for Thumb-2 only targets rather than
__ARM_ARCH and __ARM_ARCH_PROFILE.
* libc/machine/arm/memcpy.S: Likewise.
* libc/machine/arm/setjmp.S: Likewise for Thumb-1 only target and
include acle-compat.h.
* libc/machine/arm/strcmp.S: Likewise for Thumb-1 and Thumb-2 only
target and include acle-compat.h.
* libc/sys/arm/arm.h: Include acle-compat.h.
(THUMB_V7_V6M): Rename to ...
(PREFER_THUMB): This. Use ACLE macro __ARM_ARCH_ISA_ARM instead of
__ARM_ARCH_6M__ to decide whether to define it.
(THUMB1_ONLY): Define for Thumb-1 only targets.
(THUMB_V7M_V6M): Rename to ...
(THUMB_VXM): This. Defined based on __ARM_ARCH_ISA_ARM, excluding
ARMv7.
* libc/sys/arm/crt0.S: Use PREFER_THUMB rather than THUMB_V7_V6M and
rename THUMB_V7M_V6M into THUMB_VXM.
* libc/sys/arm/swi.h: Likewise.
* arm/cpu-init/rdimon-aem.S: Disable for M class cores.
* arm/crt0.S: Don't call _rdimon_hw_init_hook for non-A class cores.
* arm/cpu-init/Makefile.in (CPU_INIT_OBJS): Use CFLAGS.
Thomas Klein <th.r.klein@web.de>
* arm/crt0.S: Manually set the target architecture
when compiling for Thumb1 on EABI targets.
Avoid v6-only Thumb-1 MOV instruction.
* arm/crt0.S: Copied from newlib and it now also sets up stacks for
FIQ and IRQ mode, plus calls hardware_init_hook() and
software_init_hook() if present.
* arm/libcfunc.c, arm/swi.h, arm/syscalls.c: Copied
from newlib.
* arm/Makefile.in: Build crt0.o, rdpmon-crt0.o, rdimon-crt0.o,
librdpmon.a, librdimon.a - support file for "bare" setup, as well
as "RDP" and "RDI" monitors.
* arm/coff-rdpmon.specs, arm/elf-rdpmon.specs,
arm/coff-rdimon.specs, arm/elf-rdimon.specs: gcc specs files to go
with above mentioned support libs and startfiles.
Srinath Parvathaneni
Jeff Law
Alexander Fedotov
Tamar Christina
Laurent ALFONSI
David Hoover
Thomas Preud'homme
Corinna Vinschen
Richard Earnshaw
Jeff Johnston
Nick Clifton