Commit Graph

1347 Commits

Author SHA1 Message Date
Eric Weddington a15b3bdef7 Add AVR architectures avr25, avr31, avr35, and avr51 to match GCC.
bfd/
	* archures.c (bfd_mach_avr25, bfd_mach_avr31, bfd_mach_avr35,
	bfd_mach_avr51): New.
	* bfd-in2.h: Regenerate.
	* cpu-avr.c (arch_info_struct): Add avr25, avr31, avr35, and avr51
	architectures. Change comments to match architecture comments in GCC.
	(compatible): Add test for new AVR architectures.
	* elf32-avr.c (bfd_elf_avr_final_write_processing): Recognize
	bfd_mach_avr25, bfd_mach_avr31, bfd_mach_avr35 and bfd_mach_avr51.
	(elf32_avr_object_p): Recognize E_AVR_MACH_AVR25, E_AVR_MACH_AVR31,
	E_AVR_MACH_AVR35 and E_AVR_MACH_AVR51.

gas/
	* config/tc-avr.c (mcu_types): Add avr25, avr31, avr35, and avr51
	architectures. Reorganize list to put mcu types in correct architectures
	and to order list same as in GCC. Use new ISA definitions in
	include/opcode/avr.h.
	* doc/c-avr.texi: Add avr25, avr31, avr35, and avr51 architecture
	descriptions. Reorganize descriptions to put mcu types in correct
	architectures and to order lists same as in GCC.

include/
	* elf/avr.h (E_AVR_MACH_AVR25, E_AVR_MACH_AVR31,
	E_AVR_MACH_AVR35, E_AVR_MACH_AVR51): Define.
	(EF_AVR_MACH): Redefine to 0x7F.
	* opcode/avr.h (AVR_ISA_TINY3, AVR_ISA_ALL, AVR_ISA_USB162): Remove.
	(AVR_ISA_AVR3): Redefine.
	(AVR_ISA_AVR1, AVR_ISA_AVR2, AVR_ISA_AVR31, AVR_ISA_AVR35,
	AVR_ISA_AVR3_ALL, AVR_ISA_AVR4, AVR_ISA_AVR5, AVR_ISA_AVR51,
	AVR_ISA_AVR6): Define.

ld/
	* Makefile.am (ALL_EMULATIONS): Add eavr25.o, eavr31.o, eavr35.o,
	and eavr51.o.
	Add rules for eavr25.c, eavr31.c, eavr35.c, eavr51.c.
	* Makefile.in: Regenerate.
	* configure.tgt (avr-*-*, targ_extra_emuls): Add avr25, avr31, avr35
	and avr51.
	* emulparams/avr25.sh: New file.
	* emulparams/avr31.sh: New file.
	* emulparams/avr35.sh: New file.
	* emulparams/avr51.sh: New file.
2008-08-09 05:35:13 +00:00
Daniel Jacobowitz 97c16b1b23 2008-08-08 Richard Sandiford <rdsandiford@googlemail.com>
Daniel Jacobowitz  <dan@codesourcery.com>
	    Catherine Moore  <clm@codesourcery.com>
	    Mark Shinwell  <shinwell@codesourcery.com>
	    Maxim Kuvyrkov  <maxim@codesourcery.com>

	* elf32-mips.c (mips_vxworks_copy_howto_rela): Replace with...
	(elf_mips_copy_howto): ...this howto.  Clear the size fields.
	(mips_vxworks_jump_slot_howto_rela): Replace with...
	(elf_mips_jump_slot_howto): ...this howto.
	(bfd_elf32_bfd_reloc_type_lookup): Handle BFD_RELOC_MIPS_COPY
	and BFD_RELOC_MIPS_JUMP_SLOT.
	(bfd_elf32_bfd_reloc_name_lookup): Handle "R_MIPS_COPY" and
	"R_MIPS_JUMP_SLOT".
	(mips_elf32_rtype_to_howto): Handle R_MIPS_COPY and R_MIPS_JUMP_SLOT.
	(elf_backend_plt_readonly): Define.
	(elf_backend_plt_sym_val): Define for non-VxWorks targets.
	(mips_vxworks_bfd_reloc_type_lookup): Delete.
	(mips_vxworks_bfd_reloc_name_lookup): Likewise.
	(mips_vxworks_rtype_to_howto): Likewise.
	(elf_backend_want_dynbss): Don't define for VxWorks.
	(elf_backend_plt_readonly): Likewise.
	(bfd_elf32_bfd_reloc_type_lookup): Likewise.
	(bfd_elf32_bfd_reloc_name_lookup): Likewise.
	(elf_backend_mips_rtype_to_howto): Likewise.
	(elf_backend_adjust_dynamic_symbol): Likewise.
	(elf_backend_got_symbol_offset): Don't define.
	* elfn32-mips.c (elf_mips_copy_howto, elf_mips_jump_slot_howto): New.
	(bfd_elf32_bfd_reloc_type_lookup): Handle BFD_RELOC_MIPS_COPY
	and BFD_RELOC_MIPS_JUMP_SLOT.
	(bfd_elf32_bfd_reloc_name_lookup): Handle "R_MIPS_COPY" and
	"R_MIPS_JUMP_SLOT".
	(mips_elf32_n32_rtype_to_howto): Handle R_MIPS_COPY and
	R_MIPS_JUMP_SLOT.
	(elf_backend_rela_plts_and_copies_p, elf_backend_plt_readonly)
	(elf_backend_plt_sym_val): Define.
	* elf64-mips.c (elf_mips_copy_howto, elf_mips_jump_slot_howto): New.
	(bfd_elf64_bfd_reloc_type_lookup): Handle BFD_RELOC_MIPS_COPY
	and BFD_RELOC_MIPS_JUMP_SLOT.
	(bfd_elf64_bfd_reloc_name_lookup): Handle "R_MIPS_COPY" and
	"R_MIPS_JUMP_SLOT".
	(mips_elf64_rtype_to_howto): Handle R_MIPS_COPY and R_MIPS_JUMP_SLOT.
	(elf_backend_rela_plts_and_copies_p, elf_backend_plt_readonly)
	(elf_backend_plt_sym_val): Define.
	* elfxx-mips.h (_bfd_mips_vxworks_adjust_dynamic_symbol): Delete.
	(_bfd_mips_elf_use_plts_and_copy_relocs, _bfd_mips_elf_init_stubs)
	(_bfd_mips_elf_plt_sym_val, _bfd_mips_post_process_headers): Declare.
	* elfxx-mips.c (mips_elf_la25_stub): New structure.
	(LA25_LUI, LA25_J, LA25_ADDIU): New macros.
	(mips_elf_link_hash_entry): Add "la25_stubs", "has_static_relocs"
	and "has_nonpic_branches" fields.  Remove "is_relocation_target" and
	"is_branch_target".
	(mips_elf_link_hash_table): Add blank lines.  Add
	"use_plts_and_copy_relocs", "reserved_gotno", "strampoline",
	"la25_stubs" and "add_stub_section" fields.
	(mips_htab_traverse_info): New structure.
	(PIC_OBJECT_P, MIPS_ELF_LOAD_WORD): New macros.
	(MIPS_RESERVED_GOTNO): Delete.
	(mips_o32_exec_plt0_entry, mips_n32_exec_plt0_entry)
	(mips_n64_exec_plt0_entry, mips_exec_plt_entry): New tables.
	(mips_elf_link_hash_newfunc): Update after the changes to
	mips_elf_link_hash_entry.
	(mips_elf_check_mips16_stubs): Replace the DATA parameter with
	an INFO parameter.  Don't look through warnings symbols here;
	do it in mips_elf_check_symbols instead.
	(mips_elf_create_stub_symbol): New function.
	(mips_elf_la25_stub_hash, mips_elf_la25_stub_eq): New functions.
	(_bfd_mips_elf_init_stubs, mips_elf_local_pic_function_p): Likewise.
	(mips_elf_add_la25_intro, mips_elf_add_la25_trampoline): Likewise.
	(mips_elf_add_la25_stub, mips_elf_check_symbols): New functions.
	(mips_elf_gotplt_index): Check for VxWorks.
	(mips_elf_output_dynamic_relocation): Take the relocation index
	as an extra parameter.  Do not increment reloc_count here.
	(mips_elf_initialize_tls_slots): Update the calls to
	mips_elf_output_dynamic_relocation accordingly.
	(mips_elf_multi_got): Use htab->reserved_gotno instead of
	MIPS_RESERVED_GOTNO.
	(mips_elf_create_got_section): Don't allocate reserved GOT
	entries here.  Unconditionally create .got.plt, but don't
	set its alignment here.
	(mips_elf_relocation_needs_la25_stub): New function.
	(mips_elf_calculate_relocation): Redirect branches and jumps to
	a non-PIC stub if one exists.  Check !h->has_static_relocs instead
	of !htab->is_vxworks when deciding whether to create dynamic
	relocations for R_MIPS_32, R_MIPS_REL32 and R_MIPS_64.
	(_bfd_mips_elf_create_dynamic_sections): Unconditionally call
	_bfd_elf_create_dynamic_sections.  Unconditionally set up
	htab->splt and htab->sdynbss.  Set htab->srelplt to ".rel.plt"
	if !htab->is_vxworks.  Add non-VxWorks values of
	htab->plt_header_size and htab->plt_entry_size.
	(_bfd_mips_elf_check_relocs): Set pointer_equality_needed for
	non-branch static relocations.  Set has_nonpic_branches when an la25
	stub might be required.  Set can_make_dynamic_p to TRUE if R_MIPS_32,
	R_MIPS_REL32 and R_MIPS_64 relocations can be made dynamic,
	rather than duplicating the condition.  Do not make them dynamic
	for read-only sections in non-PIC executable objects.
	Do not protect this code with dynobj == NULL || htab->sgot == NULL;
	handle each group of cases separately.  Add a default case that
	sets has_static_relocs for non-GOT relocations that cannot be
	made dynamic.  Don't set is_relocation_target and is_branch_target.
	Reject non-PIC static relocations in shared objects.
	(_bfd_mips_vxworks_adjust_dynamic_symbol): Fold into...
	(_bfd_mips_elf_adjust_dynamic_symbol): ...here, using
	htab->use_plts_and_copy_relocs instead of htab->is_vxworks
	to select PLT and copy-reloc handling.  Set the alignment of
	.plt and .got.plt when allocating the first entry.  Generalize
	code to handle REL as well as RELA sections and 64-bit as well as
	32-bit GOT entries.  Complain if we find a static-only reloc
	against an externally-defined symbol and if we cannot create
	dynamic relocations for it.  Allocate copy relocs using
	mips_elf_allocate_dynamic_relocations on non-VxWorks targets.
	Set possibly_dynamic_relocs to 0 when using PLTs or copy relocs.
	Skip reserved .got.plt entries.
	(_bfd_mips_elf_always_size_sections): Use mips_elf_check_symbols
	instead of mips_elf_check_mips16_stubs to process each symbol.
	Do the traversal for relocatable objects too.
	(mips_elf_lay_out_got): Use htab->reserved_gotno instead of
	MIPS_RESERVED_GOTNO.
	(_bfd_mips_elf_size_dynamic_sections): Exclude sdynbss if it
	is empty.  Extend the DT_PLTREL, DT_JMPREL and DT_PLTRELSZ handling
	to non-VxWorks targets.  Only add DT_REL{,A}, DT_REL{,A}SZ and
	DT_REL{,A}ENT if .rel.dyn is nonempty.  Create a symbol for the
	PLT.  Allocate a nop at the end of the PLT.  Allocate DT_MIPS_PLTGOT.
	(mips_elf_create_la25_stub_info): New function.
	(_bfd_mips_elf_finish_dynamic_symbol): Write out PLT entries
	and copy relocs where necessary.  Check pointer_equality_needed.
	(mips_finish_exec_plt): New function.
	(_bfd_mips_elf_finish_dynamic_sections): Always set DT_PLTGOT
	to the beginning of htab->sgot.  Use htab->reserved_gotno instead
	of MIPS_RESERVED_GOTNO.  Assert htab->use_plts_and_copy_relocs
	instead of htab->is_vxworks for DT_PLTREL, DT_PLTRELSZ and DT_JMPREL.
	Set DT_PLTREL to DT_REL instead of DT_RELA on non-VxWorks targets.
	Use mips_finish_exec_plt to create non-VxWorks PLT headers.  Set
	DT_MIPS_PLTGOT.
	(_bfd_mips_elf_copy_indirect_symbol): Copy has_static_relocs
	from the indirect symbol to the direct symbol.  Also copy
	has_nonpic_branches for indirect symbols.
	(_bfd_mips_elf_get_target_dtag): Handle DT_MIPS_PLTGOT and
	DT_MIPS_RWPLT.
	(_bfd_mips_elf_link_hash_table_create): Initialize the new
	mips_elf_link_hash_table fields.
	(_bfd_mips_vxworks_link_hash_table_create): Set
	use_plts_and_copy_relocs to TRUE.  Use TRUE rather than 1
	when setting is_vxworks.
	(_bfd_mips_elf_use_plts_and_copy_relocs): New function.
	(_bfd_mips_elf_final_link): Call mips_elf_create_la25_stub for
	each la25_stub.
	(_bfd_mips_elf_merge_private_bfd_data): Treat dynamic objects
	as PIC.  Generalize message about linking PIC and non-PIC.
	(_bfd_mips_elf_plt_sym_val, _bfd_mips_post_process_headers): New
	functions.
	* reloc.c: Update comment near BFD_RELOC_MIPS_JUMP_SLOT.
	* bfd-in2.h: Regenerated.

2008-08-08  Richard Sandiford  <rdsandiford@googlemail.com>
	    Daniel Jacobowitz  <dan@codesourcery.com>
	    Catherine Moore  <clm@codesourcery.com>
	    Mark Shinwell  <shinwell@codesourcery.com>

	* readelf.c (get_mips_symbol_other): Handle STO_MIPS_PLT and
	STO_MIPS_PIC.
	(slurp_rela_relocs, slurp_rel_relocs): Handle MIPS ELF64 here.
	(dump_relocations, debug_apply_relocations): Don't handle it here.
	(get_mips_dynamic_type): Handle DT_MIPS_PLTGOT and DT_MIPS_RWPLT.
	(print_mips_pltgot_entry): New function.
	(process_mips_specific): Dump the PLT GOT.

2008-08-08  Richard Sandiford  <rdsandiford@googlemail.com>
	    Daniel Jacobowitz  <dan@codesourcery.com>

	* config/tc-mips.c (OPTION_CALL_NONPIC): New macro.
	(OPTION_NON_SHARED, OPTION_XGOT, OPTION_MABI, OPTION_32)
	(OPTION_N32, OPTION_64, OPTION_MDEBUG, OPTION_NO_MDEBUG)
	(OPTION_PDR, OPTION_NO_PDR, OPTION_MVXWORKS_PIC): Bump by 1.
	(md_longopts): Add -call_nonpic.
	(md_parse_option): Handle OPTION_CALL_NONPIC.
	(md_show_usage): Add -call_nonpic.

2008-08-08  Richard Sandiford  <rdsandiford@googlemail.com>

	* gas/mips/call-nonpic-1.s, gas/mips/call-nonpic-1.d: New test.
	* gas/mips/mips.exp: Run it.

2008-08-08  Richard Sandiford  <rdsandiford@googlemail.com>
	    Daniel Jacobowitz  <dan@codesourcery.com>
	    Catherine Moore  <clm@codesourcery.com>
	    Mark Shinwell  <shinwell@codesourcery.com>

	* mips.h (STO_MIPS_PLT, ELF_ST_IS_MIPS_PLT, ELF_ST_SET_MIPS_PLT)
	(STO_MIPS_PIC, DT_MIPS_PLTGOT, DT_MIPS_RWPLT): New macros.

2008-08-08  Richard Sandiford  <rdsandiford@googlemail.com>
	    Daniel Jacobowitz  <dan@codesourcery.com>

	* emulparams/elf32bmip.sh (GOT): Define, moving .got.plt to...
	(OTHER_RELRO_SECTIONS, OTHER_READWRITE_SECTIONS): ...one of these
	two variables.
	* emulparams/elf32bmipn32-defs.sh: Likewise.
	* emultempl/mipself.em: Include ldctor.h, elf/mips.h and elfxx-mips.h.
	(is_mips_elf): New macro.
	(stub_file, stub_bfd): New variables.
	(hook_stub_info): New structure.
	(hook_in_stub): New function.
	(mips_add_stub_section): Likewise.
	(mips_create_output_section_statements): Likewise.
	(mips_before_allocation): Likewise.
	(real_func): New variable.
	(mips_for_each_input_file_wrapper): New function.
	(mips_lang_for_each_input_file): Likewise.
	(lang_for_each_input_file): Define.
	(LDEMUL_BEFORE_ALLOCATION): Likewise.
	(LDEMUL_CREATE_OUTPUT_SECTION_STATEMENTS): Likewise.

2008-08-08  Richard Sandiford  <rdsandiford@googlemail.com>
	    Daniel Jacobowitz  <dan@codesourcery.com>

	* ld-mips-elf/mips16-pic-3a.s,
	ld-mips-elf/mips16-pic-3b.s,
	ld-mips-elf/mips16-pic-3.dd,
	ld-mips-elf/mips16-pic-3.gd,
	ld-mips-elf/mips16-pic-3.rd,
	ld-mips-elf/mips16-pic-3.inc,
	ld-mips-elf/pic-and-nonpic-1a.s,
	ld-mips-elf/pic-and-nonpic-1b.s,
	ld-mips-elf/pic-and-nonpic-1.ld,
	ld-mips-elf/pic-and-nonpic-1.dd,
	ld-mips-elf/pic-and-nonpic-1.nd,
	ld-mips-elf/pic-and-nonpic-1-rel.dd,
	ld-mips-elf/pic-and-nonpic-1-rel.nd,
	ld-mips-elf/pic-and-nonpic-2a.s,
	ld-mips-elf/pic-and-nonpic-2b.s,
	ld-mips-elf/pic-and-nonpic-2.d,
	ld-mips-elf/pic-and-nonpic-3a.s,
	ld-mips-elf/pic-and-nonpic-3a.ld,
	ld-mips-elf/pic-and-nonpic-3a.dd,
	ld-mips-elf/pic-and-nonpic-3a.gd,
	ld-mips-elf/pic-and-nonpic-3a.sd,
	ld-mips-elf/pic-and-nonpic-3b.s,
	ld-mips-elf/pic-and-nonpic-3b.ld,
	ld-mips-elf/pic-and-nonpic-3b.ad,
	ld-mips-elf/pic-and-nonpic-3b.dd,
	ld-mips-elf/pic-and-nonpic-3b.gd,
	ld-mips-elf/pic-and-nonpic-3b.nd,
	ld-mips-elf/pic-and-nonpic-3b.pd,
	ld-mips-elf/pic-and-nonpic-3b.rd,
	ld-mips-elf/pic-and-nonpic-3b.sd,
	ld-mips-elf/pic-and-nonpic-3-error.d,
	ld-mips-elf/pic-and-nonpic-4a.s,
	ld-mips-elf/pic-and-nonpic-4b.s,
	ld-mips-elf/pic-and-nonpic-4b.ld,
	ld-mips-elf/pic-and-nonpic-4b.ad,
	ld-mips-elf/pic-and-nonpic-4b.dd,
	ld-mips-elf/pic-and-nonpic-4b.gd,
	ld-mips-elf/pic-and-nonpic-4b.nd,
	ld-mips-elf/pic-and-nonpic-4b.rd,
	ld-mips-elf/pic-and-nonpic-4b.sd,
	ld-mips-elf/pic-and-nonpic-4-error.d,
	ld-mips-elf/pic-and-nonpic-5a.s,
	ld-mips-elf/pic-and-nonpic-5b.s,
	ld-mips-elf/pic-and-nonpic-5b.ld,
	ld-mips-elf/pic-and-nonpic-5b.ad,
	ld-mips-elf/pic-and-nonpic-5b.dd,
	ld-mips-elf/pic-and-nonpic-5b.gd,
	ld-mips-elf/pic-and-nonpic-5b.nd,
	ld-mips-elf/pic-and-nonpic-5b.rd,
	ld-mips-elf/pic-and-nonpic-5b.sd,
	ld-mips-elf/pic-and-nonpic-5b.pd,
	ld-mips-elf/pic-and-nonpic-6.ld,
	ld-mips-elf/pic-and-nonpic-6-o32a.s,
	ld-mips-elf/pic-and-nonpic-6-o32b.s,
	ld-mips-elf/pic-and-nonpic-6-o32c.s,
	ld-mips-elf/pic-and-nonpic-6-o32.ad,
	ld-mips-elf/pic-and-nonpic-6-o32.dd,
	ld-mips-elf/pic-and-nonpic-6-o32.gd,
	ld-mips-elf/pic-and-nonpic-6-o32.nd,
	ld-mips-elf/pic-and-nonpic-6-o32.pd,
	ld-mips-elf/pic-and-nonpic-6-o32.rd,
	ld-mips-elf/pic-and-nonpic-6-o32.sd,
	ld-mips-elf/pic-and-nonpic-6-n32a.s,
	ld-mips-elf/pic-and-nonpic-6-n32b.s,
	ld-mips-elf/pic-and-nonpic-6-n32c.s,
	ld-mips-elf/pic-and-nonpic-6-n32.ad,
	ld-mips-elf/pic-and-nonpic-6-n32.dd,
	ld-mips-elf/pic-and-nonpic-6-n32.gd,
	ld-mips-elf/pic-and-nonpic-6-n32.nd,
	ld-mips-elf/pic-and-nonpic-6-n32.pd,
	ld-mips-elf/pic-and-nonpic-6-n32.rd,
	ld-mips-elf/pic-and-nonpic-6-n32.sd,
	ld-mips-elf/pic-and-nonpic-6-n64a.s,
	ld-mips-elf/pic-and-nonpic-6-n64b.s,
	ld-mips-elf/pic-and-nonpic-6-n64c.s,
	ld-mips-elf/pic-and-nonpic-6-n64.ad,
	ld-mips-elf/pic-and-nonpic-6-n64.dd,
	ld-mips-elf/pic-and-nonpic-6-n64.gd,
	ld-mips-elf/pic-and-nonpic-6-n64.nd,
	ld-mips-elf/pic-and-nonpic-6-n64.pd,
	ld-mips-elf/pic-and-nonpic-6-n64.rd,
	ld-mips-elf/pic-and-nonpic-6-n64.sd: New tests.
	* ld-mips-elf/mips-elf.exp: Run them.
2008-08-08 19:24:49 +00:00
Alan Modra ef432bbddf * common.h (ELFOSABI_AROS): Update comment. 2008-08-03 23:20:42 +00:00
Peter Bergner b5bffab8d3 gas/
* config/tc-ppc.c (parse_cpu): Rename altivec_or_spe to retain_flags.
	Handle -mvsx and -mpower7.
	(md_show_usage): Document -mpower7 and -mvsx.
	* doc/as.texinfo (Target PowerPC): Document -mvsx.
	* doc/c-ppc.texi (PowerPC-Opts): Document -mvsx and -mpower7.

gas/testsuite/
	* gas/ppc/power7.d: New.
	* gas/ppc/power7.s: Likewise.
	* gas/ppc/ppc.exp: Run power7 test.

include/opcode/
	* ppc.h (PPC_OPCODE_VSX, PPC_OPERAND_VSR): New.

opcodes/
	* ppc-dis.c (powerpc_init_dialect): Handle power7 and vsx options.
	(print_insn_powerpc): Prepend 'vs' when printing VSX registers.
	(print_ppc_disassembler_options): Document -Mpower7 and -Mvsx.
	* ppc-opc.c (insert_xt6): New static function.
	(extract_xt6): Likewise.
	(insert_xa6): Likewise.
	(extract_xa6: Likewise.
	(insert_xb6): Likewise.
	(extract_xb6): Likewise.
	(insert_xb6s): Likewise.
	(extract_xb6s): Likewise.
	(XS6, XT6, XA6, XB6, XB6S, DM, XX3, XX3DM, XX1_MASK, XX3_MASK,
	XX3DM_MASK, PPCVSX): New.
	(powerpc_opcodes): Add opcodes "lxvd2x", "lxvd2ux", "stxvd2x",
	"stxvd2ux", "xxmrghd", "xxmrgld", "xxpermdi", "xvmovdp", "xvcpsgndp".
2008-08-02 04:38:51 +00:00
Alan Modra 79ea8bbb10 include/opcode/
* ppc.h (PPC_OPCODE_405): Define.
	(PPC_OPERAND_FSL, PPC_OPERAND_FCR, PPC_OPERAND_UDI): Define.
gas/
	* config/tc-ppc.c (parse_cpu): Separate handling of -m403/405.
	(md_show_usage): Likewise.
opcodes/
	* ppc-dis.c (print_insn_powerpc): Disassemble FSL/FCR/UDI fields.
	* ppc-opc.c (powerpc_operands): Add Xilinx APU related operands.
	(insert_sprg, PPC405): Use PPC_OPCODE_405.
	(powerpc_opcodes): Add Xilinx APU related opcodes.
2008-07-30 06:29:21 +00:00
Alan Modra d9f2119e32 Support PowerPC single-precision float. 2008-07-26 13:10:47 +00:00
Luis Machado 191f3bae17 * bfd/elf-bfd.h: Declare elfcore_write_ppc_vsx.
* bfd/elf.c (elfcore_grok_ppc_vsx): New function.
	(elfcore_write_ppc_vsx): New function
	(elfcore_grok_note): Handle VSX notes.
	(elfcore_write_register_note): Handle VSX notes.
	* include/elf/common.h: Define NT_PPC_VSX.
	* binutils/readelf.c (get_note_type): Handle VSX notes.
2008-07-21 05:33:37 +00:00
Jie Zhang 5423479e3f Revert my last change since it has not been approved. 2008-07-12 08:54:12 +00:00
Jie Zhang fb122200f5 bfd/
* elf.c (_bfd_elf_map_sections_to_segments): Don't put
	executable sections into the same segment with other
	read only sections if --sep-code.
	* elf32-bfin.c (elf32_bfin_code_in_l1): New variable.
	(elf32_bfin_data_in_l1): New variable.
	(elf32_bfin_final_write_processing): New.
	(elf32_bfin_special_sections[]): New.
	(elf_backend_final_write_processing): Define.
	(elf_backend_special_sections): Define.

	binutils/
	* readelf.c (get_machine_flags): Deal with Blackfin specific
	flags.

	include/
	* bfdlink.h (struct bfd_link_info): Add sep_code member
	variable.
	* elf/bfin.h (EF_BFIN_CODE_IN_L1): Define.
	(EF_BFIN_DATA_IN_L1): Define.

	ld/
	* Makefile.am (eelf32bfin.c): Depend on bfin.em.
	(eelf32bfinfd.c): Likewise.
	* Makefile.in: Regenerate.
	* gen-doc.texi: Set Blackfin.
	* ld.texinfo: Document --sep-code and Blackfin specific
	options.
	* ldmain.c (main): Initialize link_info.sep_code.
	* lexsup.c (enum option_values): Add OPTION_SEP_CODE.
	(ld_options[]): Add --sep-code.
	(parse_args): Deal with --sep-code.
	* emulparams/bfin.sh (EXTRA_EM_FILE): Define.
	* emulparams/elf32bfinfd.sh (OTHER_SECTIONS): Define.
	* emultempl/bfin.em: New file.
2008-07-11 19:24:39 +00:00
Richard Sandiford 186a804c15 include/elf/
* mips.h (ELF_ST_IS_MIPS16, ELF_ST_SET_MIPS16): New macros.

bfd/
	* elfxx-mips.c (mips_elf_check_mips16_stubs): Use ELF_ST_IS_MIPS16.
	(mips_elf_calculate_relocation): Likewise.
	(_bfd_mips_elf_add_symbol_hook): Likewise.
	(_bfd_mips_elf_finish_dynamic_symbol): Likewise.
	(_bfd_mips_vxworks_finish_dynamic_symbol): Likewise.

opcodes/
	* mips-dis.c (_print_insn_mips): Use ELF_ST_IS_MIPS16.

gas/
	* config/tc-mips.c (mips16_mark_labels): Use ELF_ST_SET_MIPS16.
	(mips_fix_adjustable): Likewise.
	(mips_frob_file_after_relocs): Likewise.

gas/testsuite/
	* gas/mips/mips16-vis-1.d, gas/mips/mips16-vis-1.s: New tests.
	* gas/mips/mips.exp: Run them.
2008-07-10 19:05:28 +00:00
Stan Shebs dd5e3247eb 2008-07-07 Stan Shebs <stan@codesourcery.com>
* dis-asm.h (struct disassemble_info): Add endian_code field.
2008-07-07 18:40:13 +00:00
Joel Brobecker d68240794e * safe-ctype.h: Add #include of ctype.h before redefining
the ctype.h macros.
2008-07-07 17:09:31 +00:00
Joel Brobecker 4261a8d107 * safe-ctype.h: Remove #error when detecting that ctype.h has been
included. Redefine the various macros provided by ctype.h as
        undefined variables.
2008-07-04 17:11:29 +00:00
DJ Delorie 6b9b8ecd85 merge from gcc 2008-06-24 03:01:29 +00:00
Swami Reddy M R 9c8883d423 common.h (EM_CR16): Correct value.
(EM_CR16): Rename to EM_CR16_OLD.
2008-06-18 11:04:29 +00:00
Swami Reddy M R 7f33231964 common.h (EM_CR16): Correct value.
(EM_CR16): Rename to EM_CR16_OLD.
2008-06-18 11:03:03 +00:00
Nick Clifton 4055a11236 * app.c (do_scrub_chars): Do not UNGET an EOF value.
* ti.h (GET_SCNHDR_NLNNO): Provide an alternative version of this
        macro which does not trigger an array bounds warning in gcc.
        (PUT_SCNHDR_NLNNO): Likewise.
        (GET_SCNHDR_FLAGS): Likewise.
        (PUT_SCNHDR_FLAGS): Likewise.
        (GET_SCNHDR_PAGE): Likewise.
        (PUT_SCNHDR_PAGE): Likewise.
2008-06-17 16:01:28 +00:00
Peter Bergner bc089f5083 include/opcode/
* ppc.h (ppc_cpu_t): New typedef.
	(struct powerpc_opcode <flags>): Use it.
	(struct powerpc_operand <insert, extract>): Likewise.
	(struct powerpc_macro <flags>): Likewise.

gas/
	* config/tc-ppc.c (ppc_cpu): Use ppc_cpu_t typedef.
	(ppc_insert_operand): Likewise.
	(ppc_machine): Likewise.
	* config/tc-ppc.h: #include "opcode/ppc.h"
	(struct _ppc_fix_extra <ppc_cpu>): Use ppc_cpu_t typedef.
	(ppc_cpu): Update extern decl.

opcodes/
	* ppc-dis.c (print_insn_powerpc): Update prototye to use new
	ppc_cpu_t typedef.
	(struct dis_private): New.
	(POWERPC_DIALECT): New define.
	(powerpc_dialect): Renamed to...
	(powerpc_init_dialect): This.  Update to use ppc_cpu_t and
	struct dis_private.
	(print_insn_big_powerpc): Update for using structure in
	info->private_data.
	(print_insn_little_powerpc): Likewise.
	(operand_value_powerpc): Change type of dialect param to ppc_cpu_t.
	(skip_optional_operands): Likewise.
	(print_insn_powerpc): Likewise.  Remove initialization of dialect.
	* ppc-opc.c (extract_bat, extract_bba, extract_bdm, extract_bdp,
	extract_bo, extract_boe, extract_fxm, extract_mb6, extract_mbe,
	extract_nb, extract_nsi, extract_rbs, extract_sh6, extract_spr,
	extract_sprg, extract_tbr insert_bat, insert_bba, insert_bdm,
	insert_bdp, insert_bo, insert_boe, insert_fxm, insert_mb6, insert_mbe,
	insert_nsi, insert_ral, insert_ram, insert_raq, insert_ras, insert_rbs,
	insert_sh6, insert_spr, insert_sprg, insert_tbr): Change the dialect
	param to be of type ppc_cpu_t.  Update prototype.
2008-06-13 20:16:00 +00:00
Nick Clifton dc70030aba * mips.h: Document new field descriptors +Q.
(OP_SH_SEQI, OP_MASK_SEQI): New bit mask and shift count for SEQI.

opcodes/

        * mips-dis.c (print_insn_args): Handle field descriptor +Q.
        * mips-opc.c (mips_builtin_opcodes): Add Octeon instructions seq,
        seqi, sne and snei.

gas/

        * config/tc-mips.c (validate_mips_insn): Handle field descriptor +Q.
        (mips_ip): Likewise.
        (macro_build): Likewise.
        (CPU_HAS_SEQ): New macro.
        (macro2) <M_SEQ_I, M_SNE_I>: Use it.  Emit seq/sne and seqi/snei.

gas/testsuite/

        * gas/mips/octeon.s, gas/mips/octeon.d: Add tests for seq* and sne*.
        * gas/mips/octeon-ill.s, gas/mips/octeon-ill.s: Add tests for seqi
        and snei.
2008-06-12 21:44:53 +00:00
DJ Delorie 637fe5e44f * common.h (EM_M32C_NEW): Rename to EM_M32C.
(EM_M32C): Rename to EM_M32C_OLD.

* elf32-m32c.c (ELF_MACHINE_ALT1): Define as EM_M32C_OLD.

* readelf.c (guess_is_rela): Add EM_M32C_OLD.
(dump_relocations): Likewise.
(process_section_headers): Likewise.
(is_32bit_abs_reloc): Likewise.
(is_16bit_abs_reloc): Likewise.
2008-06-12 19:49:47 +00:00
Nick Clifton d73fd47d38 include/opcode/
* mips.h: Document new field descriptors +x, +X, +p, +P, +s, +S.
        Update comment before MIPS16 field descriptors to mention MIPS16.
        (OP_SH_BBITIND, OP_MASK_BBITIND): New bit mask and shift count for
        BBIT.
        (OP_SH_CINSPOS, OP_MASK_CINSPOS, OP_SH_CINSLM1, OP_MASK_CINSLM1):
        New bit masks and shift counts for cins and exts.

gas/

        * config/tc-mips.c (validate_mips_insn): Handle field descriptors
        +x, +X, +p, +P, +s, +S.
        (mips_ip): Likewise.

opcodes/

        * mips-dis.c (print_insn_args): Handle field descriptors +x, +p,
        +s, +S.
        * mips-opc.c (mips_builtin_opcodes): Add Octeon instructions
        baddu, bbit*, cins*, dmul, pop, dpop, exts*, mtm*, mtp*, syncs,
        syncw, syncws, vm3mulu, vm0 and vmulu.

gas/testsuite/

        * gas/mips/octeon.s, gas/mips/octeon.d: Add tests for baddu,
        bbit*, cins*, dmul, pop, dpop, exts*, mtm*, mtp*, syncs, syncw,
        syncws, vm3mulu, vm0 and vmulu.
        * gas/mips/octeon-ill.s, gas/mips/octeon-ill.s: New test.
        * gas/mips/mips.exp: Run it.  Run octeon test with
        run_dump_test_arches.
2008-06-12 16:14:52 +00:00
Joseph Myers 345be70ea2 * common.h: Update e_machine table. 2008-06-12 12:44:01 +00:00
Kaz Kojima 27a07c4596 * sh.h (EF_SH_BFD_TABLE): Set bfd_mach_sh for EF_SH_UNKNOWN. 2008-06-09 22:20:46 +00:00
Joseph Myers f4b8818426 * common.h: Change registry@caldera.com to registry@sco.com. 2008-06-09 14:07:18 +00:00
Alan Modra 0345ae5042 include/
* bfdlink.h (struct bfd_link_info): Add "path_separator".
bfd/
	* elf32-spu.c (spu_elf_auto_overlay): Relax requirement that
	file names be unique.  Specify archive:path in overlay script.
ld/
	* ldlang.c (name_match): New function.
	(unique_section_p, walk_wild_consider_section): Use it here.
	(walk_wild_section_general): And here.
	(archive_path): New function.
	(walk_wild): Match archive:path filespecs.
	(open_input_bfds): Don't load archive:path files.
	* emultempl/spuelf.em (choose_target): Set path_separator.
	* emulparams/elf32_spu.sh: Add ._ea.* sections to ._ea output.
2008-06-06 06:01:53 +00:00
Nick Clifton 804c0cc6d0 * reloc-macros.h: Add a comment about the use of the
END_RELOC_NUMBERS symbol as a sentinel value.
        * arm.h (END_RELOC_NUMBERS): Provide a maximum value.
2008-05-21 14:50:07 +00:00
Adam Nemet b1d07c81ca * mips.h (INSN_MACRO): Move it up to the the pinfo macros.
(INSN2_M_FP_S, INSN2_M_FP_D): New pinfo2 macros.
2008-04-28 16:59:27 +00:00
David S. Miller a4ed1daa7f * elf/sparc.h (R_SPARC_GOTDATA_HIX22,
R_SPARC_GOTDATA_LOX10, R_SPARC_GOTDATA_OP_HIX22,
	R_SPARC_GOTDATA_OP_LOX10, R_SPARC_GOTDATA_OP,
	R_SPARC_H34, R_SPARC_SIZE32, R_SPARC_SIZE64): New relocs.
2008-04-16 08:35:17 +00:00
Nick Clifton 7ed2b9c492 Move entries for changes in sub-directories into the changelogs in those sub-
directories.
2008-04-16 08:33:54 +00:00
Alan Modra 962c961a36 ppc e500mc support 2008-04-14 11:01:38 +00:00
Andreas Krebbel 1d0a4e1490 2008-04-10 Andreas Krebbel <krebbel1@de.ibm.com>
* s390-dis.c (init_disasm): Evaluate disassembler_options.
	(print_s390_disassembler_options): New function.
	* disassemble.c (disassembler_usage): Invoke
	print_s390_disassembler_options.

2008-04-10  Andreas Krebbel  <krebbel1@de.ibm.com>

	* dis-asm.h (print_s390_disassembler_options):
	Prototype added.
2008-04-10 13:36:43 +00:00
Swami Reddy M R 3322254d27 sim-cr16.h: New file. Added for cr16 target. 2008-04-08 08:33:51 +00:00
H.J. Lu f47b47fb18 binutils/
2008-04-03  H.J. Lu  <hongjiu.lu@intel.com>

	* dwarf.c (dwarf_regnames_i386): Add AVX registers.
	(dwarf_regnames_x86_64): Likewise.

gas/

2008-04-03  H.J. Lu  <hongjiu.lu@intel.com>

	* NEWS: Mention AES, CLMUL, AVX/FMA and -msse2avx.

	* doc/c-i386.texi: Add avx, aes, clmul and fma to -march=.
	Document -msse2avx, .avx, .aes, .clmul and .fma.

	* config/tc-i386.c (YMMWORD_MNEM_SUFFIX): New.
	(vex_prefix): Likewise.
	(sse2avx): Likewise.
	(CPU_FLAGS_ARCH_MATCH): Likewise.
	(CPU_FLAGS_64BIT_MATCH): Likewise.
	(CPU_FLAGS_32BIT_MATCH): Likewise.
	(CPU_FLAGS_PERFECT_MATCH): Likewise.
	(regymm): Likewise.
	(vex_imm4): Likewise.
	(fits_in_imm4): Likewise.
	(build_vex_prefix): Likewise.
	(VEX_check_operands): Likewise.
	(bad_implicit_operand): Likewise.
	(OPTION_MSSE2AVX): Likewise.
	(T_YMMWORD): Likewise.
	(_i386_insn): Add vex.
	(cpu_arch): Add .avx, .aes, .clmul and .fma.
	(cpu_flags_match): Changed to take a pointer to const template.
	Enable encoding SSE instructions with VEX prefix for -msse2avx.
	(match_mem_size): Also check ymmword.
	(operand_type_match): Clear ymmword.
	(md_begin): Allow '_' in mnemonic.
	(type_names): Add OPERAND_TYPE_VEX_IMM4.
	(process_immext): Update assert.
	(md_assemble): Don't call process_immext if sse2avx and immext
	are true.  Call build_vex_prefix if vex is true.
	(parse_insn): Updated for cpu_flags_match.
	(swap_operands): Handle 5 operands.
	(match_template): Handle 5 operands. Updated for cpu_flags_match.
	Check regymm.  Call VEX_check_operands. Handle YMMWORD_MNEM_SUFFIX.
	(process_suffix): Handle YMMWORD_MNEM_SUFFIX.
	(check_byte_reg): Check regymm.
	(process_operands): Duplicate the destination register for
	-msse2avx if needed.
	(build_modrm_byte): Updated for instructions with VEX encoding.
	(output_insn): Output VEX prefix if needed.
	(md_longopts): Add msse2avx.
	(md_parse_option): Handle OPTION_MSSE2AVX.
	(md_show_usage): Add avx, aes, clmul, fma and -msse2avx.
	(intel_e09): Support YMMWORD.
	(intel_e11): Likewise.
	(intel_get_token): Likewise.

gas/testsuite/

2008-04-03  H.J. Lu  <hongjiu.lu@intel.com>

	* gas/i386/i386.exp: Run aes, aes-intel, x86-64-aes,
	x86-64-aes-intel, avx, avx-intel, inval-avx, x86-64-avx,
	x86-64-avx-intel and x86-64-inval-avx.

	* gas/cfi/cfi-i386.s: Add tests for AVX register maps.
	* gas/cfi/cfi-x86_64.s: Likewise.

	* gas/i386/aes.d: New.
	* gas/i386/aes.s: Likewise.
	* gas/i386/aes-intel.d: Likewise.
	* gas/i386/avx.d: Likewise.
	* gas/i386/avx.s: Likewise.
	* gas/i386/avx-intel.d: Likewise.
	* gas/i386/clmul.d: Likewise.
	* gas/i386/clmul-intel.d: Likewise.
	* gas/i386/clmul.s: Likewise.
	* gas/i386/i386.exp: Likewise.
	* gas/i386/inval-avx.l: Likewise.
	* gas/i386/inval-avx.s: Likewise.
	* gas/i386/sse2avx.d: Likewise.
	* gas/i386/sse2avx.s: Likewise.
	* gas/i386/x86-64-aes.d: Likewise.
	* gas/i386/x86-64-aes.s: Likewise.
	* gas/i386/x86-64-aes-intel.d: Likewise.
	* gas/i386/x86-64-avx.d: Likewise.
	* gas/i386/x86-64-avx.s: Likewise.
	* gas/i386/x86-64-avx-intel.d: Likewise.
	* gas/i386/x86-64-clmul.d: Likewise.
	* gas/i386/x86-64-clmul-intel.d: Likewise.
	* gas/i386/x86-64-clmul.s: Likewise.
	* gas/i386/x86-64-inval-avx.l: Likewise.
	* gas/i386/x86-64-inval-avx.s: Likewise.
	* gas/i386/x86-64-sse2avx.d: Likewise.
	* gas/i386/x86-64-sse2avx.s: Likewise.

	* gas/i386/arch-10.s: Add tests for AVX, AES, CLMUL and FMA.
	* gas/i386/x86-64-arch-2.s: Likewise.

	* gas/i386/rexw.s: Add AVX tests.

	* gas/i386/x86-64-opcode-inval.s: Remove lds/les test.

	* gas/cfi/cfi-i386.d: Updated.
	* gas/cfi/cfi-x86_64.d: Likewise.
	* gas/i386/arch-10.d:  Likewise.
	* gas/i386/arch-10-1.l: Likewise.
	* gas/i386/arch-10-2.l: Likewise.
	* gas/i386/arch-10-3.l: Likewise.
	* gas/i386/arch-10-4.l: Likewise.
	* gas/i386/rexw.d: Likewise.
	* gas/i386/x86-64-arch-2.d: Likewise.
	* gas/i386/x86-64-opcode-inval.d: Likewise.
	* gas/i386/x86-64-opcode-inval-intel.d: Likewise.

include/opcode/

2008-04-03  H.J. Lu  <hongjiu.lu@intel.com>

	* i386.h (MAX_OPERANDS): Set to 5.
	(MAX_MNEM_SIZE): Changed to 20.

opcodes/

2008-04-03  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-dis.c (OP_E_register): New.
	(OP_E_memory): Likewise.
	(OP_VEX): Likewise.
	(OP_EX_Vex): Likewise.
	(OP_EX_VexW): Likewise.
	(OP_XMM_Vex): Likewise.
	(OP_XMM_VexW): Likewise.
	(OP_REG_VexI4): Likewise.
	(PCLMUL_Fixup): Likewise.
	(VEXI4_Fixup): Likewise.
	(VZERO_Fixup): Likewise.
	(VCMP_Fixup): Likewise.
	(VPERMIL2_Fixup): Likewise.
	(rex_original): Likewise.
	(rex_ignored): Likewise.
	(Mxmm): Likewise.
	(XMM): Likewise.
	(EXxmm): Likewise.
	(EXxmmq): Likewise.
	(EXymmq): Likewise.
	(Vex): Likewise.
	(Vex128): Likewise.
	(Vex256): Likewise.
	(VexI4): Likewise.
	(EXdVex): Likewise.
	(EXqVex): Likewise.
	(EXVexW): Likewise.
	(EXdVexW): Likewise.
	(EXqVexW): Likewise.
	(XMVex): Likewise.
	(XMVexW): Likewise.
	(XMVexI4): Likewise.
	(PCLMUL): Likewise.
	(VZERO): Likewise.
	(VCMP): Likewise.
	(VPERMIL2): Likewise.
	(xmm_mode): Likewise.
	(xmmq_mode): Likewise.
	(ymmq_mode): Likewise.
	(vex_mode): Likewise.
	(vex128_mode): Likewise.
	(vex256_mode): Likewise.
	(USE_VEX_C4_TABLE): Likewise.
	(USE_VEX_C5_TABLE): Likewise.
	(USE_VEX_LEN_TABLE): Likewise.
	(VEX_C4_TABLE): Likewise.
	(VEX_C5_TABLE): Likewise.
	(VEX_LEN_TABLE): Likewise.
	(REG_VEX_XX): Likewise.
	(MOD_VEX_XXX): Likewise.
	(PREFIX_0F38DB..PREFIX_0F38DF): Likewise.
	(PREFIX_0F3A44): Likewise.
	(PREFIX_0F3ADF): Likewise.
	(PREFIX_VEX_XXX): Likewise.
	(VEX_OF): Likewise.
	(VEX_OF38): Likewise.
	(VEX_OF3A): Likewise.
	(VEX_LEN_XXX): Likewise.
	(vex): Likewise.
	(need_vex): Likewise.
	(need_vex_reg): Likewise.
	(vex_i4_done): Likewise.
	(vex_table): Likewise.
	(vex_len_table): Likewise.
	(OP_REG_VexI4): Likewise.
	(vex_cmp_op): Likewise.
	(pclmul_op): Likewise.
	(vpermil2_op): Likewise.
	(m_mode): Updated.
	(es_reg): Likewise.
	(PREFIX_0F38F0): Likewise.
	(PREFIX_0F3A60): Likewise.
	(reg_table): Add REG_VEX_71...REG_VEX_73 and REG_VEX_AE.
	(prefix_table): Add PREFIX_0F38DB..PREFIX_0F38DF, PREFIX_0F3ADF
	and PREFIX_VEX_XXX entries.
	(x86_64_table): Use VEX_C4_TABLE and VEX_C5_TABLE.
	(three_byte_table): Use PREFIX_0F38DB..PREFIX_0F38DF and
	PREFIX_0F3ADF.
	(mod_table): Use VEX_C4_TABLE, VEX_C5_TABLE and VEX_LEN_TABLE.
	Add MOD_VEX_XXX entries.
	(ckprefix): Initialize rex_original and rex_ignored.  Store the
	REX byte in rex_original.
	(get_valid_dis386): Handle the implicit prefix in VEX prefix
	bytes and USE_VEX_LEN_TABLE/USE_VEX_C4_TABLE/USE_VEX_C5_TABLE.
	(print_insn): Set need_vex/need_vex_reg/vex_i4_done to 0 before
	calling get_valid_dis386.  Use rex_original and rex_ignored when
	printing out REX.
	(putop): Handle "XY".
	(intel_operand_size): Handle VEX, xmm_mode, xmmq_mode and
	ymmq_mode.
	(OP_E_extended): Updated to use OP_E_register and
	OP_E_memory.
	(OP_XMM): Handle VEX.
	(OP_EX): Likewise.
	(XMM_Fixup): Likewise.
	(CMP_Fixup): Use ARRAY_SIZE.

	* i386-gen.c (cpu_flag_init): Add CpuAES, CPU_CLMUL_FLAGS,
	CPU_FMA_FLAGS and CPU_AVX_FLAGS.
	(operand_type_init): Add OPERAND_TYPE_REGYMM and
	OPERAND_TYPE_VEX_IMM4.
	(cpu_flags): Add CpuAVX, CpuAES, CpuCLMUL and CpuFMA.
	(opcode_modifiers): Add Implicit1stXmm0, Vex, Vex256, VexNDD,
	VexNDS, VexW0, VexW1, Vex0F, Vex0F38, Vex0F3A, Vex3Sources,
	VexImmExt and SSE2AVX.
	(operand_types): Add RegYMM, Ymmword and Vex_Imm4.

	* i386-opc.h (CpuAVX): New.
	(CpuAES): Likewise.
	(CpuCLMUL): Likewise.
	(CpuFMA): Likewise.
	(Vex): Likewise.
	(Vex256): Likewise.
	(VexNDS): Likewise.
	(VexNDD): Likewise.
	(VexW0): Likewise.
	(VexW1): Likewise.
	(Vex0F): Likewise.
	(Vex0F38): Likewise.
	(Vex0F3A): Likewise.
	(Vex3Sources): Likewise.
	(VexImmExt): Likewise.
	(SSE2AVX): Likewise.
	(RegYMM): Likewise.
	(Ymmword): Likewise.
	(Vex_Imm4): Likewise.
	(Implicit1stXmm0): Likewise.
	(CpuXsave): Updated.
	(CpuLM): Likewise.
	(ByteOkIntel): Likewise.
	(OldGcc): Likewise.
	(Control): Likewise.
	(Unspecified): Likewise.
	(OTMax): Likewise.
	(i386_cpu_flags): Add cpuavx, cpuaes, cpuclmul and cpufma.
	(i386_opcode_modifier): Add implicit1stxmm0, vex, vex256,
	vexnds, vexndd, vexw0, vexw1, vex0f, vex0f38, vex0f3a,
	vex3sources, veximmext and sse2avx.
	(i386_operand_type): Add regymm, ymmword and vex_imm4.

	* i386-opc.tbl: Add AES, CLMUL, AVX and FMA new instructions.

	* i386-reg.tbl: Add AVX registers, ymm0..ymm15.

	* i386-init.h: Regenerated.
	* i386-tbl.h: Likewise.
2008-04-03 14:03:20 +00:00
Eric Weddington 07e2a8f376 /gas:
2008-03-28  Eric B. Weddington  <eric.weddington@atmel.com>

	* config/tc-avr.c (mcu_types): Add attiny167.
	* doc/c-avr.texi: Likewise.

/include:
2008-03-28  Eric B. Weddington  <eric.weddington@atmel.com>

	* opcode/avr.h (AVR_ISA_TINY3): Define new opcode set for attiny167.
2008-03-28 21:51:38 +00:00
Nick Clifton cb411288ce Add support for thin archives.
* bfd/archive.c (_bfd_find_nested_archive): New function.
    (get_extended_arelt_filename): Add origin parameter.
    (_bfd_generic_read_ar_hdr_mag): Deal with extended name
    combined with a file offset.
    (append_relative_path): New function.
    (_bfd_get_elt_at_filepos): Deal with external members and
    nested archives.
    (bfd_generic_openr_next_archived_file): Thin archives.
    (bfd_generic_archive_p): Recognize new magic string.
    (adjust_relative_path): New function.
    (_bfd_construct_extended_name_table): Construct extended
    names for thin archive members.
    (_bfd_write_archive_contents): Emit new magic string, skip
    copying files for thin archives.
    * bfd/bfd-in.h (bfd_is_thin_archive): New macro.
    * bfd/bfd.c (struct bfd): New fields for thin archives.
    * bfd/libbfd-in.h (struct areltdata): New field for thin archives.
    * bfd/opncls.c (bfd_close): Delete BFDs for nested archives.
    * binutils/ar.c (make_thin_archive): New global flag.
    (map_over_members): Deal with full pathnames in thin archives.
    (usage, main): Add 'T' option for building thin archives.
    (replace_members): Pass thin archive flag to ar_emul_append.
    * binutils/arsup.c (ar_open): Initialize new flag.
    * binutils/binemul.c (ar_emul_append): Add new parameter for
    flattening nested archives.
    (do_ar_emul_default_append): New function.
    (ar_emul_default_append): Factored out recursive code.
    * binutils/binemul.h (ar_emul_default_append): Add new parameter.
    (struct bin_emulation_xfer_struct): New parameter for ar_append.
    * binutils/dlltool.c (gen_lib_file): Initialize thin archive flag.
    * binutils/emul_aix.c (ar_emul_aix_internal): Add new flatten
    parameter, currently unimplemented.
    All callers changed.
    * binutils/objcopy.c (copy_archive): Preserve thin archive flag.
    * binutils/doc/binutils.texi: Update ar documentation.
    * binutils/testsuite/binutils-all/ar.exp: Add thin archive tests.
    * include/aout/ar.h (ARMAGT): New magic string for thin archives.
2008-03-28 06:49:44 +00:00
Ian Lance Taylor 73de02f44b * common.h (NT_GNU_GOLD_VERSION): Define. 2008-03-25 04:58:21 +00:00
DJ Delorie f63cadb81a merge from gcc 2008-03-25 01:02:08 +00:00
Ian Lance Taylor c01f99ec87 Bring patch correction over from gcc repository. 2008-03-25 00:21:18 +00:00
Ian Lance Taylor f45a832315 * md5.h: Add extern "C" when compiled with C++. 2008-03-24 23:43:26 +00:00
Ian Lance Taylor b00c2ef98f * filenames.h: Add extern "C" when compiled with C++. 2008-03-21 23:40:18 +00:00
Andreas Krebbel 197dffcbd6 2008-03-19 Andreas Krebbel <krebbel1@de.ibm.com>
* opcodes/s390-mkopc.c (s390_opcode_cpu_val): S390_OPCODE_Z10 added.
	(s390_cond_extensions): Reduced extensions to the compare related.
	(main): z10 cpu type option added.
	(expandConditionalJump): Renamed to ...
	(insertExpandedMnemonic): ... this.

	* opcodes/s390-opc.c: Re-group the operand format makros.
	(INSTR_RIE_RRPU, INSTR_RIE_RRP0, INSTR_RIE_RUPI,
	INSTR_RIE_R0PI, INSTR_RIE_RUPU, INSTR_RIE_R0PU, INSTR_RIE_R0IU,
	INSTR_RIE_R0I0, INSTR_RIE_R0UU, INSTR_RIE_R0U0,
	INSTR_RIE_RRUUU, INSTR_RIS_RURDI, INSTR_RIS_R0RDI, INSTR_RIS_RURDU,
	INSTR_RIS_R0RDU, INSTR_RRF_U0RR, INSTR_RRF_00RR, INSTR_RRS_RRRDU,
	INSTR_RRS_RRRD0, INSTR_RXY_URRD, INSTR_SIY_IRD, INSTR_SIL_RDI,
	INSTR_SIL_RDU): New instruction formats added.
	(MASK_RIE_RRPU, MASK_RIE_RRP0, MASK_RIE_RUPI, MASK_RIE_R0PI,
	MASK_RIE_RUPU, MASK_RIE_R0PU, MASK_RIE_R0IU, MASK_RIE_R0I0,
	MASK_RIE_R0UU, MASK_RIE_R0U0, MASK_RIE_RRUUU, MASK_RIS_RURDI,
	MASK_RIS_R0RDI, MASK_RIS_RURDU, MASK_RIS_R0RDU, MASK_RRF_U0RR,
	MASK_RRF_00RR, MASK_RRS_RRRDU, MASK_RRS_RRRD0, MASK_RXY_URRD,
	MASK_SIY_IRD, MASK_SIL_RDI, MASK_SIL_RDU): New instruction format
	masks added.
	(s390_opformats): New formats added "ris", "rrs", "sil".
	* opcodes/s390-opc.txt: Add the conditional jumps with the
	extensions removed from automatic expansion in s390-mkopc.c manually.
	(asi - trtre): Add new System z10 EC instructions.
	* include/opcode/s390.h (s390_opcode_cpu_val): S390_OPCODE_Z10 added.

2008-03-19  Andreas Krebbel  <krebbel1@de.ibm.com>

	* config/tc-s390.c (md_parse_option): z10 option added.

2008-03-19  Andreas Krebbel  <krebbel1@de.ibm.com>

	* gas/s390/zarch-z10.d: New file.
	* gas/s390/zarch-z10.s: New file.
	* gas/s390/s390.exp: Run the z10 testcases.
2008-03-19 10:29:18 +00:00
Alan Modra fe389b5bfa include/elf/
* internal.h (Elf_Internal_Shdr): Change sh_link and sh_info from
	unsigned long to unsigned int.  Change sh_addralign to bfd_vma.
	Order struct as for external version.
bfd/
	* elf.c (_bfd_elf_make_section_from_shdr): Remove unnecessary cast.
	(_bfd_elf_assign_file_position_for_section): Simplify align.
	(_bfd_elf_init_reloc_shdr): Ensure shift expression wide enough
	for sh_addralign.
	(elf_fake_sections, swap_out_syms): Likewise.
	* elflink.c (bfd_elf_final_link): Likewise.
binutils/
	* readelf.c: Use %u throughout when printing sh_link or sh_info,
	%lu when printing sh_addralign.
	(process_version_sections): Use identical formats when printing
	all offset and sh_link fields.
2008-03-13 05:27:41 +00:00
Alan Modra 674310fb40 include/elf/
PR 5900
	* common.h (SHN_BAD): Delete.
	(SHN_LORESERVE .. SHN_HIRESERVE): Move to..
	* external.h: ..here.
	* internal.h (SHN_LORESERVE, SHN_HIRESERVE): Define.
	(SHN_LOPROC, SHN_HIPROC, SHN_LOOS, SHN_HIOS): Define.
	(SHN_ABS, SHN_COMMON, SHN_XINDEX, SHN_BAD): Define.
bfd/
	PR 5900
	* elf-bfd.h: Include elf/internal.h after elf/external.h.
	* elfcode.h (elf_swap_symbol_in): Map reserved shndx range.
	(elf_swap_symbol_out): Adjust SHN_XINDEX test.
	(elf_swap_ehdr_out): Mask SHN_LORESERVE and SHN_XINDEX to values
	seen in external structs.
	(valid_section_index_p): Delete.
	(elf_object_p): Don't increment section numbers over reserved range.
	Simplify test for valid sh_link, sh_info and e_shstrndx fields.
	(elf_write_shdrs_and_ehdr): Mask SHN_LORESERVE and SHN_XINDEX to values
	seen in external structs.  Don't increment section numbers over
	reserved range.
	* elf.c (bfd_elf_sym_name): Remove redundant tests on st_shndx.
	(bfd_section_from_shdr): Likewise.
	(group_signature): Range check before accessing elf_elfsections.
	(_bfd_elf_setup_sections): Likewise.
	(bfd_section_from_shdr): Likewise.
	(bfd_section_from_shdr): Don't increment section number over
	reserved sections.
	(assign_file_positions_for_non_load_sections): Likewise.
	(assign_file_positions_except_relocs): Likewise.
	(_bfd_elf_write_object_contents): Likewise.
	(assign_section_numbers): Likewise.  Adjust for changed SHN_*.
	(prep_headers): Delete unused variable.
	* elflink.c (bfd_elf_link_record_local_dynamic_symbol): Adjust
	for changed SHN_* values.
	(check_dynsym, elf_link_input_bfd): Likewise.
	(bfd_elf_final_link): Likewise.  Don't skip over reserved section
	range.
	(elf_fixup_link_order): Check that sh_link field is valid.
	* elf-hppa.h (elf_hppa_add_symbol_hook): Make "index" unsigned.
	* elf32-arm.c (elf32_arm_gc_mark_extra_sections): Range check before
	accesssing elf_elfsections.
	* elf32-avr.c (elf32_avr_size_stubs): Likewise.
	* elf32-hppa.c (elf32_hppa_size_stubs): Likewise.
	* elf32-m68hc1x.c (elf32_m68hc11_size_stubs): Likewise.
	* elf64-hppa.c (elf64_hppa_check_relocs): Adjust for changed
	SHN_* defines.  Test for SHN_BAD return from
	_bfd_elf_section_from_bfd_section
binutils/
	PR 5900
	* readelf.c (SECTION_HEADER_INDEX, SECTION_HEADER_NUM): Delete.
	Remove use throughout file.
	(SECTION_HEADER): Likewise.
	(dump_relocations): Don't adjust st_shndx for reserved range.
	(process_file_header): Mask SHN_XINDEX to values seen in external
	elf structs.  Simplify valid section index tests.
	(get_32bit_elf_symbols, get_64bit_elf_symbols): Mask SHN_XINDEX.
	Map reserved st_shndx to internal form.
	(process_section_groups): Test that group symbol st_shndx is in
	range, not just non-zero.  Delete reserved range check.
	(get_symbol_index_type): Mask "type" to 16 bits when printing PRC,
	OS or RSV.
gdb/
	PR 5900
	* elfread.c (elf_symtab_read): Make shndx an unsigned int.
	* mipsread.c: Include elf/internal.h.
	(read_alphacoff_dynamic_symtab): Map external reserved sym_shndx
	to internal range.
ld/testsuite/
	PR 5900
	* ld-elf/sec64k.exp: Update.
2008-03-12 08:36:58 +00:00
Alan Modra 93f73715d1 * elf/cr16c.h (SHN_CR16C_FCOMMON): Define using SHN_LORESERVE.
(SHN_CR16C_NCOMMON): Likewise.
	* elf/hppa.h (SHN_PARISC_ANSI_COMMON): Likewise.
	(SHN_PARISC_HUGE_COMMON): Likewise.
	* elf/ia64.h (SHN_IA_64_ANSI_COMMON): Likewise.
	(SHN_IA_64_VMS_SYMVEC): Define using SHN_LOOS.
	* elf/m32r.h (SHN_M32R_SCOMMON): Define using SHN_LORESERVE.
	* elf/mips.h (SHN_MIPS_ACOMMON, SHN_MIPS_TEXT): Likewise.
	(SHN_MIPS_DATA, SHN_MIPS_SCOMMON, SHN_MIPS_SUNDEFINED): Likewise.
	* elf/score.h (SHN_SCORE_TEXT, SHN_SCORE_DATA): Likewise.
	(SHN_SCORE_SCOMMON): Likewise.
	* elf/sparc.h (SHN_BEFORE, SHN_AFTER): Likewise.
	* elf/v850.h (SHN_V850_SCOMMON, SHN_V850_TCOMMON): Likewise.
	(SHN_V850_ZCOMMON): Likewise.
	* elf/x86-64.h (SHN_X86_64_LCOMMON): Likewise.
2008-03-11 23:21:08 +00:00
Paul Brook 3461c83a05 2008-03-09 Paul Brook <paul@codesourcery.com>
bfd/
	* elf32-arm.c (elf32_arm_merge_eabi_attributes): Handle new
	Tag_VFP_arch values.

	binutils/
	* readelf.c (arm_attr_tag_VFP_arch): Add "VFPv3-D16".

	gas/
	* config/tc-arm.c (fpu_vfp_ext_d32): New vairable.
	(parse_vfp_reg_list, encode_arm_vfp_reg): Use it.
	(arm_option_cpu_value): Add vfpv3-d16, vfpv2 and vfpv3.
	(aeabi_set_public_attributes): Handle Tag_VFP_arch=VFPV3-D16.
	* doc/c-arm.texi: Document new ARM FPU variants.

	gas/testsuite/
	* gas/arm/vfpv3-d16-bad.d: New test.
	* gas/arm/vfpv3-d16-bad.l: New test.

	include/opcode/
	* arm.h (FPU_VFP_EXT_D32, FPU_VFP_V3D16, FPU_ARCH_VFP_V3D16): Define.
2008-03-09 13:23:29 +00:00
Paul Brook e3bf57046b 2008-03-04 Paul Brook <paul@codesourcery.com>
gas/
	* config/tc-arm.c (arm_ext_barrier, arm_ext_msr): New.
	(arm_ext_v7m): Rename...
	(arm_ext_m): ... to this.  Include v6-M.
	(do_t_add_sub): Allow narrow low-reg non flag setting adds.
	(do_t_mrs, do_t_msr, aeabi_set_public_attributes): Use arm_ext_m.
	(md_assemble): Allow wide msr instructions.
	(insns): Add classifications for v6-m instructions.
	(arm_cpu_option_table): Add cortex-m1.
	(arm_arch_option_table): Add armv6-m.
	(cpu_arch): Add ARM_ARCH_V6M.  Fix numbering of other v6 variants.

	gas/testsuite/
	* gas/arm/archv6m.d: New test.
	* gas/arm/archv6m.s: New test.
	* gas/arm/t16-bad.s: Test low register non flag setting add.
	* gas/arm/t16-bad.l: Update expected output.

	include/opcode/
	* arm.h (ARM_EXT_V6M, ARM_EXT_BARRIER, ARM_EXT_THUMB_MSR): Define.
	(ARM_AEXT_V6T2, ARM_AEXT_V7_ARM, ARM_AEXT_V7M): Use new flags.
	(ARM_AEXT_V6M, ARM_ARCH_V6M): Define.
2008-03-05 01:31:26 +00:00
Nick Clifton 193b9a616d * dwarf2.h: (enum dwarf_location_atom): Add new DW_OP,
DW_OP_PGI_omp_thread_num.

* dwarf.c (decode_location_expression): Handle
  DW_OP_PGI_omp_thread_num.
2008-03-03 10:19:01 +00:00
Nick Clifton fb91cb7a41 Change accreditation for patch for PR3134 2008-02-29 14:43:17 +00:00
Nick Clifton ca504a0dee PR 3134
* h8300.h (h8_opcodes): Add an encoding for a mov.l instruction
   with a 32-bit displacement but without the top bit of the 4th byte
   set.

   * gas/h8300/pr3134.s: New test.
   * gas/h8300/pr3134.d: Expected disassembly
   * gas/h8300/h8300.exp: Run the new test.

   * gas/h8300/h8300-coff.exp: Fix test for COFF based ports to
   accept h8300-rtemscoff not just h8300-rtems.
2008-02-27 12:33:42 +00:00
Nick Clifton 344f17f1fa * cr16.h (cr16_num_optab): Declared.
* cr16-opc.c  (cr16_num_optab): Defined
2008-02-18 13:46:45 +00:00
Alan Modra d039978069 include/
* bfdlink.h (struct bfd_link_hash_table): Delete creator field.
	(struct bfd_link_info): Add output_bfd.
bfd/
	* elflink.c: Replace all accesses to hash->creator field with
	output_bfd->xvec.
	* cofflink.c: Likewise.
	* coff-h8300.c: Likewise.
	* ecoff.c: Likewise.
	* elf32-m68hc1x.c: Likewise.
	* elf32-ppc.c: Likewise.
	* elf64-alpha.c: Likewise.
	* elf64-ppc.c: Likewise.
	* elf64-sparc.c: Likewise.
	* elfxx-mips.c: Likewise.
	* i386linux.c: Likewise.
	* m68klinux.c: Likewise.
	* sparclinux.c: Likewise.
	* sunos.c: Likewise.
	* xcofflink.c: Likewise.
	* linker.c: Likewise.
	(_bfd_link_hash_table_init): Don't store creator.
ld/
	* ldmain.h (output_bfd): Delete.
	* ldmain.c (output_bfd): Delete.
	Replace all occurrences of output_bfd with link_info.output_bfd.
	* ldcref.c: Likewise.
	* ldctor.c: Likewise.
	* ldemul.c: Likewise.
	* ldexp.c: Likewise.
	* ldfile.c: Likewise.
	* ldlang.c: Likewise.
	* ldmisc.c: Likewise.
	* ldwrite.c: Likewise.
	* pe-dll.c: Likewise.
	* emultempl/aix.em: Likewise.
	* emultempl/alphaelf.em: Likewise.
	* emultempl/armcoff.em: Likewise.
	* emultempl/armelf.em: Likewise.
	* emultempl/avrelf.em: Likewise.
	* emultempl/beos.em: Likewise.
	* emultempl/elf-generic.em: Likewise.
	* emultempl/elf32.em: Likewise.
	* emultempl/gld960.em: Likewise.
	* emultempl/hppaelf.em: Likewise.
	* emultempl/irix.em: Likewise.
	* emultempl/linux.em: Likewise.
	* emultempl/lnk960.em: Likewise.
	* emultempl/m68hc1xelf.em: Likewise.
	* emultempl/mmix-elfnmmo.em: Likewise.
	* emultempl/mmo.em: Likewise.
	* emultempl/pe.em: Likewise.
	* emultempl/pep.em: Likewise.
	* emultempl/ppc32elf.em: Likewise.
	* emultempl/ppc64elf.em: Likewise.
	* emultempl/scoreelf.em: Likewise.
	* emultempl/sh64elf.em: Likewise.
	* emultempl/spuelf.em: Likewise.
	* emultempl/sunos.em: Likewise.
	* emultempl/vanilla.em: Likewise.
	* emultempl/vxworks.em: Likewise.
	* emultempl/xtensaelf.em: Likewise.
	* emultempl/z80.em: Likewise.
	* ldlang.c (open_output): Don't return output, instead write
	link_info_output_bfd directly.
	* emultempl/alphaelf.em: Replace occurrences of link_info.hash->creator
	with link_info.output_bfd->xvec.
	* emultempl/hppaelf.em: Likewise.
	* emultempl/ppc32elf.em: Likewise.
	* emultempl/ppc64elf.em: Likewise.
	* emultempl/spuelf.em: Likewise.
2008-02-15 03:35:51 +00:00
Nick Clifton f16db7f54e PR gas/2626
* avr.h (AVR_ISA_2xxe): Define.

        * config/tc-avr.c (mcu_types): Change the ISA tyoe of the attiny26
        to AVR_ISA_2xxe.
        (avr_operand): Disallow post-increment addressing in the lpm
        instruction for the attiny26.
2008-02-14 13:04:29 +00:00
Bob Wilson 001e850653 * xtensa-config.h (XCHAL_HAVE_THREADPTR): Redefine to zero.
(XCHAL_NUM_AREGS, XCHAL_MAX_INSTRUCTION_SIZE): New.
2008-02-11 17:53:04 +00:00
Adam Nemet 58d470721b * mips.h: Update copyright.
(INSN_CHIP_MASK): New macro.
	(INSN_OCTEON): New macro.
	(CPU_OCTEON): New macro.
	(OPCODE_IS_MEMBER): Handle Octeon instructions.
2008-02-04 19:25:05 +00:00
Adam Nemet ce4a642382 * mips.h: Update copyright.
(E_MIPS_MACH_OCTEON): New macro.
2008-02-04 19:21:25 +00:00
Nick Clifton f022e6b98e Add OpenVMS extensions.
* ia64.h (SHF_IA_64_VMS_GLOBAL, SHF_IA_64_VMS_OVERLAID)
        (SHF_IA_64_VMS_SHARED, SHF_IA_64_VMS_VECTOR)
        (SHF_IA_64_VMS_ALLOC_64BIT, SHF_IA_64_VMS_PROTECTED)
        (SHT_IA_64_VMS_TRACE, SHT_IA_64_VMS_TIE_SIGNATURES)
        (SHT_IA_64_VMS_DEBUG, SHT_IA_64_VMS_DEBUG_STR)
        (SHT_IA_64_VMS_LINKAGES, SHT_IA_64_VMS_SYMBOL_VECTOR)
        (SHT_IA_64_VMS_FIXUP, DT_IA_64_VMS_SUBTYPE)
        (DT_IA_64_VMS_IMGIOCNT, DT_IA_64_VMS_LNKFLAGS)
        (DT_IA_64_VMS_VIR_MEM_BLK_SIZ, DT_IA_64_VMS_IDENT)
        (DT_IA_64_VMS_NEEDED_IDENT, DT_IA_64_VMS_IMG_RELA_CNT)
        (DT_IA_64_VMS_SEG_RELA_CNT, DT_IA_64_VMS_FIXUP_RELA_CNT)
        (DT_IA_64_VMS_FIXUP_NEEDED, DT_IA_64_VMS_SYMVEC_CNT)
        (DT_IA_64_VMS_XLATED, DT_IA_64_VMS_STACKSIZE)
        (DT_IA_64_VMS_UNWINDSZ, DT_IA_64_VMS_UNWIND_CODSEG)
        (DT_IA_64_VMS_UNWIND_INFOSEG, DT_IA_64_VMS_LINKTIME)
        (DT_IA_64_VMS_SEG_NO, DT_IA_64_VMS_SYMVEC_OFFSET)
        (DT_IA_64_VMS_SYMVEC_SEG, DT_IA_64_VMS_UNWIND_OFFSET)
        (DT_IA_64_VMS_UNWIND_SEG, DT_IA_64_VMS_STRTAB_OFFSET)
        (DT_IA_64_VMS_SYSVER_OFFSET, DT_IA_64_VMS_IMG_RELA_OFF)
        (DT_IA_64_VMS_SEG_RELA_OFF, DT_IA_64_VMS_FIXUP_RELA_OFF)
        (DT_IA_64_VMS_PLTGOT_OFFSET, DT_IA_64_VMS_PLTGOT_SEG)
        (DT_IA_64_VMS_FPMODE, SHN_IA_64_VMS_SYMVEC): Define

        * readelf.c (dump_relocations): Decode OpenVMS-specific sections.
        (get_ia64_dynamic_type): Decode OpenVMS-specific tags.
        (get_dynamic_type): Handle IA64-specific tags.
        (get_ia64_section_type_name): Handle OpenVMS-specific sections.
        (get_section_type_name): Handle OS-specific sections (and
        particularly IA64 OpenVMS one).
        (get_elf_section_flags): Makes flags static.  Add entries for IA64 and
        decode them.
2008-01-30 10:37:43 +00:00
David Daney a665fef641 include/
2008-01-26  David Daney  <ddaney@avtrex.com>

	* demangle.h (demangle_component_type):  Add
	DEMANGLE_COMPONENT_JAVA_RESOURCE,
	DEMANGLE_COMPONENT_COMPOUND_NAME, and
	DEMANGLE_COMPONENT_CHARACTER as new enum values.
	(demangle_component): Add struct s_character to union u.

libiberty/
2008-01-26  David Daney  <ddaney@avtrex.com>

	* cp-demangle.c (d_dump): Handle DEMANGLE_COMPONENT_JAVA_RESOURCE,
	DEMANGLE_COMPONENT_COMPOUND_NAME, and
	DEMANGLE_COMPONENT_CHARACTER cases.
	(d_make_comp): Handle DEMANGLE_COMPONENT_COMPOUND_NAME and
	DEMANGLE_COMPONENT_JAVA_RESOURCE cases.
	(d_make_character): New function.
	(d_java_resource): Same.
	(d_special_name): Handle "Gr" case.
	(d_print_comp): Handle DEMANGLE_COMPONENT_JAVA_RESOURCE,
	DEMANGLE_COMPONENT_COMPOUND_NAME, and
	DEMANGLE_COMPONENT_CHARACTER cases.
	* testsuite/demangle-expected: Add test for java resource name
	mangling.
2008-01-27 06:25:45 +00:00
Eric Weddington 4be948a34a /gas:
2008-01-23  Eric B. Weddington  <eric.weddington@atmel.com>

	* config/tc-avr.c (mcu_types): Change opcode set for at86rf401.

/include:
2008-01-23  Eric B. Weddington  <eric.weddington@atmel.com>

	* opcode/avr.h (AVR_ISA_RF401): Add new opcode set for at86rf401.
2008-01-23 17:36:23 +00:00
Mark Kettenis 60308c48f2 * common.h (AT_SUN_AUXFLAGS): Define. 2008-01-16 22:01:42 +00:00
Eric Weddington c7b8bedfb2 /gas:
2008-01-03  Eric B. Weddington  <eric.weddington@atmel.com>

	* config/tc-avr.c (mcu_types): Change opcode set for avr3,
	at90usb82, at90usb162.
	* doc/c-avr.texi: Change architecture grouping for at90usb82,
	at90usb162.
	These changes support the new avr35 architecture group in gcc.

/include:
2008-01-03  Eric B. Weddington  <eric.weddington@atmel.com>

	* opcode/avr.h (AVR_ISA_USB162): Add new opcode set.
	(AVR_ISA_AVR3): Likewise.
2008-01-16 17:59:07 +00:00
Daniel Jacobowitz 2dba9eb2d4 Updated copyright notices for most files. 2008-01-01 22:53:22 +00:00
Daniel Jacobowitz fb09a73e93 * dwarf2.h (DW_AT_hi_user): Correct value. 2007-12-11 12:56:21 +00:00
Bob Wilson 1995e606d8 2007-12-07 Bob Wilson <bob.wilson@acm.org>
include/elf/
	* xtensa.h (R_XTENSA_32_PCREL): New.

bfd/
	* elf32-xtensa.c (elf_howto_table): Add R_XTENSA_32_PCREL.
	(elf_xtensa_reloc_type_lookup): Handle BFD_RELOC_32_PCREL.
	(elf_xtensa_check_relocs): Use default case for all relocations that
	need nothing done here.
	(elf_xtensa_do_reloc): Compute self_address for all relocation types.
	Handle R_XTENSA_32_PCREL.
	(elf_xtensa_relocate_section): Check for R_XTENSA_32_PCREL for dynamic
	symbols.
	(check_section_ebb_pcrels_fit): Ignore R_XTENSA_32_PCREL relocations.

gas/
	* config/tc-xtensa.c (O_pcrel): Define.
	(suffix_relocs): Add pcrel suffix.
	(md_pseudo_table): Add 4byte and 2byte directives.
	(xtensa_elf_cons): Pass correct pcrel argument to fix_new_exp.
	(xg_assemble_literal): Likewise.  Check for O_pcrel.
	(expression_maybe_register): Reorganize.  Handle BFD_RELOC_32_PCREL.
	(xg_valid_literal_expression): Allow O_pcrel.
	(md_pcrel_from, md_apply_fix): Handle BFD_RELOC_32_PCREL.
	(tc_gen_reloc): Fix punctuation in error message.

gas/testsuite/
	* gas/xtensa/all.exp: Run new pcrel test.
	* gas/xtensa/err-pcrel.s: New.
	* gas/xtensa/pcrel.d: New.
	* gas/xtensa/pcrel.s: New.
	* gas/xtensa/xtensa-err.exp: New.
2007-12-07 22:52:08 +00:00
Mark Shinwell 47c9864a0a bfd/
* archures.c (bfd_mach_mips_loongson_2e): New.
	(bfd_mach_mips_loongson_2f): New.
	* bfd-in2.h (bfd_mach_mips_loongson_2e): New.
	(bfd_mach_mips_loongson_2f): New.
	* cpu-mips.c: Add I_loongson_2e and I_loongson_2f to
	anonymous enum.
	(arch_info_struct): Add Loongson-2E and Loongson-2F entries.
	* elfxx-mips.c (_bfd_elf_mips_mach): Handle Loongson-2E
	and Loongson-2F flags.
	(mips_set_isa_flags): Likewise.
	(mips_mach_extensions): Add Loongson-2E and Loongson-2F
	entries.

	binutils/
	* readelf.c (get_machine_flags): Handle Loongson-2E and -2F
	flags.

	gas/
	* config/tc-mips.c (mips_cpu_info_table): Add loongson2e
	and loongson2f entries.
	* doc/c-mips.texi: Document -march=loongson{2e,2f} options.

	gas/testsuite/
	* gas/mips/mips.exp: Add loongson-2e and -2f tests.
	* gas/mips/loongson-2e.d: New.
	* gas/mips/loongson-2e.s: New.
	* gas/mips/loongson-2f.d: New.
	* gas/mips/loongson-2f.s: New.

	include/elf/
	* mips.h (E_MIPS_MACH_LS2E): New.
	(E_MIPS_MACH_LS2F): New.

	include/opcode/
	* mips.h (INSN_LOONGSON_2E): New.
	(INSN_LOONGSON_2F): New.
	(CPU_LOONGSON_2E): New.
	(CPU_LOONGSON_2F): New.
	(OPCODE_IS_MEMBER): Update for Loongson-2E and -2F flags.

	opcodes/
	* mips-dis.c (mips_arch_choices): Add Loongson-2E and -2F
	entries.
	* mips-opc.c (IL2E): New.
	(IL2F): New.
	(mips_builtin_opcodes): Add Loongson-2E and -2F instructions.
	Allow movz and movn for Loongson-2E and -2F.  Add movnz entry.
	Move coprocessor encodings to the end of the table.  Allow
	certain MIPS V .ps instructions on the Loongson-2E and -2F.
2007-11-29 12:23:44 +00:00
Mark Shinwell 35e137475d include/opcode/
* mips.h (INSN_ISA*): Redefine certain values as an
	enumeration.  Update comments.
	(mips_isa_table): New.
	(ISA_MIPS*): Redefine to match enumeration.
	(OPCODE_IS_MEMBER): Modify to correctly test new INSN_ISA*
	values.

	opcodes/
	* mips-opc.c (I3_32, I3_33, I4_32, I4_33, I5_33): New.
	(mips_builtin_opcodes): Use these new I* values.
2007-11-29 11:55:19 +00:00
Nathan Sidwell 02cb1fd853 * internal.h (ELF_IS_SECTION_IN_SEGMENT): Adjust to cope with
segments at the end of memory.
2007-11-28 13:53:05 +00:00
Thiemo Seufer 91f2f75ac8 [ld/testsuite/ChangeLog]
* ld-mips-elf/attr-gnu-4-14.d, ld-mips-elf/attr-gnu-4-41.d:
	Adjust warning message for -mfp64 flag.
	* ld-mips-elf/attr-gnu-4-5.s, ld-mips-elf/attr-gnu-4-04.d,
	ld-mips-elf/attr-gnu-4-51.d, ld-mips-elf/attr-gnu-4-05.d,
	ld-mips-elf/attr-gnu-4-15.d, ld-mips-elf/attr-gnu-4-24.d,
	ld-mips-elf/attr-gnu-4-25.d, ld-mips-elf/attr-gnu-4-34.d,
	ld-mips-elf/attr-gnu-4-35.d, ld-mips-elf/attr-gnu-4-42.d,
	ld-mips-elf/attr-gnu-4-43.d, ld-mips-elf/attr-gnu-4-44.d,
	ld-mips-elf/attr-gnu-4-45.d, ld-mips-elf/attr-gnu-4-40.d,
	ld-mips-elf/attr-gnu-4-14.d: New testcases files.
	* ld-mips-elf/mips-elf.exp: Run new testcases.

	[binutils/ChangeLog]
	* readelf.c (display_mips_gnu_attribute): Recognize -mips32r2 -mfp64
	objects.

	[include/ChangeLog]
	* elf/mips.h (Tag_GNU_MIPS_ABI_FP): Mention -mips32r2 -mfp64 variant
	in comment.

	[bfd/ChangeLog]
	* elfxx-mips.c (mips_elf_merge_obj_attributes): Handle -mips32r2
	-mfp64 attribute.

	[gas/ChangeLog]
	* doc/as.texinfo: Document the new attribute value.
2007-11-17 13:38:57 +00:00
Nick Clifton 3c48ef66da * dwarf2.h: Mention the location of the DWARF3 spec on the web.
(DW_AT_stride_size): Rename to DW_AT_bit_stride.
  (DW_AT_stride): Rename to DW_AT_byte_stride.
* dwarf.c (process_extended_line_op): Add cases for HP extensions to the line ops.
  Mention if an unknown op code is in the user defined range.
  (decode_location_expression): Add cases for HP extensions, the DW_OP_GNU_uninit extension and the DW_OP_call_frame_cfa and DW_OP_bit_piece DWARF3 operators.
  (read_and_display_attr): Correct list of attributes which can reference a location list.
  (read_and_display_attr_value): Add cases for DWARF3 values and HP extensions.
  Correct list of attributes which can reference a location list.
  (get_AT_name): Add cases for DWARF3 values and HP and PGI extensions.
2007-11-16 15:36:21 +00:00
Nathan Sidwell 75a1688a39 include/elf/
* vxworks.h: New.

	bfd/
	* elf-vxworks.h (elf_vxworks_add_dynamic_entries): Declare.
	(elf_vxworks_finish_dynamic_entry): Declare.
	* elf-vxworks.c: Include elf/vxworks.h.
	(elf_vxworks_add_dynamic_entries): New.
	(elf_vxworks_finish_dynamic_entry): New.
	* Makefile.am (elf-vxworks.lo): Add dependency.
	* Makefile.in (elf-vxworks.lo): Add dependency.
	* elf32-i386.c (elf_i386_size_dynamic_sections,
	elf_i386_finish_dynamic_sections): Call
	elf_vxworks_add_dynamic_entries and
	elf_vxworks_finish_dynamic_entry.
	* elf32-ppc.c (ppc_elf_size_dynamic_sections,
	ppc_elf_finish_dynamic_sections): Likewise.
	* elfxx-sparc.c (_bfd_sparc_elf_size_dynamic_sections,
	sparc_finish_dyn): Likewise.
	* elf32-sh.c (sh_elf_size_dynamic_sections,
	sh_elf_finish_dynamic_sections): Likewise.
	* elfxx-mips.c (_bfd_mips_elf_size_dynamic_sections,
	_bfd_mips_elf_finish_dynamic_sections): Likewise.
	* elf32-arm.c (elf32_arm_size_dynamic_sections,
	elf32_arm_finish_dynamic_sections): Likewise.

	ld/
	* ld-vxworks/tls-2.d: New.
	* ld-vxworks/tls-2.s: New.
2007-11-08 13:51:07 +00:00
Joseph Myers 33e178064d include:
2007-11-07  Joseph Myers  <joseph@codesourcery.com>
	    Daniel Jacobowitz  <dan@codesourcery.com>

	* floatformat.h (struct floatformat): Add split_half field.
	(floatformat_ibm_long_double): New.

libiberty:
2007-11-07  Joseph Myers  <joseph@codesourcery.com>
	    Daniel Jacobowitz  <dan@codesourcery.com>

	* floatformat.c (mant_bits_set): New.
	(floatformat_to_double): Use it.  Note no special handling of
	split formats.
	(floatformat_from_double): Note no special handing of split
	formats.
	(floatformat_ibm_long_double_is_valid,
	floatformat_ibm_long_double): New.
	(floatformat_ieee_single_big, floatformat_ieee_single_little,
	floatformat_ieee_double_big, floatformat_ieee_double_little,
	floatformat_ieee_double_littlebyte_bigword, floatformat_vax_f,
	floatformat_vax_d, floatformat_vax_g, floatformat_i387_ext,
	floatformat_m68881_ext, floatformat_i960_ext,
	floatformat_m88110_ext, floatformat_m88110_harris_ext,
	floatformat_arm_ext_big, floatformat_arm_ext_littlebyte_bigword,
	floatformat_ia64_spill_big, floatformat_ia64_spill_little,
	floatformat_ia64_quad_big, floatformat_ia64_quad_little): Update
	for addition of split_half field.

gdb:
2007-11-07  Joseph Myers  <joseph@codesourcery.com>
	    Daniel Jacobowitz  <dan@codesourcery.com>

	* gdbtypes.c (floatformats_ibm_long_double): New.
	* gdbtypes.h (floatformats_ibm_long_double): Declare.
	* ia64-tdep.c (floatformat_ia64_ext): Update for addition of
	split_half field.
	* mips-tdep.c (n32n64_floatformat_always_valid,
	floatformat_n32n64_long_double_big, floatformats_n32n64_long):
	Remove.
	(mips_gdbarch_init): Use floatformats_ibm_long_double instead of
	floatformats_n32n64_long.
	* ppc-linux-tdep.c (ppc_linux_init_abi): Use 128-bit IBM long
	double.
	* doublest.c (convert_floatformat_to_doublest,
	convert_doublest_to_floatformat): Handle split floating-point
	formats.
	* ppc-sysv-tdep.c (ppc_sysv_abi_push_dummy_call): Handle IBM long
	double arguments.
	(ppc64_sysv_abi_push_dummy_call): Likewise.
	(do_ppc_sysv_return_value): Handle IBM long double return.
2007-11-08 00:08:48 +00:00
Danny Smith 026d54aa23 include
* coff/pe.h (COFF_ENCODE_ALIGNMENT) Define.

gas
	* read.c (ALIGN_LIMIT): Rename to ...
	(TC_ALIGN_LIMIT): Guard against prior definition.
	* config/tc-i386.h (TC_ALIGN_LIMIT)[TE_PE]: Define.

bfd
	* pe-i386.c (COFF_SECTION_ALIGNMENT_ENTRIES): Let .data, .text
	 and .bss section use the default.
	* pei-i386.c (COFF_SECTION_ALIGNMENT_ENTRIES): Likewise.

ld/testsuite
	* ld-scripts/align.exp: Enable for PECOFF.
	* ld-scripts/alignof.exp: Likewise.
2007-11-04 23:49:08 +00:00
Nick Clifton 3ce8215a01 * mn10300.h (R_MN10300_ALIGN): Define.
* reloc.c (BFD_RELOC_MN10300_ALIGN): Add.
* bfd-in2.h: Regenerate.
* libbfd.h: Regenerate.
* elf-m10300.h: Handle R_MN10300_ALIGN relocs.
* mn10300_elf_relax_delete_bytes): Honour R_MN10300_ALIGN relocs.
  Re-fix off by one error in comparisons.
* config/tc-mn10300.c (tc_gen_reloc): Fix test that decides when
  sym_diff relocs should be generated.
  (md_apply_fix): Skip R_MN10300_ALIGN relocs.
  (mn10300_fix_adjustable): Do not adjust R_MN10300_ALIGN relocs.
  (mn10300_handle_align): New function.  Generate R_MN10300_ALIGN
  relocs to record alignment requests.
* config/tc-mn10300.h (TC_FORCE_RELOCATION_SUB_SAME): Also force
  R_MN10300_ALIGN relocs.
  (HANDLE_ALIGN): Define.  Call mn10300_handle_align.
* gas/all/gas.exp: Do not run diff1.s test for mn10300.
* ld-mn10300/mn10300.exp: Run new tests.  Skip i126256 test if
  a compiler is not available.
* ld-mn10300/i112045-3.s: New test.
* ld-mn10300/i112045-3.d: Expected disassembly.
* ld-mn10300/i135409.s: Rename to i135409-1.s.
* ld-mn10300/i135409.d: Rename to i135409-1.d
* ld-mn10300/i135409-2.s: New test.
* ld-mn10300/i135409-2.d: Expected symbol table.
* ld-mn10300/i36434.d: Adjust expected disassembly.
2007-10-30 15:18:29 +00:00
Daniel Jacobowitz 2b50cd503e * elf32-ppc.c (ppc_elf_merge_obj_attributes): Add support for
Tag_GNU_Power_ABI_Vector.

	* readelf.c (display_power_gnu_attribute): Add support for
	Tag_GNU_Power_ABI_Vector.

	* ppc.h (Tag_GNU_Power_ABI_Vector): New.

	* ld-powerpc/attr-gnu-8-1.s, ld-powerpc/attr-gnu-8-11.d,
	ld-powerpc/attr-gnu-8-2.s, ld-powerpc/attr-gnu-8-23.d,
	ld-powerpc/attr-gnu-8-3.s, ld-powerpc/attr-gnu-8-31.d: New.
	* ld-powerpc/powerpc.exp: Run new tests.
2007-10-25 15:20:24 +00:00
Nick Clifton 873e6f9d97 Add MN10300 linker relaxation support for symbol differences 2007-10-19 17:31:31 +00:00
Roland McGrath ffa1a46abd . 2007-10-18 09:57:07 +00:00
Roland McGrath 5565177f97 2007-10-18 Roland McGrath <roland@redhat.com>
* common.h (NT_PPC_VMX): New macro.
2007-10-18 09:57:04 +00:00
Daniel Jacobowitz dd52035079 * NEWS: Document target described register support for PowerPC.
* ppc-tdep.h: Remove ppc_spr constants.
	(struct gdbarch_tdep): Remove regs, ppc_sr0_regnum, and
	ppc_builtin_type_vec128 members.
	(PPC_R0_REGNUM, PPC_F0_REGNUM, PPC_PC_REGNUM, PPC_MSR_REGNUM)
	(PPC_CR_REGNUM, PPC_LR_REGNUM, PPC_CTR_REGNUM, PPC_XER_REGNUM)
	(PPC_FPSCR_REGNUM, PPC_MQ_REGNUM, PPC_SPE_UPPER_GP0_REGNUM)
	(PPC_SPE_ACC_REGNUM, PPC_SPE_FSCR_REGNUM, PPC_VR0_REGNUM)
	(PPC_VSCR_REGNUM, PPC_VRSAVE_REGNUM, PPC_NUM_REGS): New constants.
	* rs6000-tdep.c: Include preparsed descriptions.
	(init_sim_regno_table): Do not iterate over pseudo registers.
	Look up segment registers by name.  Use sim_spr_register_name
	for SPRs.
	(rs6000_register_sim_regno): Call init_sim_regno_table here.
	(rs6000_builtin_type_vec128): Delete.
	(rs6000_register_name): Only handle SPE pseudo registers and upper
	halves.  Call tdesc_register_name for everything else.
	(rs6000_register_type): Delete.  Replace with...
	(rs6000_pseudo_register_type): ...this new function.  Only handle
	SPE pseudo registers.
	(rs6000_register_reggroup_p): Delete.  Replace with...
	(rs6000_pseudo_register_reggroup_p): ...this new function.  Only
	handle SPE pseudo registers.
	(rs6000_convert_register_p): Use ppc_fp0_regnum instead of
	"struct reg".
	(rs6000_register_to_value, rs6000_value_to_register): Remove check
	of reg->fpr.
	(e500_register_reggroup_p): Delete.
	(STR, R, R4, R8, R16, F, P8, R32, R64, R0, A4, S, S4, SN4, S64)
	(COMMON_UISA_REGS, PPC_UISA_SPRS, PPC_UISA_NOFP_SPRS)
	(PPC_SEGMENT_REGS, PPC_OEA_SPRS, PPC_ALTIVEC_REGS, PPC_SPE_GP_REGS)
	(PPC_SPE_UPPER_GP_REGS, PPC_EV_PSEUDO_REGS): Delete macros.
	(registers_powerpc, registers_403, registers_403GC, registers_505)
	(registers_860, registers_601, registers_602, registers_603)
	(registers_604, registers_750, registers_7400, registers_e500): Delete
	variables.
	(struct variant): Delete nregs, npregs, num_tot_regs, and regs.  Add
	tdesc.
	(tot_num_registers, num_registers, num_pseudo_registers): Delete.
	(variants): Delete outdated comment.  Use standard target descriptions
	instead of "struct reg" arrays.
	(init_variants): Delete.
	(rs6000_gdbarch_init): Do not guess word size from the BFD
	architecture if we have a target description.  Select a variant
	before creating a new architecture.  Use the variant's target
	description if the target did not define a register layout.
	Validate target-supplied registers.  Reject mismatches.  Use
	fixed register numbers and new constants instead of magic
	numbers.  Call set_gdbarch_ps_regnum.  Call tdesc_use_registers.
	(_initialize_rs6000_tdep): Initialize the preparsed target
	descriptions.
	* target-descriptions.c (tdesc_predefined_types): Add int128 and
	uint128.
	(tdesc_find_register_early): New function.
	(tdesc_numbered_register): Use it.
	(tdesc_register_size): New function.
	(tdesc_use_registers): Take a target_desc argument.  Do not use
	gdbarch_target_desc.
	* target-descriptions.h (tdesc_use_registers): Update prototype
	and comment.
	(tdesc_register_size): New prototype.
	* Makefile.in (powerpc_32_c, powerpc_403_c, powerpc_403gc_c)
	(powerpc_505_c, powerpc_601_c, powerpc_602_c, powerpc_603_c)
	(powerpc_604_c, powerpc_64_c, powerpc_7400_c, powerpc_750_c)
	(powerpc_860_c, powerpc_e500_c, rs6000_c): New macros.
	(rs6000-tdep.o): Update.
	* arm-tdep.c (arm_gdbarch_init): Update call to tdesc_use_registers.
	* m68k-tdep.c (m68k_gdbarch_init): Likewise.
	* mips-tdep.c (mips_gdbarch_init): Likewise.

	* gdb.texinfo (Predefined Target Types): Add int128
	and uint128.
	(Standard Target Features): Add PowerPC features.

	* gdb.xml/tdesc-regs.exp: Add PowerPC support.

	* sim-ppc.h (sim_spr_register_name): New prototype.

	* gdb-sim.c (regnum2spr): Rename to...
	(sim_spr_register_name): ... this.  Make global.
2007-10-15 19:45:31 +00:00
Daniel Jacobowitz baa0b44938 2007-10-11 Jesper Nilsson <jesper.nilsson@axis.com>
* callback.c (cb_is_stdin, cb_is_stdout, cb_is_stderr): Add functions.
	* syscall.c (cb_syscall): Test for stdin/out/err, not just fd 0/1/2.

2007-10-11  Jesper Nilsson  <jesper.nilsson@axis.com>

	* callback.h (cb_is_stdin, cb_is_stdout, cb_is_stderr): Add prototypes.

2007-10-11  Jesper Nilsson  <jesper.nilsson@axis.com>

	* sim/cris/c/freopen2.c: Added testcase.
2007-10-11 18:44:06 +00:00
Daniel Jacobowitz 0f07c3b30f 2007-10-11 Jesper Nilsson <jesper.nilsson@axis.com>
* callback.c (cb_is_stdin): Add.
	* syscall.c (cb_syscall): Test for stdin, not just fd 0.

2007-10-11  Jesper Nilsson  <jesper.nilsson@axis.com>

	* callback.h (cb_is_stdin): Add prototype.
2007-10-11 18:40:28 +00:00
Nick Clifton 5716854549 Various CR16 fixes 2007-10-01 15:55:40 +00:00
H.J. Lu 668b4a9519 bfd/
2007-09-17  H.J. Lu  <hongjiu.lu@intel.com>

	PR binutils/3281
	PR binutils/5037
	* elf-bfd.h (elf_obj_tdata): Remove relro.

	* elf.c (get_program_header_size): Check info->relro instead
	of elf_tdata (abfd)->relro.
	(_bfd_elf_map_sections_to_segments): Likewise.
	(assign_file_positions_for_load_sections): Don't set
	PT_GNU_RELRO segment alignment here.
	(assign_file_positions_for_non_load_sections): Properly set up
	PT_GNU_RELRO segment for copying executable/shared library.
	(rewrite_elf_program_header): Remove PT_GNU_RELRO segment.
	(copy_elf_program_header): Set p_size and p_size_valid fields for
	PT_GNU_RELRO segment.

include/elf/

2007-09-17  H.J. Lu  <hongjiu.lu@intel.com>

	PR binutils/3281
	PR binutils/5037
	* internal.h (elf_segment_map): Add p_size and p_size_valid.
	(ELF_IS_SECTION_IN_SEGMENT): Allow SHF_TLS sections in
	PT_GNU_RELRO segments.

ld/

2007-09-17  H.J. Lu  <hongjiu.lu@intel.com>

	PR binutils/3281
	PR binutils/5037
	* ldexp.h (ldexp_control): Add relro, relro_start_stat and
	relro_end_stat.

	* ldexp.c (fold_binary): Set expld.dataseg.relro to
	exp_dataseg_relro_start or exp_dataseg_relro_end when
	seeing DATA_SEGMENT_ALIGN or DATA_SEGMENT_RELRO_END,
	respectively.

	* ldlang.c (lang_size_sections_1): Properly set
	expld.dataseg.relro_start_stat and
	expld.dataseg.relro_end_stat.
	(find_relro_section_callback): New function.
	(lang_find_relro_sections_1): Likewise.
	(lang_find_relro_sections): Likewise.
	(lang_process): Call lang_find_relro_sections for
	non-relocatable link.

ld/testsuite/

2007-09-17  H.J. Lu  <hongjiu.lu@intel.com>

	PR binutils/3281
	PR binutils/5037
	* ld-elf/binutils.exp: Update "-z relro" tests to use relro1.s.
	Add "-z relro" tests with relro2.s.  Add "-z relro" tests with
	TLS for objcopy.

	* ld-elf/relro1.s: New file.
	* ld-elf/relro2.s: Likewise.
2007-09-18 00:25:07 +00:00
Kazu Hirata cfc7cd1274 bfd/
* archures.c: Add bfd_mach_mcf_isa_c_nodiv,
	bfd_mach_mcf_isa_c_nodiv_mac & bfd_mach_mcf_isa_c_nodiv_emac.
	* ieee.c (ieee_write_processor): Update coldfire architecture
	list.
	* bfd-in2.h: Rebuilt.
	* cpu-m68k.c (arch_info_struct): Add isa_c nodiv architectures.
	(m68k_arch_features): Likewise.
	* elf32-m68k.c (elf32_m68k_object_p): Add EF_M68K_CF_ISA_C_NODIV.
	(elf32_m68k_print_private_bfd_data): Likewise.

gas/
	* config/tc-m68k.c (m68k_ip): Add mcfisa_c case.
	(m68k_elf_final_processing): Add EF_M68K_CF_ISA_C_NODIV.

include/elf/
	* m68k.h (EF_M68K_CF_ISA_C_NODIV): New.
2007-09-11 16:07:50 +00:00
DJ Delorie b95701711b merge from gcc 2007-09-06 17:22:36 +00:00
DJ Delorie 95500c2eff merge from gcc 2007-08-31 20:20:44 +00:00
Alan Modra 80bed8e0a4 include/elf/
* common.h (NT_SPU): Define.
bfd/
	* elf.c (elfcore_grok_spu_note): New function.
	(elf_parse_notes): Call it.
binutils/
	* readelf.c (process_note): Recognize SPU core file notes.
2007-08-25 13:20:40 +00:00
Ben Elliston 4b8c903325 binutils/
* doc/binutils.texi (objdump): Document -Mppcps.

gas/
	* config/tc-ppc.c (parse_cpu): Handle "750cl".
	(pre_defined_registers): Add "gqr0" to "gqr7", "gqr.0" to "gqr.7".
	(md_show_usage): Document -m750cl.
	(md_assemble): Handle two delimiters in succession (eg. `),').
	* doc/c-ppc.texi (PowerPC-Opts): Document -m750cl.
	* testsuite/gas/ppc/ppc.exp: Run ppc70ps dump tests.
	* testsuite/gas/ppc/ppc750ps.s: New file.
	* testsuite/gas/ppc/ppc750ps.d: Likewise.

include/opcode/
	* ppc.h (PPC_OPCODE_PPCPS): New.

opcodes/
	* ppc-opc.c (PSW, PSWM, PSQ, PSQM, PSD, MTMSRD_L): New.
	(XOPS, XOPS_MASK, XW, XW_MASK): Likewise.
	(PPCPS): Likewise.
	(powerpc_opcodes): Add all pair singles instructions.
	* ppc-dis.c (powerpc_dialect): Handle "ppcps".
	(print_ppc_disassembler_options): Document -Mppcps.
2007-08-24 00:56:30 +00:00
Joel Brobecker fc32145a4c Switch the license of all .h files to GPLv3. 2007-08-23 18:17:33 +00:00
H.J. Lu 49813813a7 bfd/
2007-08-16  H.J. Lu  <hongjiu.lu@intel.com>

	* elf.c: Revert last change.

binutils/

2007-08-16  H.J. Lu  <hongjiu.lu@intel.com>

	* readelf.c: Revert last change.

include/elf/

2007-08-16  H.J. Lu  <hongjiu.lu@intel.com>

	* common.h: Revert last change.
2007-08-16 18:49:42 +00:00
H.J. Lu 0abbc9f1d0 bfd/
2007-08-16  H.J. Lu  <hongjiu.lu@intel.com>

	* elf.c (get_segment_type): Change PT_GNU_STACK to PT_GNU_ATTR.
	(bfd_section_from_phdr): Likewise.
	(get_program_header_size): Likewise. Add a PT_GNU_ATTR segment
	if there is an attribute section.
	(_bfd_elf_map_sections_to_segments): Likewise.
	(IS_SECTION_IN_INPUT_SEGMENT): Likewise.

binutils/

2007-08-16  H.J. Lu  <hongjiu.lu@intel.com>

	* readelf.c (get_segment_type): Change PT_GNU_STACK to
	PT_GNU_ATTR.

include/elf/

2007-08-16  H.J. Lu  <hongjiu.lu@intel.com>

	* common.h (PT_GNU_STACK): Renamed to ...
	(PT_GNU_ATTR): This.
	(PT_GNU_STACK): New.  Make an alias of PT_GNU_ATTR.
2007-08-16 13:38:09 +00:00
H.J. Lu 191814588a bfd/
2007-08-02  H.J. Lu  <hongjiu.lu@intel.com>

	* coffcode.h (ALIGN_SET): Removed.
	(ELIFALIGN_SET): Likewise.
	(coff_set_alignment_hook): Handle IMAGE_SCN_ALIGN_128BYTES,
	IMAGE_SCN_ALIGN_256BYTES, IMAGE_SCN_ALIGN_512BYTES,
	IMAGE_SCN_ALIGN_1024BYTES, IMAGE_SCN_ALIGN_2048BYTES,
	IMAGE_SCN_ALIGN_4096BYTES and IMAGE_SCN_ALIGN_8192BYTES.

include/coff/

2007-08-02  H.J. Lu  <hongjiu.lu@intel.com>

	* pe.h (IMAGE_SCN_ALIGN_POWER_BIT_POS): New.
	(IMAGE_SCN_ALIGN_POWER_BIT_MASK): Likewise.
	(IMAGE_SCN_ALIGN_POWER_NUM): Likewise.
	(IMAGE_SCN_ALIGN_POWER_CONST): Likewise.
	(IMAGE_SCN_ALIGN_128BYTES): Likewise.
	(IMAGE_SCN_ALIGN_256BYTES): Likewise.
	(IMAGE_SCN_ALIGN_512BYTES): Likewise.
	(IMAGE_SCN_ALIGN_1024BYTES): Likewise.
	(IMAGE_SCN_ALIGN_2048BYTES): Likewise.
	(IMAGE_SCN_ALIGN_4096BYTES): Likewise.
	(IMAGE_SCN_ALIGN_8192BYTES): Likewise.
	(IMAGE_SCN_ALIGN_1BYTES): Redefined with
	IMAGE_SCN_ALIGN_POWER_CONST.
	(IMAGE_SCN_ALIGN_2BYTES): Likewise.
	(IMAGE_SCN_ALIGN_4BYTES): Likewise.
	(IMAGE_SCN_ALIGN_8BYTES): Likewise.
	(IMAGE_SCN_ALIGN_16BYTES): Likewise.
	(IMAGE_SCN_ALIGN_32BYTES): Likewise.
	(IMAGE_SCN_ALIGN_64BYTES): Likewise.
2007-08-02 16:02:01 +00:00
H.J. Lu 13c9f5c677 Correct ChangeLog entries. 2007-08-01 15:27:55 +00:00
Ben Elliston 5965160bbd * ternary.h: Remove. 2007-07-25 06:34:29 +00:00
Bob Wilson be52c4c7c8 * xtensa-config.h (XCHAL_HAVE_THREADPTR): New.
(XCHAL_HAVE_RELEASE_SYNC, XCHAL_HAVE_S32C1I): New.
2007-07-18 18:52:30 +00:00
Nick Clifton 6d7b197b57 * COPYING3: New file. Contains version 3 of the GNU General Public License.
* COPYING3.LIB: New file.  Contains version 3 of the GNU Lesser General Public License.
2007-07-17 13:50:23 +00:00
DJ Delorie b71fb40215 merge from gcc 2007-07-13 18:23:23 +00:00
Hans-Peter Nilsson 254860bcfd * splay-tree.h (libi_uhostptr_t, libi_shostptr_t): Adjust types
work-a-round whitespace problem in gcc gengtype.
2007-07-12 13:30:24 +00:00
Nick Clifton 359d9a27ca Add support for building on a 64-bit Windows host. 2007-07-12 07:16:41 +00:00
Roland McGrath 0c1207099c . 2007-07-09 21:21:50 +00:00
Roland McGrath 83205b5188 2007-07-09 Roland McGrath <roland@redhat.com>
* bfdlink.h (struct bfd_link_info): Add member emit_note_gnu_build_id.
2007-07-09 21:21:42 +00:00
Roland McGrath 2dbc91dfc7 2007-07-09 Roland McGrath <roland@redhat.com>
* common.h (NT_GNU_HWCAP, NT_GNU_BUILD_ID): New macros.
2007-07-09 21:17:42 +00:00
Nick Clifton f5e9e255fd Update tp GPLv3 2007-07-06 11:13:56 +00:00
Nathan Sidwell ee5dec125d gas/testsuite/
* gas/m68k/mcf-coproc.d: New.
	* gas/m68k/mcf-coproc.s: New.
	* gas/m68k/all.exp: Add it.

	gas/
	* config/tc-m68k.c (m68k_ip): Add j & K operand types.
	(install_operand): Add E encoding.
	(md_begin): Check and skip initial '.' arg character.
	(get_num): Add 0..511 case.

	include/
	* opcode/m68k.h: Document j K & E.

	opcodes/
	* m68k-dis.c (fetch_arg): Add E.  Replace length switch with
	direct masking.
	(print_ins_arg): Add j & K operand types.
	(match_insn_m68k): Check and skip initial '.' arg character.
	(m68k_scan_mask): Likewise.
	* m68k-opc.c (m68k_opcodes): Add coprocessor instructions.
2007-07-03 07:54:19 +00:00
Joseph Myers a0f886b059 bfd:
* elf32-ppc.c (ppc_elf_merge_obj_attributes): New.
	(ppc_elf_merge_private_bfd_data): Call it.

binutils:
	* readelf.c (display_power_gnu_attribute, process_power_specific):
	New.
	(process_arch_specific): Call process_power_specific.

include/elf:
	* ppc.h (Tag_GNU_Power_ABI_FP): Define.

ld/testsuite:
	* ld-powerpc/attr-gnu-4-0.s, ld-powerpc/attr-gnu-4-00.d,
	ld-powerpc/attr-gnu-4-01.d, ld-powerpc/attr-gnu-4-02.d,
	ld-powerpc/attr-gnu-4-1.s, ld-powerpc/attr-gnu-4-10.d,
	ld-powerpc/attr-gnu-4-11.d, ld-powerpc/attr-gnu-4-12.d,
	ld-powerpc/attr-gnu-4-13.d, ld-powerpc/attr-gnu-4-2.s,
	ld-powerpc/attr-gnu-4-20.d, ld-powerpc/attr-gnu-4-21.d,
	ld-powerpc/attr-gnu-4-22.d, ld-powerpc/attr-gnu-4-3.s,
	ld-powerpc/attr-gnu-4-31.d: New.
	* ld-powerpc/powerpc.exp: Run these new tests.
2007-06-30 00:03:40 +00:00
Joseph Myers a66448fc8d bfd:
* elfxx-mips.c (mips_elf_merge_obj_attributes): New.
	(_bfd_mips_elf_merge_private_bfd_data): Call it.

binutils:
	* readelf.c (display_mips_gnu_attribute): New.
	(process_mips_specific): Call process_attributes.

include/elf:
	* mips.h (Tag_GNU_MIPS_ABI_FP): Define.

ld/testsuite:
	* ld-mips-elf/attr-gnu-4-0.s, ld-mips-elf/attr-gnu-4-00.d,
	ld-mips-elf/attr-gnu-4-01.d, ld-mips-elf/attr-gnu-4-02.d,
	ld-mips-elf/attr-gnu-4-03.d, ld-mips-elf/attr-gnu-4-1.s,
	ld-mips-elf/attr-gnu-4-10.d, ld-mips-elf/attr-gnu-4-11.d,
	ld-mips-elf/attr-gnu-4-12.d, ld-mips-elf/attr-gnu-4-13.d,
	ld-mips-elf/attr-gnu-4-14.d, ld-mips-elf/attr-gnu-4-2.s,
	ld-mips-elf/attr-gnu-4-20.d, ld-mips-elf/attr-gnu-4-21.d,
	ld-mips-elf/attr-gnu-4-22.d, ld-mips-elf/attr-gnu-4-23.d,
	ld-mips-elf/attr-gnu-4-3.s, ld-mips-elf/attr-gnu-4-30.d,
	ld-mips-elf/attr-gnu-4-31.d, ld-mips-elf/attr-gnu-4-32.d,
	ld-mips-elf/attr-gnu-4-33.d, ld-mips-elf/attr-gnu-4-4.s,
	ld-mips-elf/attr-gnu-4-41.d: New.
	* ld-mips-elf/mips-elf.exp: Run these new tests.
2007-06-29 16:41:32 +00:00
Joseph Myers c26222edd5 bfd:
* elf-attrs.c: New.
	* Makefile.am (BFD32_BACKENDS): Add elf-attrs.lo.
	(BFD32_BACKENDS_CFILES): Add elf-attrs.c.
	(elf-attrs.lo): Generate dependencies.
	* Makefile.in: Regenerate.
	* configure.in (elf): Add elf-attrs.lo.
	* configure: Regenerate.
	* elf-bfd.h (struct elf_backend_data): Add entries for object
	attributes.
	(NUM_KNOWN_OBJ_ATTRIBUTES, obj_attribute, obj_attribute_list,
	OBJ_ATTR_PROC, OBJ_ATTR_GNU, OBJ_ATTR_FIRST, OBJ_ATTR_LAST,
	Tag_NULL, Tag_File, Tag_Section, Tag_Symbol, Tag_compatibility):
	New.
	(struct elf_obj_tdata): Add entries for object attributes.
	(elf_known_obj_attributes, elf_other_obj_attributes,
	elf_known_obj_attributes_proc, elf_other_obj_attributes_proc):
	New.
	(bfd_elf_obj_attr_size, bfd_elf_set_obj_attr_contents,
	bfd_elf_get_obj_attr_int, bfd_elf_add_obj_attr_int,
	bfd_elf_add_proc_attr_int, bfd_elf_add_obj_attr_string,
	bfd_elf_add_proc_attr_string, bfd_elf_add_obj_attr_compat,
	bfd_elf_add_proc_attr_compat, _bfd_elf_attr_strdup,
	_bfd_elf_copy_obj_attributes, _bfd_elf_obj_attrs_arg_type,
	_bfd_elf_parse_attributes, _bfd_elf_merge_object_attributes): New.
	* elf.c (_bfd_elf_copy_private_bfd_data): Copy object attributes.
	(bfd_section_from_shdr): Handle attributes sections.
	* elflink.c (bfd_elf_final_link): Handle attributes sections.
	* elfxx-target.h (elf_backend_obj_attrs_vendor,
	elf_backend_obj_attrs_section, elf_backend_obj_attrs_arg_type,
	elf_backend_obj_attrs_section_type): New.
	(elfNN_bed): Update.
	* elf32-arm.c (NUM_KNOWN_ATTRIBUTES, aeabi_attribute,
	aeabi_attribute_list): Remove.
	(struct elf32_arm_obj_tdata): Remove object attributes fields.
	(check_use_blx, bfd_elf32_arm_set_vfp11_fix, using_thumb2,
	elf32_arm_copy_private_bfd_data, elf32_arm_merge_eabi_attributes):
	Update for new object attributes interfaces.
	(uleb128_size, is_default_attr, eabi_attr_size,
	elf32_arm_eabi_attr_size, write_uleb128, write_eabi_attribute,
	elf32_arm_set_eabi_attr_contents, elf32_arm_bfd_final_link,
	elf32_arm_new_eabi_attr, elf32_arm_get_eabi_attr_int,
	elf32_arm_add_eabi_attr_int, attr_strdup,
	elf32_arm_add_eabi_attr_string, elf32_arm_add_eabi_attr_compat,
	copy_eabi_attributes, elf32_arm_parse_attributes): Remove.  Moved
	to generic code in elf-attrs.c.
	(elf32_arm_obj_attrs_arg_type): New.
	(elf32_arm_fake_sections): Do not handle .ARM.attributes.
	(elf32_arm_section_from_shdr): Do not handle SHT_ARM_ATTRIBUTES.
	(bfd_elf32_bfd_final_link): Remove.
	(elf_backend_obj_attrs_vendor, elf_backend_obj_attrs_section,
	elf_backend_obj_attrs_arg_type,
	elf_backend_obj_attrs_section_type): New.
	* elf32-bfin.c (bfin_elf_copy_private_bfd_data): Copy object
	attributes.
	* elf32-frv.c (frv_elf_copy_private_bfd_data): Likewise.
	* elf32-iq2000.c (iq2000_elf_copy_private_bfd_data): Likewise.
	* elf32-mep.c (mep_elf_copy_private_bfd_data): Likewise.
	* elf32-mt.c (mt_elf_copy_private_bfd_data): Likewise.
	* elf32-sh.c (sh_elf_copy_private_data): Likewise.
	* elf64-sh64.c (sh_elf64_copy_private_data_internal): Likewise.

binutils:
	* readelf.c (display_gnu_attribute): New.
	(process_arm_specific): Rearrange as process_attributes.
	(process_arm_specific): Replace by wrapper of process_attributes.

gas:
	* as.c (create_obj_attrs_section): New.
	(main): Call create_obj_attrs_section for ELF.
	* read.c (s_gnu_attribute, skip_whitespace, skip_past_char,
	skip_past_comma, s_vendor_attribute): New.
	(potable): Add gnu_attribute for ELF.
	* read.h (s_vendor_attribute): Declare.
	* config/tc-arm.c (s_arm_eabi_attribute): Replace by wrapper
	round s_vendor_attribute.
	(aeabi_set_public_attributes): Update for new attributes
	interfaces.
	(arm_md_end): Remove attributes contents setting now done
	generically.

include/elf:
	* arm.h (elf32_arm_add_eabi_attr_int,
	elf32_arm_add_eabi_attr_string, elf32_arm_add_eabi_attr_compat,
	elf32_arm_get_eabi_attr_int, elf32_arm_set_eabi_attr_contents,
	elf32_arm_eabi_attr_size, Tag_NULL, Tag_File, Tag_Section,
	Tag_Symbol, Tag_compatibility): Remove.
	* common.h (SHT_GNU_ATTRIBUTES): Define.

ld:
	* emulparams/armelf.sh (OTHER_SECTIONS): Remove .ARM.attributes.
	(ATTRS_SECTIONS): Define.
	* scripttempl/elf.sc, scripttempl/elf32sh-symbian.sc,
	scripttempl/elf_chaos.sc, scripttempl/elfi370.sc,
	scripttempl/elfxtensa.sc: Handle ATTRS_SECTIONS.
2007-06-29 16:29:16 +00:00
Nick Clifton 8931495a14 New port: National Semiconductor's CR16 2007-06-29 14:09:34 +00:00
Bob Wilson 5218b0a765 bfd/
* elf32-xtensa.c (extend_ebb_bounds_forward): Use renamed
        XTENSA_PROP_NO_TRANSFORM flag instead of XTENSA_PROP_INSN_NO_TRANSFORM.
        (extend_ebb_bounds_backward, compute_text_actions): Likewise.
        (compute_ebb_proposed_actions, coalesce_shared_literal): Likewise.
        (xtensa_get_property_predef_flags): Likewise.
        (compute_removed_literals): Pass new arguments to is_removable_literal.
        (is_removable_literal): Add sec, prop_table and ptblsize arguments.
        Do not remove literal if the NO_TRANSFORM property flag is set.
gas/
        * config/tc-xtensa.c (XTENSA_PROP_INSN_NO_TRANSFORM): Renamed to...
        (XTENSA_PROP_NO_TRANSFORM): ...this.
        (frag_flags_struct): Move is_no_transform out of the insn sub-struct.
        (xtensa_mark_frags_for_org): New.
        (xtensa_handle_align): Set RELAX_ORG frag subtype for rs_org.
        (xtensa_post_relax_hook): Call xtensa_mark_frags_for_org.
        (get_frag_property_flags): Adjust reference to is_no_transform flag.
        (xtensa_frag_flags_combinable): Likewise.
        (frag_flags_to_number): Likewise.  Use XTENSA_PROP_NO_TRANSFORM.
        * config/tc-xtensa.h (xtensa_relax_statesE): Add RELAX_ORG.
include/elf/
        * xtensa.h (XTENSA_PROP_INSN_NO_TRANSFORM): Renamed to...
        (XTENSA_PROP_NO_TRANSFORM): ...this.
ld/
        * emultempl/xtensaelf.em (replace_insn_sec_with_prop_sec): Use renamed
        XTENSA_PROP_NO_TRANSFORM flag instead of XTENSA_PROP_INSN_NO_TRANSFORM.
2007-06-11 16:53:08 +00:00
Alan Modra fa7ccaf7e5 include/
* bfdlink.h (struct bfd_link_info): Add input_bfds_tail.
bfd/
	* simple.c (bfd_simple_get_relocated_section_content): Init
	input_bfds_tail.
ld/
	* ldlang.c (ldlang_add_file): Use input_bfds_tail.
	* ldmain.c (main): Init input_bfds_tail.  Sort link_info
	initialization.
2007-05-31 15:04:51 +00:00
Caroline Tice a1f7599670 Move entry for modification to dwarf2.h (for adding ability to report
when a variable's value is uninitialized) to the correct ChangeLog file.
2007-05-21 16:35:11 +00:00
Caroline Tice 7ce1923125 Add ability to report when a variable's value is uninitialized,
based on information provided by the compiler.  Also add new
DWARF OP, DW_OP_GNU_uninit, for this purpose.
2007-05-18 19:42:42 +00:00
Alan Modra 7b63e3a697 include/elf/
* spu.h (R_SPU_ADDR16X): Define.
	(R_SPU_PPU32, R_SPU_PPU64): Renumber.
bfd/
	* elf32-spu.c (elf_howto_table): Add howto for R_SPU_ADDR16X.
2007-05-12 06:45:32 +00:00
Alan Modra a7af95ad76 include/elf/
* spu.h (R_SPU_PPU32, R_SPU_PPU64): Define.
bfd/
	* reloc.c (BFD_RELOC_SPU_PPU32, BFD_RELOC_SPU_PPU64): Define.
	* elf-bfd.h (struct elf_backend_data): Change return type of
	elf_backend_relocate_section to int.
	* elf32-spu.c (elf_howto_table): Add howtos for R_SPU_PPU32 and
	R_SPU_PPU64.
	(spu_elf_bfd_to_reloc_type): Convert new relocs.
	(spu_elf_count_relocs): New function.
	(elf_backend_count_relocs): Define.
	(spu_elf_relocate_section): Arrange to emit R_SPU_PPU32 and
	R_SPU_PPU64 relocs.
	* elflink.c (elf_link_input_bfd): Emit relocs if relocate_section
	returns 2.
	* bfd-in2.h: Regenerate.
	* libbfd.h: Regenerate.
gas/
	* config/tc-spu.c (md_pseudo_table): Add int, long, quad.  Call
	spu_cons for word.
	(md_assemble): Tidy use of insn.flag.
	(get_imm): Likewise.  Handle uppercase input too.
	(spu_cons): New function.
	* config/tc-spu.h (tc_fix_adjustable): Don't adjust SPU_PPU relocs.
	(TC_FORCE_RELOCATION): Don't resolve them either.
binutils/
	* embedspu.sh (find_prog): Prefer prog in same dir as embedspu
	over one found on the users path.
	(main): Generate .reloc for each R_SPU_PPU* reloc.
2007-05-11 03:10:10 +00:00
DJ Delorie eb4b7204c2 merge from gcc 2007-05-08 01:29:28 +00:00
Alan Modra c7e9b095ac include/elf/
* internal.h (ELF_IS_SECTION_IN_SEGMENT): Check both file offset
	and vma for appropriate sections.
bfd/
	* elf.c (assign_file_positions_for_load_sections): Set sh_offset
	here.  Set sh_type to SHT_NOBITS if we won't be allocating
	file space.  Don't bump p_memsz for non-alloc sections.  Adjust
	section-in-segment check.
	(assign_file_positions_for_non_load_sections): Don't set sh_offset
	here for sections that have already been handled above.
2007-05-02 13:44:36 +00:00
Alan Modra 211f9f1fce gas/
PR 4448
	* config/tc-ppc.c (ppc_insert_operand): Don't increase min for
	PPC_OPERAND_PLUS1.
include/opcode/
	* ppc.h (PPC_OPERAND_PLUS1): Update comment.
2007-05-02 11:24:17 +00:00
Alan Modra bb57ddfeb7 bfd/
* elf32-spu.c (struct spu_link_hash_table): Add stack_analysis
	and emit_stack_syms bitfields.
	(get_sym_h): Read all symbols if stack analysis will be done.
	(spu_elf_create_sections): Add stack_analysis and emit_stack_syms
	params, and stash in hash table.
	(is_hint): Split off from..
	(is_branch): ..here.  Adjust callers.
	(spu_elf_size_stubs): Add stack_analysis param.  Arrange to read
	and keep all syms.
	(write_one_stub): Fix mem leak.
	(find_function_stack_adjust): New function.
	(sort_syms_syms, sort_syms_psecs): New vars.
	(sort_syms): New function.
	(struct call_info, struct function_info): New.
	(struct spu_elf_stack_info): New.
	(alloc_stack_info, maybe_insert_function, func_name): New functions.
	(is_nop, insns_at_end, check_function_ranges): Likewise.
	(find_function, insert_callee, mark_functions_via_relocs): Likewise.
	(pasted_function, interesting_section, discover_functions): Likewise.
	(mark_non_root, call_graph_traverse, build_call_tree): Likewise.
	(sum_stack, spu_elf_stack_analysis, spu_elf_final_link): Likewise.
	(bfd_elf32_bfd_final_link): Define.
	* elf32-spu.h (struct _spu_elf_section_data): Add stack_info field.
	(spu_elf_create_sections, spu_elf_size_stubs): Update prototypes.
include/
	* bfdlink.h (struct bfd_link_info): Add "info" and "minfo".
ld/
	* ldmain.c (link_callbacks): Init info and minfo fields.
	* ldmisc.c (minfo): Do nothing if no map file.
	* emultempl/spuelf.em (stack_analysis, emit_stack_syms): New vars.
	(spu_after_open): Adjust spu_elf_create_sections call.
	(spu_before_allocation): Likewise for spu_elf_size_stubs.
	(OPTION_SPU_STACK_ANALYSIS, OPTION_SPU_STACK_SYMS): Define.
	(PARSE_AND_LIST_LONGOPTS): Add new entries.
	(PARSE_AND_LIST_OPTIONS, PARSE_AND_LIST_ARGS_CASES): Likewise.
	* gen-doc.texi: Add @set for SPU and other missing targets.
	* ld.texinfo: Update man page selection to match gen-doc.texi.
	Document SPU features.
2007-04-30 14:06:40 +00:00
Alan Modra 2388178da8 Write Mimi's name in ASCII. 2007-04-27 03:37:43 +00:00
Jan Beulich 0e78d0f675 Revert the value change of DT_ENCODING from 2003-01-17. Luckily (and
surprisingly) the value isn't really being used anywhere, henc no other
changes are needed.

include/elf/
2007-04-26  Jan Beulich  <jbeulich@novell.com>

	* common.h (DT_ENCODING): Correct value (back to spec mandated
	value).
2007-04-26 06:59:55 +00:00
DJ Delorie 9c6c22286c merge from gcc 2007-04-26 03:13:46 +00:00
Nathan Sidwell 1974731bb6 gas/testsuite/
* gas/m68k/br-isaa.s: New.
	* gas/m68k/br-isaa.d: New.
	* gas/m68k/br-isab.s: New.
	* gas/m68k/br-isab.d: New.
	* gas/m68k/br-isac.s: New.
	* gas/m68k/br-isac.d: New.
	* gas/m68k/all.exp: Adjust.

	gas/
	* config/tc-m68k.c (mcf54455_ctrl): New.
	(HAVE_LONG_DISP, HAVE_LONG_CALL, HAVE_LONG_COND): New.
	(m68k_archs): Add isac.
	(m68k_cpus): Add 54455 family.
	(m68k_ip): Split Bg into Bb, Bs, Bg.
	(m68k_elf_final_processing): Add ISA_C.
	* doc/c-m68k.texi (M680x0 Options): Add isac.

	include/opcode/
	* m68k.h (mcfisa_c): New.
	(mcfusp, mcf_mask): Adjust.

	bfd/
	* archures.c (bfd_mach_mcf_isa_c, bfd_mach_mcf_isa_c_mac,
	bfd_mach_mcf_isa_c_emac): New.
	* elf32-m68k.c (ISAC_PLT_ENTRY_SIZE, elf_isac_plt0_entry,
	elf_isac_plt_entry, elf_isac_plt_info): New.
	(elf32_m68k_object_p): Add ISA_C.
	(elf32_m68k_print_private_bfd_data): Print ISA_C.
	(elf32_m68k_get_plt_info): Detect ISA_C.
	* cpu-m68k.c (arch_info): Add ISAC.
	(m68k_arch_features): Likewise,
	(bfd_m68k_compatible): ISAs B & C are not compatible.

	opcodes/
	* m68k-opc.c: Mark mcfisa_c instructions.
2007-04-23 07:51:30 +00:00
Alan Modra d8507ced8b include/opcode/
* ppc.h (struct powerpc_operand): Replace "bits" with "bitm".
	(num_powerpc_operands): Declare.
	(PPC_OPERAND_SIGNED et al): Redefine as hex.
	(PPC_OPERAND_PLUS1): Define.
opcodes/
	* ppc-dis.c (print_insn_powerpc): Adjust for struct powerpc_operand
	change.
	* ppc-opc.c (powerpc_operands): Replace bit count with bit mask
	in all entries.  Add PPC_OPERAND_SIGNED to DE entry.  Remove
	references to following deleted functions.
	(insert_bd, extract_bd, insert_dq, extract_dq): Delete.
	(insert_ds, extract_ds, insert_de, extract_de): Delete.
	(insert_des, extract_des, insert_li, extract_li): Delete.
	(insert_nb, insert_rsq, insert_rtq, insert_ev2, extract_ev2): Delete.
	(insert_ev4, extract_ev4, insert_ev8, extract_ev8): Delete.
	(num_powerpc_operands): New constant.
	(XSPRG_MASK): Remove entire SPRG field.
	(powerpc_opcodes <bcctre, bcctrel>): Use XLBB_MASK not XLYBB_MASK.
gas/
	* messages.c (as_internal_value_out_of_range): Extend to report
	errors for values with invalid low bits set.
	* config/tc-ppc.c (ppc_setup_opcodes): Check powerpc_operands bitm
	fields.  Check that operands and opcode fields are disjoint.
	(ppc_insert_operand): Check operands using mask rather than bit
	count.   Check low bits too.  Handle PPC_OPERAND_PLUS1.  Adjust
	insertion code.
	(md_apply_fix): Adjust for struct powerpc_operand change.
2007-04-20 12:25:12 +00:00
Richard Henderson 6302ce6d3c bfd/
* elf64-alpha.c (struct alpha_elf_link_hash_table): Add relax_trip.
        (elf64_alpha_size_got_sections): Remove unused something_changed local.
        (elf64_alpha_size_plt_section): Return void.
        (elf64_alpha_size_rela_got_section): Likewise.
        (elf64_alpha_relax_section): Only regenerate got+plt if the
        relax_trip counter has changed.
include/
        * bfdlink.h (struct bfd_link_info): Add relax_trip.
ld/
        * ldlang.c (relax_sections): Initialize and increment
        link_info.relax_trip.
2007-04-10 18:00:25 +00:00
DJ Delorie ee5005ab53 merge from gcc 2007-03-29 21:03:43 +00:00
H.J. Lu 832a897240 Fix year. 2007-03-27 22:45:19 +00:00
H.J. Lu 3ce0c60b4c gas/
2003-03-21  H.J. Lu  <hongjiu.lu@intel.com>

	* config/tc-i386.c: Replace REX_MODE64, REX_EXTX, REX_EXTY
	and REX_EXTZ with REX_W, REX_R, REX_X and REX_B respectively.

include/opcode/

2003-03-21  H.J. Lu  <hongjiu.lu@intel.com>

	* i386.h (REX_MODE64): Renamed to ...
	(REX_W): This.
	(REX_EXTX): Renamed to ...
	(REX_R): This.
	(REX_EXTY): Renamed to ...
	(REX_X): This.
	(REX_EXTZ): Renamed to ...
	(REX_B): This.

opcodes/

2003-03-21  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-dis.c (REX_MODE64): Remove definition.
	(REX_EXTX): Likewise.
	(REX_EXTY): Likewise.
	(REX_EXTZ): Likewise.
	(USED_REX): Use REX_OPCODE instead of 0x40.
	Replace REX_MODE64, REX_EXTX, REX_EXTY and REX_EXTZ with REX_W,
	REX_R, REX_X and REX_B respectively.
2007-03-21 21:23:43 +00:00
H.J. Lu edfd2a6e7a *** empty log message *** 2007-03-19 23:06:06 +00:00
H.J. Lu e96d068ed3 gas/
2007-03-15  H.J. Lu  <hongjiu.lu@intel.com>

	* Makefile.am: Run "make dep-am".
	* Makefile.in: Regenerated.

	* config/tc-i386.c: Include "opcodes/i386-opc.h" instead of
	"opcode/i386.h".
	(md_begin): Check reg_name != NULL for the last entry in
	i386_regtab.

	* config/tc-i386.h: Move many entries to opcode/i386.h and
	opcodes/i386-opc.h.

	* configure.in (need_opcodes): Set true for i386.
	* configure: Regenerated.

include/opcode/

2007-03-15  H.J. Lu  <hongjiu.lu@intel.com>

	* i386.h: Add entries from config/tc-i386.h and move tables
	to opcodes/i386-opc.h.

opcodes/

2007-03-15  H.J. Lu  <hongjiu.lu@intel.com>

	* Makefile.am (CFILES): Add i386-opc.c.
	(ALL_MACHINES): Add i386-opc.lo.
	Run "make dep-am".
	* Makefile.in: Regenerated.

	* configure.in: Add i386-opc.lo for bfd_i386_arch.
	* configure: Regenerated.

	* i386-dis.c: Include "opcode/i386.h".
	(MAXLEN): Renamed to MAX_MNEM_SIZE. Remove definition.
	(FWAIT_OPCODE): Remove definition.
	(UNIXWARE_COMPAT): Renamed to SYSV386_COMPAT. Remove definition.
	(MAX_OPERANDS): Remove definition.

	* i386-opc.c: New file.
	* i386-opc.h: Likewise.
2007-03-15 14:31:24 +00:00
H.J. Lu d7e13a06c2 2007-03-13 H.J. Lu <hongjiu.lu@intel.com>
* i386.h (FloatDR): Removed.
	(i386_optab): Use FloatD and FloatD|FloatR instead of FloatDR.
2007-03-14 03:26:06 +00:00
Alan Modra 062bfdacdb include/elf/
* v850.h (V850_OTHER_TDA_BYTE): Delete.
	(V850_OTHER_SDA, V850_OTHER_ZDA, V850_OTHER_TDA): Assign bits
	that don't clash with visibility bits.
bfd/
	* elf32-v850.c (v850_elf_link_output_symbol_hook): Clean out
	V850_OTHER_* bits.
2007-03-08 11:28:35 +00:00
Alan Modra 2a2128cad1 * common.h (ELF_ST_VISIBILITY): Comment typo fix. 2007-03-07 10:18:56 +00:00
DJ Delorie 97e7286372 merge from gcc 2007-03-06 19:00:57 +00:00
Martin Schwidefsky 4e747c10dc 2007-03-06 Andreas Krebbel <krebbel1@de.ibm.com>
* opcodes/s390-opc.c (INSTR_RRE_FR, INSTR_RRF_F0FF2, INSTR_RRF_F0FR,
	INSTR_RRF_UUFF, INSTR_RRF_0UFF, INSTR_RRF_FFFU,	INSTR_RRR_F0FF): New
	instruction formats added.
	(MASK_RRE_FR, MASK_RRF_F0FF2, MASK_RRF_F0FR, MASK_RRF_UUFF,
	MASK_RRF_0UFF, MASK_RRF_FFFU, MASK_RRR_F0FF): New instruction format
	masks added.
	* opcodes/s390-opc.txt (lpdfr - tgxt): Decimal floating point
	instructions added.
	* opcodes/s390-mkopc.c (s390_opcode_cpu_val): S390_OPCODE_Z9_EC added.
	(main): z9-ec cpu type option added.
	* include/opcode/s390.h (s390_opcode_cpu_val): S390_OPCODE_Z9_EC added.

2007-03-06  Andreas Krebbel  <krebbel1@de.ibm.com>

	* config/tc-s390.c (md_parse_option): z9-ec option added.

2007-03-06  Andreas Krebbel  <krebbel1@de.ibm.com>

	* gas/s390/zarch-z9-ec.d: New file.
	* gas/s390/zarch-z9-ec.s: New file.
	* gas/s390/s390.exp: Run the z9-ec testcases.
2007-03-06 13:19:07 +00:00
Alan Modra a49625d566 * spu-insns.h: Add soma double-float insns. 2007-03-01 11:17:41 +00:00
Nick Clifton ba4dd41480 Take into account MEMORY regions when creating a segment map. 2007-02-21 16:43:50 +00:00
Thiemo Seufer fe32d85c52 [ gas/ChangeLog ]
* config/tc-mips.c (mips_set_options, mips_opts, file_ase_dspr2,
	ISA_SUPPORTS_DSPR2_ASE, MIPS_CPU_ASE_DSPR2): Add DSP R2 ASE support.
	(macro_build): Add case '2'.
	(macro): Expand M_BALIGN to nop, packrl.ph or balign.
	(validate_mips_insn): Add support for balign instruction.
	(mips_ip): Handle DSP R2 instructions. Support balign instruction.
	(OPTION_DSPR2, OPTION_NO_DSPR2, OPTION_COMPAT_ARCH_BASE,
	md_parse_option, mips_after_parse_args): Add -mdspr2 and -mno-dspr2
	command line options.
	(s_mipsset): Add support for .set dspr2 and .set nodspr2 directives.
	(md_show_usage): Add -mdspr2 and -mno-dspr2 help output.
	* doc/c-mips.texi, doc/as.texinfo: Document -mdspr2, -mno-dspr2,
	.set dspr2, .set nodspr2.

	[ gas/testsuite/ChangeLog ]
	* gas/mips/mips32-dspr2.s, gas/mips/mips32-dspr2.d: New test for
	DSP R2.
	* gas/mips/mips.exp: Run new test.

	[ include/opcode/Changelog ]
	* mips.h (OP_SH_BP, OP_MASK_BP): Add support for balign instruction.
	(INSN_DSPR2): Add flag for DSP R2 instructions.
	(M_BALIGN): New macro.

	[ opcodes/ChangeLog ]
	* mips-dis.c (mips_arch_choices): Add DSP R2 support.
	(print_insn_args): Add support for balign instruction.
	* mips-opc.c (D33): New shortcut for DSP R2 instructions.
	(mips_builtin_opcodes): Add DSP R2 instructions.

	[ sim/mips/ChangeLog ]
	* Makefile.in (IGEN_INCLUDE): Add dsp2.igen.
	* configure.ac (mips*-sde-elf*, mipsisa32r2*-*-*, mipsisa64r2*-*-*):
	Add dsp2 to sim_igen_machine.
	* configure: Regenerate.
	* dsp.igen (do_ph_op): Add MUL support when op = 2.
	(do_ph_mulq): New function to support mulq_rs.ph and mulq_s.ph.
	(mulq_rs.ph): Use do_ph_mulq.
	(MFHI, MFLO, MTHI, MTLO): Move these instructions to mips.igen.
	* mips.igen: Add dsp2 model and include dsp2.igen.
	(MFHI, MFLO, MTHI, MTLO): Extend these instructions for
	for *mips32r2, *mips64r2, *dsp.
	(MADD, MADDU, MSUB, MSUBU, MULT, MULTU): Extend these instructions
	for *mips32r2, *mips64r2, *dsp2.
	* dsp2.igen: New file for MIPS DSP REV 2 ASE.

	[ sim/testsuite/sim/mips/ChangeLog ]
	* basic.exp: Run the dsp2 test.
	* utils-dsp.inc (dspckacc_astio, dspck_tsimm): New macro.
	* mips32-dsp2.s: New test.
2007-02-20 13:28:54 +00:00
Joseph Myers ee7d4af092 top level:
2007-02-17  Mark Mitchell  <mark@codesourcery.com>
            Nathan Sidwell  <nathan@codesourcery.com>
            Vladimir Prus  <vladimir@codesourcery.com
            Joseph Myers  <joseph@codesourcery.com>

	* configure.ac (TOPLEVEL_CONFIGURE_ARGUMENTS): Fix quoting.
	* configure: Regenerate.

bfd:
2007-02-17  Mark Mitchell  <mark@codesourcery.com>
            Nathan Sidwell  <nathan@codesourcery.com>
            Vladimir Prus  <vladimir@codesourcery.com
            Joseph Myers  <joseph@codesourcery.com>

	* configure.in (--with-pkgversion): New option.
	* configure: Regenerate.
	* Makefile.am (bfdver.h): Substitute for @bfd_version_package@.
	* Makefile.in: Regenerate.
	* version.h (BFD_VERSION_STRING): Define using
	@bfd_version_package@.

bfd/doc:
2007-02-17  Mark Mitchell  <mark@codesourcery.com>
            Nathan Sidwell  <nathan@codesourcery.com>
            Vladimir Prus  <vladimir@codesourcery.com
            Joseph Myers  <joseph@codesourcery.com>

	* Makefile.in: Regenerate.

binutils:
2007-02-17  Mark Mitchell  <mark@codesourcery.com>
            Nathan Sidwell  <nathan@codesourcery.com>
            Vladimir Prus  <vladimir@codesourcery.com
            Joseph Myers  <joseph@codesourcery.com>

	* configure.in (--with-bugurl): New option.
	* configure: Regenerate.
	* Makefile.am (REPORT_BUGS_TO): Define.
	(INCLUDES): Define REPORT_BUGS_TO.
	Regenerate dependencies.
	* Makefile.in: Regenerate.
	* doc/Makefile.in: Regenerate.
	* bucomm.h: Remove include of bin-bugs.h.
	* addr2line.c (usage): Don't print empty REPORT_BUGS_TO.
	* ar.c (usage): Pass s to list_supported_targets.  Don't print
	empty REPORT_BUGS_TO.
	* coffdump.c (show_usage): Don't print empty REPORT_BUGS_TO.
	* cxxfilt.c (usage): Print bug url when giving help.
	* dlltool.c (usage): Likewise.
	* dllwrap.c (usage): Likewise.
	* nlmconv.c (show_usage): Don't print empty REPORT_BUGS_TO.
	* nm.c (usage): Likewise.
	* objcopy.c (copy_usage, strip_usage): Likewise.
	* objdump.c (usage): Likewise.
	* readelf.c ((usage): Likewise. Add STREAM argument.  Adjust
	callers.
	* size.c (usage): Don't print empty REPORT_BUGS_TO.
	* srconv.c (show_usage): Likewise.
	* strings.c (usage): Likewise.
	* sysdymp.c (show_usage): Likewise.
	* windres.c (usage): Likewise.

gas:
2007-02-17  Mark Mitchell  <mark@codesourcery.com>
            Nathan Sidwell  <nathan@codesourcery.com>
            Vladimir Prus  <vladimir@codesourcery.com
            Joseph Myers  <joseph@codesourcery.com>

	* configure.in (--with-bugurl): New option.
	* configure: Regenerate.
	* dep-in.sed: Remove bin-bugs.h.
	* Makefile.am (REPORT_BUGS_TO): Define.
	(INCLUDES): Define REPORT_BUGS_TO.
	(DEP_INCLUDES): Likewise.
	($(OBJS)): No longer depend on bin-bugs.h.
	* Makefile.in: Regenerate.
	* doc/Makefile.in: Regenerate.
	* as.c (show_usage): Don't print empty REPORT_BUGS_TO.
	* as.h: Remove include of bin-bugs.h.

gprof:
2007-02-17  Mark Mitchell  <mark@codesourcery.com>
            Nathan Sidwell  <nathan@codesourcery.com>
            Vladimir Prus  <vladimir@codesourcery.com
            Joseph Myers  <joseph@codesourcery.com>

	* configure.in (--with-pkgversion, --with-bugurl): New options.
	* configure: Regenerate.
	* Makefile.am (PKGVERSION, REPORT_BUGS_TO): Define.
	(INCLUDES): Define PKGVERSION and REPORT_BUGS_TO.
	Regenerate dependencies.
	* Makefile.in: Regenerate.
	* gprof.c (usage): Don't print empty REPORT_BUGS_TO.
	(main): Include PKGVERSION in version output.
	* gprof.h: Remove include of bin-bugs.h.

include:
2007-02-17  Mark Mitchell  <mark@codesourcery.com>
            Nathan Sidwell  <nathan@codesourcery.com>
            Vladimir Prus  <vladimir@codesourcery.com
            Joseph Myers  <joseph@codesourcery.com>

	* bin-bugs.h: Remove.

ld:
2007-02-17  Mark Mitchell  <mark@codesourcery.com>
            Nathan Sidwell  <nathan@codesourcery.com>
            Vladimir Prus  <vladimir@codesourcery.com
            Joseph Myers  <joseph@codesourcery.com>

	* configure.in (--with-bugurl): New option.
	* configure: Regenerate.
	* Makefile.am (REPORT_BUGS_TO): Define.
	(INCLUDES): Define REPORT_BUGS_TO.
	Regenerate dependencies.
	* Makefile.in: Regenerate.
	* ld.h: Remove include of bin-bugs.h.
	* lexsup.c (help): Don't print empty REPORT_BUGS_TO.
2007-02-17 13:33:57 +00:00
Alan Modra 77da924b40 gas/
* config/tc-i386.h (Seg2ShortForm, Seg3ShortForm): Delete.
	* config/tc-i386.c: Wrap overly long lines, whitespace fixes.
	(process_operands): Move old Seg2ShortForm and Seg3ShortForm
	code, and test for these insns using a combination of
	opcode_modifier and operand_types.
include/opcode/
	* i386.h (i386_optab): Replace all occurrences of Seg2ShortForm
	and Seg3ShortFrom with Shortform.
2007-02-13 23:23:53 +00:00
H.J. Lu 79010c3b34 gas/testsuite/
2007-02-11  H.J. Lu  <hongjiu.lu@intel.com>

	PR gas/4027
	* gas/i386/opcode.s: Add more tests for "test".
	* i386/opcode-intel.d: Updated.
	* gas/i386/opcode-suffix.d: Likewise.
	* gas/i386/opcode.d: Likewise.

include/opcode/

2007-02-11  H.J. Lu  <hongjiu.lu@intel.com>

	PR gas/4027
	* i386.h (i386_optab): Put the real "test" before the pseudo
	one.
2007-02-12 04:51:40 +00:00
DJ Delorie db7d66ec44 merge from gcc 2007-02-09 17:21:45 +00:00
Dave Brolley 265f9c57b5 Fix entries for MeP submission. 2007-02-06 18:57:08 +00:00
Nick Clifton 90ed5afa46 Fix comment attached to #endif 2007-02-06 14:50:58 +00:00
Dave Brolley 634a6e378b 2007-02-05 Dave Brolley <brolley@redhat.com>
* Contribute the following changes:
        2001-03-26  Ben Elliston  <bje@redhat.com>

        * dis-asm.h (print_insn_mep): Declare.
2007-02-05 19:17:10 +00:00
Dave Brolley 31b04296d3 2007-02-05 Dave Brolley <brolley@redhat.com>
* Contribute the following Changes:
        2005-08-22  Dave Brolley  <brolley@redhat.com>

        * mep.h (EF_MEP_CPU_C4): New macro.
        (EF_MEP_CPU_H1): Change to 0x10000000.

        2005-04-22  Richard Sandiford  <rsandifo@redhat.com>

        * mep.h (EF_MEP_LIBRARY): New flag.
        (EF_MEP_ALL_FLAGS): Update accordingly.

        2004-06-21  Dave Brolley  <brolley@redhat.com>

        * mep.h (EF_MEP_CPU_MASK, EF_MEP_CPU_MEP, EF_MEP_CPU_C2)
        (EF_MEP_CPU_C3, EF_MEP_CPU_H1, EF_MEP_INDEX_MASK)
        (EF_MEP_ALL_FLAGS): New macros.

        2001-09-28  Richard Henderson  <rth@redhat.com>

        * mep.h (SHF_MEP_VLIW, SEC_MEP_VLIW): New.

        2001-07-12  DJ Delorie  <dj@redhat.com>

        * mep.h (R_MEP_GNU_VTINHERIT, R_MEP_GNU_VTENTRY): Mark as no-overflow.

        2001-06-25  DJ Delorie  <dj@redhat.com>

        * mep.h: Add vtable relocs.

        2001-05-10  DJ Delorie  <dj@redhat.com>

        * mep.h: Fix bit offsets for HI16*, make them no-overflow.  Add
        comment about mep-relocs.pl.

        2001-05-01  DJ Delorie  <dj@redhat.com>

        * mep.h: Add MeP-specific relocs.

        2001-03-22  Ben Elliston  <bje@redhat.com>

        * mep.h: New file.

        2001-03-20  Ben Elliston  <bje@redhat.com>

        * common.h (EM_CYGNUS_MEP): Define.
2007-02-05 19:15:43 +00:00
Dave Brolley 22abf6e4c6 2007-02-05 Dave Brolley <brolley@redhat.com>
* Contribute the following Changes:
        2005-08-22  Dave Brolley  <brolley@redhat.com>

        * mep.h (EF_MEP_CPU_C4): New macro.
        (EF_MEP_CPU_H1): Change to 0x10000000.

        2005-04-22  Richard Sandiford  <rsandifo@redhat.com>

        * mep.h (EF_MEP_LIBRARY): New flag.
        (EF_MEP_ALL_FLAGS): Update accordingly.

        2004-06-21  Dave Brolley  <brolley@redhat.com>

        * mep.h (EF_MEP_CPU_MASK, EF_MEP_CPU_MEP, EF_MEP_CPU_C2)
        (EF_MEP_CPU_C3, EF_MEP_CPU_H1, EF_MEP_INDEX_MASK)
        (EF_MEP_ALL_FLAGS): New macros.

        2001-09-28  Richard Henderson  <rth@redhat.com>

        * mep.h (SHF_MEP_VLIW, SEC_MEP_VLIW): New.

        2001-07-12  DJ Delorie  <dj@redhat.com>

        * mep.h (R_MEP_GNU_VTINHERIT, R_MEP_GNU_VTENTRY): Mark as no-overflow.

        2001-06-25  DJ Delorie  <dj@redhat.com>

        * mep.h: Add vtable relocs.

        2001-05-10  DJ Delorie  <dj@redhat.com>

        * mep.h: Fix bit offsets for HI16*, make them no-overflow.  Add
        comment about mep-relocs.pl.

        2001-05-01  DJ Delorie  <dj@redhat.com>

        * mep.h: Add MeP-specific relocs.

        2001-03-22  Ben Elliston  <bje@redhat.com>

        * mep.h: New file.

        2001-03-20  Ben Elliston  <bje@redhat.com>

        * common.h (EM_CYGNUS_MEP): Define.

2007-02-15  Dave Brolley  <brolley@redhat.com>

        From Graydon Hoare  <graydon@redhat.com>:
        * common.h (STT_RELC, STT_SRELC, R_RELC): New macros.
2007-02-05 19:15:07 +00:00
H.J. Lu f5b9595fd7 Fix typos in year. 2007-02-02 22:15:52 +00:00
H.J. Lu 48313de63a binutils/
2076-02-02  H.J. Lu  <hongjiu.lu@intel.com>

	* doc/binutils.texi (objdump): Document the new addr64 option
	for i386 disassembler.

include/

2076-02-02  H.J. Lu  <hongjiu.lu@intel.com>

	* dis-asm.h (print_i386_disassembler_options): New.

opcodes/

2076-02-02  H.J. Lu  <hongjiu.lu@intel.com>

	* disassemble.c (disassembler_usage): Call
	print_i386_disassembler_options for i386 disassembler.

	* i386-dis.c (print_i386_disassembler_options): New.
	(print_insn): Support the new addr64 option.
2007-02-02 15:27:04 +00:00
Vladimir Prus 8c8e5f6dcc include/
* libiberty.h (PEX_STDERR_TO_PIPE): New define.
        (PEX_BINARY_ERROR): New define.
        (pex_read_err): New function.

        libiberty/
        * pex-common.h (struct pex_obj): New fields
        stderr_pipe and read_err.
        * pex-common.c (pex_init_common): Initialize
        stderr_pipe.
        (pex_run_in_environment): Add error checking
        for PEX_STDERR_TO_PIPE.  Create a pipe
        for stderr if necessary.
        (pex_read_err): New.
        (pex_free): Close read_err.
        * pexecute.txh: Document changes.
        * functions.texi: Regenerated.
2007-01-31 18:49:40 +00:00
DJ Delorie ff2a198b68 merge from gcc 2007-01-30 23:16:53 +00:00
H.J. Lu c4c8d06b1a bfd/
2007-01-16  H.J. Lu  <hongjiu.lu@intel.com>

	PR ld/3831
	* elf-bfd.h (bfd_elf_link_mark_dynamic_symbol): Add an
	argument, Elf_Internal_Sym *.

	* elflink.c (bfd_elf_link_mark_dynamic_symbol): Mark a data
	symbol dynamic if info->dynamic_data is TRUE.
	(bfd_elf_record_link_assignment): Updated call to
	bfd_elf_record_link_assignment.
	(_bfd_elf_merge_symbol): Likewise.  Always call
	bfd_elf_link_mark_dynamic_symbol.

include/

2007-01-16  H.J. Lu  <hongjiu.lu@intel.com>

	PR ld/3831
	* bfdlink.h (bfd_link_info): Rename dynamic to dynamic_list.
	Add dynamic and dynamic_data.

ld/

2007-01-16  H.J. Lu  <hongjiu.lu@intel.com>

	PR ld/3831
	* NEWS: Mention -Bsymbolic-functions, --dynamic-list-data and
	--dynamic-list-cpp-new.

	* ld.texinfo: Document -Bsymbolic-functions, --dynamic-list-data
	and --dynamic-list-cpp-new.

	* ldlang.c (lang_append_dynamic_list_cpp_new): New.
	(lang_process): Change link_info.dynamic to
	link_info.dynamic_list.
	(lang_append_dynamic_list): Likewise.
	* ldmain.c (main): Likewise.  Initialize link_info.dynamic and
	link_info.dynamic_data to FALSE.

	* ldlang.h (lang_append_dynamic_list_cpp_new): New.

	* lexsup.c (option_values): Add OPTION_DYNAMIC_LIST_DATA and
	OPTION_DYNAMIC_LIST_CPP_NEW.
	(ld_options): Add entries for -Bsymbolic-functions,
	--dynamic-list-data and --dynamic-list-cpp-new.  Make
	-Bsymbolic-functions an alias of --dynamic-list-data.
	(parse_args): Change link_info.dynamic to link_info.dynamic_list.
	Set link_info.dynamic to TRUE for --dynamic-list and
	--dynamic-list-cpp-typeinfo.  Handle --dynamic-list-data and
	--dynamic-list-cpp-new.

ld/testsuite/

2007-01-16  H.J. Lu  <hongjiu.lu@intel.com>

	PR ld/3831
	* ld-elf/del.cc: New.
	* ld-elf/dl5.cc: Likewise.
	* ld-elf/dl5.out: Likewise.
	* ld-elf/new.cc: Likewise.

	* ld-elf/shared.exp: Add tests for --dynamic-list-data and
	 --dynamic-list-cpp-new.
2007-01-16 14:56:31 +00:00
Daniel Jacobowitz c8b4fe26ea Add changelog entries for copyright updates. 2007-01-10 04:33:06 +00:00
Daniel Jacobowitz 091fe9bf7d Copyright updates for 2007. 2007-01-09 17:59:15 +00:00
Kazu Hirata 2a327eef52 bfd/
* archures.c (bfd_mach_cpu32_fido): Rename to bfd_mach_fido.
	* bfd-in2.h: Regenerate.
	* cpu-m68k.c (arch_info_struct): Use bfd_mach_fido instead of
	bfd_mach_cpu32_fido.
	(m68k_arch_features): Use fido_a instead of cpu32.
	(bfd_m68k_compatible): Reject the combination of Fido and
	ColdFire.  Accept the combination of CPU32 and Fido with a
	warning.
	* elf32-m68k.c (elf32_m68k_object_p,
	elf32_m68k_merge_private_bfd_data,
	elf32_m68k_print_private_bfd_data): Treat Fido as an
	architecture by itself.

binutils/
	* readelf.c (get_machine_flags): Treat Fido as an architecture
	by itself.

gas/
	* config/tc-m68k.c (m68k_archs, m68k_cpus): Treat Fido as an
	architecture by itself.
	(m68k_ip): Don't issue a warning for tbl instructions on fido.
	(m68k_elf_final_processing): Treat Fido as an architecture by
	itself.

include/elf/
	* m68k.h (EF_M68K_FIDO): New.
	(EF_M68K_ARCH_MASK): OR EF_M68K_FIDO.
	(EF_M68K_CPU32_FIDO_A, EF_M68K_CPU32_MASK): Remove.

include/opcode/
	* m68k.h (m68010up): OR fido_a.

opcodes/
	* m68k-opc.c (m68k_opcodes): Replace cpu32 with
	cpu32 | fido_a except on tbl instructions.
2007-01-08 18:42:37 +00:00
Kazu Hirata c5a95a529e bfd/
* archures.c (bfd_mach_cpu32_fido): New.
	(bfd_mach_mcf_isa_a_nodiv, bfd_mach_mcf_isa_a,
	bfd_mach_mcf_isa_a_mac, bfd_mach_mcf_isa_a_emac,
	bfd_mach_mcf_isa_aplus, bfd_mach_mcf_isa_aplus_mac,
	bfd_mach_mcf_isa_aplus_emac, bfd_mach_mcf_isa_b_nousp,
	bfd_mach_mcf_isa_b_nousp_mac, bfd_mach_mcf_isa_b_nousp_emac,
	bfd_mach_mcf_isa_b, bfd_mach_mcf_isa_b_mac,
	bfd_mach_mcf_isa_b_emac, bfd_mach_mcf_isa_b_float,
	bfd_mach_mcf_isa_b_float_mac, bfd_mach_mcf_isa_b_float_emac):
	Increment the defined values.
	* bfd-in2.h: Regenerate.
	* cpu-m68k.c (arch_info_struct): Add en entry for
	bfd_mach_cpu32_fido.
	* elf32-m68k.c (elf32_m68k_object_p): Handle
	EF_M68K_CPU32_FIDO_A.
	(elf32_m68k_merge_private_bfd_data): Use EF_M68K_CPU32_MASK.
	(elf32_m68k_print_private_bfd_data): Handle
	EF_M68K_CPU32_FIDO_A.

binutils/
	* readelf.c (get_machine_flags): Handle EF_M68K_CPU32_FIDO_A.

gas/
	* config/tc-m68k.c (cpu_of_arch): Add fido.
	(m68k_archs, m68k_cpu): Add entries for fido.
	(m68k_elf_final_processing): Handle EF_M68K_CPU32_FIDO_A.

include/elf/
	* m68k.h (EF_M68K_CPU32_FIDO_A, EF_M68K_CPU32_MASK): New.

include/opcode/
	* m68k.h (fido_a): New.
2006-12-25 22:39:21 +00:00
Kazu Hirata b0ee53e9bc * m68k.h (mcfmac, mcfemac, cfloat, mcfhwdiv, mcfisa_a,
mcfisa_aa, mcfisa_b, mcfusp, mcf_mask): Double the defined
	values.
2006-12-24 02:58:37 +00:00
Kazu Hirata a8ea5eede5 bfd/
* elf32-m68k.c (elf32_m68k_object_p,
	elf32_m68k_print_private_bfd_data): Use EF_M68K_ARCH_MASK to
	extract architecture mask.

include/elf/
	* m68k.h (EF_M68K_ARCH_MASK): New.
2006-12-19 13:24:56 +00:00
Nathan Sidwell 94f3d96815 bfd/
* elf.c (assign_file_positions_for_load_sections): Adjust p_vaddr
	by p_vaddr_offset.  Copy alignment & use if it is valid.
	(rewrite_elf_program_headers): Cope with leading padding in a
	segment that does not contain file or program headers.
	(copy_elf_program_header): Likewise.

	include/elf/
	* internal.h (struct elf_segment_map): Add p_vaddr_offset field.
2006-12-19 08:49:38 +00:00
Kazu Hirata 07ec6541ab bfd/
* elf32-m68k.c: Update uses of EF_M68K_*.

binutils/
	* readelf.c: Update uses of EF_M68K_*.

gas/
	* config/tc-m68k.c: Update uses of EF_M68K_*.

include/elf
	* m68k.h (EF_M68K_ISA_MASK, EF_M68K_ISA_A_NODIV,
	EF_M68K_ISA_A, EF_M68K_ISA_A_PLUS, EF_M68K_ISA_B_NOUSP,
	EF_M68K_ISA_B, EF_M68K_ISA_C, EF_M68K_MAC_MASK, EF_M68K_MAC,
	EF_M68K_EMAC, EF_M68K_EMAC_B, EF_M68K_FLOAT): Rename to
	EF_M68K_CF_ISA_MASK, EF_M68K_CF_ISA_A_NODIV, EF_M68K_CF_ISA_A,
	EF_M68K_CF_ISA_A_PLUS, EF_M68K_CF_ISA_B_NOUSP,
	EF_M68K_CF_ISA_B, EF_M68K_CF_ISA_C, EF_M68K_CF_MAC_MASK,
	EF_M68K_CF_MAC, EF_M68K_CF_EMAC, EF_M68K_CF_EMAC_B,
	EF_M68K_CF_FLOAT, respectively.
2006-12-07 15:39:02 +00:00
DJ Delorie ad1fcc4a3c merge from gcc 2006-12-06 19:28:41 +00:00
Nick Clifton 017b276a76 Define ATTRIBUTE_PACKED and use as necessary. 2006-12-06 14:36:41 +00:00
Joern Rennecke 76c4048648 include:
2006-05-03  Andrew Stubbs  <andrew.stubbs@st.com>
            J"orn Rennecke <joern.rennecke@st.com>

	PR driver/29931
	* libiberty.h (make_relative_prefix_ignore_links): Declare.

libiberty:
2006-05-03  Andrew Stubbs  <andrew.stubbs@st.com>
            J"orn Rennecke <joern.rennecke@st.com>

	PR driver/29931
	* make-relative-prefix.c (make_relative_prefix_1): New function,
	broken out of make_relative_prefix.  Make link resolution dependent
	on new parameter.
	(make_relative_prefix): Use make_relative_prefix_1.
	(make_relative_prefix_ignore_links): New function.
2006-11-30 17:36:10 +00:00
H.J. Lu 2525dd2eab Remove entries checked in by accident. 2006-11-27 22:05:26 +00:00
Bob Wilson ec716feebe bfd/
* elf32-xtensa.c (elf_xtensa_special_sections): Add .xtensa.info.
gas/
	* config/tc-xtensa.c (XSHAL_ABI): Add default definition.
	(directive_state): Disable scheduling by default.
	(xtensa_add_config_info): New.
	(xtensa_end): Call xtensa_add_config_info.
gas/testsuite/
	* gas/elf/section2.e-xtensa: New file.
	* gas/elf/elf.exp: Use it.
include/
	* xtensa-config.h (XSHAL_ABI): New.
	(XTHAL_ABI_WINDOWED, XTHAL_ABI_CALL0): New.
ld/
	* emultempl/xtensaelf.em (XSHAL_ABI): Add default definition.
	(replace_insn_sec_with_prop_sec): Use bfd_make_section_with_flags.
	Delete redundant code to set sections flags and alignment.
	(xt_config_info_unpack_and_check, check_xtensa_info): New.
	(elf_xtensa_after_open): Iterate over input statements instead of
	link_info.input_bfds.
	(elf_xtensa_before_allocation): Likewise.  Call check_xtensa_info for
	each input, and write a new .xtensa.info section in the output.
2006-11-27 20:14:52 +00:00
Bob Wilson 3377e74b3b * xtensa-isa.h (STATIC_LIBISA): Delete. 2006-11-27 19:23:21 +00:00
Nick Clifton 51146d27f2 * peXXigen.c: Updates for PE/COFF V8.0, and clarification
(dir_names): Added CLR Runtime Header to dir_names[].
  (_bfd_XX_print_private_bfd_data_common): Added EFI_ROM and XBOX subsystem names
  (_bfd_XXi_swap_aouthdr_in, _bfd_XXi_swap_aouthdr_out)
  (pe_print_idata, pe_print_edata)
  (_bfd_XX_bfd_copy_private_bfd_data_common)
  (_bfd_XXi_final_link_postscript): Use #DEFINEs for index into DataDirectory.
* pe.h: Added defines for IMAGE_SUBSYSTEM_EFI_ROM and IMAGE_SUBSYSTEM_XBOX.
* internal.h: Added defines for PE directory entry types.
  NB: in internal.h because IMAGE_NUMBEROF_DIRECTORY_ENTRYIES is in pe.h
2006-11-14 19:03:32 +00:00
H.J. Lu baf35b5d76 gas/
2006-11-08  H.J. Lu  <hongjiu.lu@intel.com>

	* config/tc-i386.h (CpuPNI): Removed.
	(CpuUnknownFlags): Replace CpuPNI with CpuSSE3.
	* config/tc-i386.c (md_assemble): Likewise.

include/opcode/

2006-11-08  H.J. Lu  <hongjiu.lu@intel.com>

	* i386.h (i386_optab): Replace CpuPNI with CpuSSE3.
2006-11-08 19:56:02 +00:00
Paul Brook d6e4308937 2006-10-30 Paul Brook <paul@codesourcery.com>
binutils/
	* objdump.c (disassemble_section): Set info->symtab_pos.
	(disassemble_data): Set info->symtab and info->symtab_size.

	include/
	* dis-asm.h (disassemble_info): Add symtab, symtab_pos and
	symtab_size.

	opcodes/
	* arm-dis.c (last_is_thumb, last_mapping_sym, last_mapping_addr): New.
	(get_sym_code_type): New function.
	(print_insn): Search for mapping symbols.
2006-10-31 20:21:56 +00:00
Nick Clifton a6c48c3850 * tc-score.c (data_op2): Check invalid operands.
(my_get_expression): Const operand of some instructions can not be symbol in assembly.
  (get_insn_class_from_type): Handle instruction type Insn_internal.
  (do_macro_ldst_label): Modify inst.type.
  (Insn_PIC): Delete.
* score-inst.h (enum score_insn_type): Add Insn_internal.
* tc-score.c (data_op2): The immediate value in lw is 15 bit signed.
* score-dis.c (print_insn): Correct the error code to print correct PCE instruction disassembly.
2006-10-31 09:54:41 +00:00
H.J. Lu 44afc8c45e bfd/
2006-10-30  H.J. Lu  <hongjiu.lu@intel.com>

	PR ld/3111
	* elf-bfd.h (elf_obj_tdata): Add symbuf.
	(_bfd_elf_section_already_linked): Add struct bfd_link_info *.
	(_bfd_elf_check_kept_section): Likewise.
	(bfd_elf_match_symbols_in_sections): Likewise.

	* elf.c (assign_section_numbers): Updated to add
	struct bfd_link_info *.
	(bfd_elf_match_symbols_in_sections): Updated. Cache symbol
	buffer if info->reduce_memory_overheads is false.

	* elflink.c (match_group_member): Updated to add
	struct bfd_link_info *.
	(_bfd_elf_check_kept_section): Likewise.
	(elf_link_input_bfd): Likewise.
	(_bfd_elf_section_already_linked): Likewise.
	(bfd_elf_final_link): Free symbol buffer if
	info->reduce_memory_overheads is false.

	* libbfd-in.h (_bfd_nolink_section_already_linked): Add
	struct bfd_link_info *.
	(_bfd_generic_section_already_linked): Likewise.
	* libbfd.h: Regenerated.

	* linker.c (bfd_section_already_linked): Add
	struct bfd_link_info *.
	(_bfd_generic_section_already_linked): Likewise.
	* targets.c (bfd_target): Add struct bfd_link_info * to
	_section_already_linked.
	* bfd-in2.h: Regenerated.

include/

2006-10-30  H.J. Lu  <hongjiu.lu@intel.com>

	PR ld/3111
	* bfdlink.h (bfd_link_info): Add reduce_memory_overheads.

ld/

2006-10-30  H.J. Lu  <hongjiu.lu@intel.com>

	PR ld/3111
	* ld.h (args_type): Remove reduce_memory_overheads.

	* ldlang.c (lang_map): Updated.
	(section_already_linked): Likewise.
	(print_input_section): Likewise.
	* ldmain.c (main): Likewise.
	* lexsup.c (parse_args): Likewise.
2006-10-30 23:25:51 +00:00
Richard Sandiford 8602f76e79 include/elf/
* mips.h (R_MIPS_GLOB_DAT): Define
	(R_MIPS_max): Bump by 1.

bfd/
	* elf32-mips.c (elf_mips_howto_table_rel): Add R_MIPS_GLOB_DAT.
	* elfn32-mips.c (elf_mips_howto_table_rel): Likewise.
	(elf_mips_howto_table_rela): Likewise.
	* elf64-mips.c (mips_elf64_howto_table_rel): Likewise.
	(mips_elf64_howto_table_rela): Likewise.
2006-10-28 10:13:49 +00:00
Alan Modra ddb2c9e81c New Cell SPU port. 2006-10-25 06:49:18 +00:00
Alan Modra e359f110ba Add powerpc cell support. 2006-10-24 01:27:28 +00:00
Michael Meissner 7e39651a54 Fix AMDFAM10 POPCNT instruction 2006-10-23 22:53:28 +00:00
Nick Clifton 09a35955fb Fix score bugs 2006-10-19 15:47:34 +00:00
Mark Shinwell c4e12ec359 bfd/
* elf32-arm.c (elf32_arm_howto_table_1): Change offset for
	R_THM_CALL to 25 and remove FIXME comment.
	(using_thumb2): New function.
	(elf32_arm_final_link_relocate): Cope with Thumb-2 BL encoding.

	include/
	* elf/arm.h: Define TAG_CPU_ARCH_* constants.

	ld/testsuite/
	* ld-arm/arm-elf.exp: Add thumb1-bl, thumb2-bl,
	thumb2-bl-as-thumb1-bad and thumb2-bl-bad tests.
	* ld-arm/thumb1-bl.d: New.
	* ld-arm/thumb1-bl.s: New.
	* ld-arm/thumb2-bl-as-thumb1-bad.d: New.
	* ld-arm/thumb2-bl-as-thumb1-bad.s: New.
	* ld-arm/thumb2-bl-bad.d: New.
	* ld-arm/thumb2-bl-bad.s: New.
	* ld-arm/thumb2-bl.d: New.
	* ld-arm/thumb2-bl.s: New.
2006-10-17 15:46:21 +00:00
H.J. Lu 5c9dda86e5 gas/
2006-09-28  H.J. Lu  <hongjiu.lu@intel.com>

	* config/tc-i386.h (CpuMNI): Renamed to ...
	(CpuSSSE3): This.
	(CpuUnknownFlags): Updated.
	(processor_type): Replace PROCESSOR_YONAH with PROCESSOR_CORE
	and PROCESSOR_MEROM with PROCESSOR_CORE2.
	* config/tc-i386.c: Updated.
	* doc/c-i386.texi: Likewise.

	* config/tc-i386.c (cpu_arch): Add ".ssse3", "core" and "core2".

include/opcode/

2006-09-28  H.J. Lu  <hongjiu.lu@intel.com>

	* i386.h: Replace CpuMNI with CpuSSSE3.
2006-09-28 14:06:36 +00:00
Joseph Myers 1aeca89244 bfd/
2006-09-26  Mark Shinwell  <shinwell@codesourcery.com>
            Joseph Myers  <joseph@codesourcery.com>
            Ian Lance Taylor  <ian@wasabisystems.com>
            Ben Elliston  <bje@wasabisystems.com>

	* archures.c: Add definition for bfd_mach_arm_iWMMXt2.
	* cpu-arm.c (processors): Add bfd_mach_arm_iWMMXt2.
	(arch_info_struct, bfd_arm_update_notes): Likewise.
	(architectures): Likewise.
	(bfd_arm_merge_machines): Check for iWMMXt2.
	* bfd-in2.h: Rebuild.

gas/
2006-09-26  Mark Shinwell  <shinwell@codesourcery.com>
            Joseph Myers  <joseph@codesourcery.com>
            Ian Lance Taylor  <ian@wasabisystems.com>
            Ben Elliston  <bje@wasabisystems.com>

	* config/tc-arm.c (arm_cext_iwmmxt2): New.
	(enum operand_parse_code): New code OP_RIWR_I32z.
	(parse_operands): Handle OP_RIWR_I32z.
	(do_iwmmxt_wmerge): New function.
	(do_iwmmxt_wldstd): Handle iwmmxt2 case where second operand is
	a register.
	(do_iwmmxt_wrwrwr_or_imm5): New function.
	(insns): Mark instructions as RIWR_I32z as appropriate.
	Also add torvsc<b,h,w>, wabs<b,h,w>, wabsdiff<b,h,w>,
	waddbhus<l,m>, waddhc, waddwc, waddsubhx, wavg4{r}, wmaddu{x,n},
	wmadds{x,n}, wmerge, wmiaxy{n}, wmiawxy{n}, wmul<sm,um>{r},
	wmulw<um,sm,l>{r}, wqmiaxy{n}, wqmulm{r}, wqmulwm{r}, wsubaddhx.
	(md_begin): Handle IWMMXT2.
	(arm_cpus): Add iwmmxt2.
	(arm_extensions): Likewise.
	(arm_archs): Likewise.

gas/testsuite/
2006-09-26  Mark Shinwell  <shinwell@codesourcery.com>
            Joseph Myers  <joseph@codesourcery.com>
            Ian Lance Taylor  <ian@wasabisystems.com>
            Ben Elliston  <bje@wasabisystems.com>

	* gas/arm/iwmmxt2.s: New file.
	* gas/arm/iwmmxt2.d: New file.

include/opcode/
2006-09-26  Mark Shinwell  <shinwell@codesourcery.com>
            Joseph Myers  <joseph@codesourcery.com>
            Ian Lance Taylor  <ian@wasabisystems.com>
            Ben Elliston  <bje@wasabisystems.com>

	* arm.h (ARM_CEXT_IWMMXT2, ARM_ARCH_IWMMXT2): Define.

opcodes/
2006-09-26  Mark Shinwell  <shinwell@codesourcery.com>
            Joseph Myers  <joseph@codesourcery.com>
            Ian Lance Taylor  <ian@wasabisystems.com>
            Ben Elliston  <bje@wasabisystems.com>

	* arm-dis.c (coprocessor_opcodes): The X-qualifier to WMADD may
	only be used with the default multiply-add operation, so if N is
	set, don't bother printing X.  Add new iwmmxt instructions.
	(IWMMXT_INSN_COUNT): Update.
	(iwmmxt_wwssnames): Qualify "wwss" names at index 2, 6, 10 and 14
	with a 'c' suffix.
	(print_insn_coprocessor): Check for iWMMXt2.  Handle format
	specifiers 'r', 'i'.
2006-09-26 12:04:45 +00:00
Nick Clifton b0c0973d9a Add x86_64-mingw64 target 2006-09-20 11:35:11 +00:00
Nick Clifton 7aa8dc8eb0 Add support for Score target. 2006-09-16 23:51:50 +00:00
H.J. Lu 33d9aaee5b bfd/
2006-09-07  H.J. Lu  <hongjiu.lu@intel.com>

	* elf-bfd.h (elf_link_hash_entry): Add a dynamic field.
	(bfd_elf_link_mark_dynamic_symbol): New.
	(SYMBOLIC_BIND): New.

	* elf32-i386.c (elf_i386_check_relocs): Replace info->symbolic
	with SYMBOLIC_BIND (info, h).
	(elf_i386_relocate_section): Likewise.
	* elf64-x86-64.c (elf64_x86_64_check_relocs): Likewise.
	(elf64_x86_64_relocate_section): Likewise.
	* elfxx-ia64.c (elfNN_ia64_check_relocs): Likewise.

	* elflink.c (bfd_elf_link_mark_dynamic_symbol): New.
	(bfd_elf_record_link_assignment): Call
	bfd_elf_link_mark_dynamic_symbol on new entry.
	(_bfd_elf_merge_symbol): Likewise.
	(_bfd_elf_export_symbol): Return if the symbol isn't exported.
	(_bfd_elf_fix_symbol_flags): Replace info->symbolic with
	SYMBOLIC_BIND (info, h).
	(_bfd_elf_dynamic_symbol_p): Likewise.
	(_bfd_elf_symbol_refs_local_p): Likewise.
	(bfd_elf_size_dynamic_sections): Updated.

include/

2006-09-07  H.J. Lu  <hongjiu.lu@intel.com>

	* bfdlink.h (bfd_elf_dynamic_list): New.
	(bfd_link_info): Add a dynamic field.

ld/

2006-09-07  H.J. Lu  <hongjiu.lu@intel.com>

	* Makefile.am (CXX): Set to g++.
	(CXX_FOR_TARGET): Likewise.
	* Makefile.in: Regenerated.

	* NEWS: Mention --dynamic-list.

	* ld.texinfo: Document --dynamic-list.

	* ldgram.y: Support dynamic list.

	* ldlang.c (lang_process): Call lang_finalize_version_expr_head
	on link_info.dynamic if needed.
	(lang_append_dynamic_list): New.
	(lang_append_dynamic_list_cpp_typeinfo): New.
	* ldlang.h (lang_append_dynamic_list): Likewise.
	* ldlang.h (lang_append_dynamic_list_cpp_typeinfo): Likewise.

	* ldlex.h (input_enum): Add input_dynamic_list.
	* ldlex.l: Handle it.

	* ldmain.c (main): Initialize link_info.dynamic.

	* lexsup.c (option_values): Add OPTION_DYNAMIC_LIST and
	OPTION_DYNAMIC_LIST_CPP_TYPEINFO.
	(ld_options): Add entries for OPTION_DYNAMIC_LIST and
	OPTION_DYNAMIC_LIST_CPP_TYPEINFO.
	(parse_args): Handle OPTION_DYNAMIC_LIST and
	OPTION_DYNAMIC_LIST_CPP_TYPEINFO.

ld/testsuite/

2006-09-07  H.J. Lu  <hongjiu.lu@intel.com>

	* ld-elf/dl1.c: New file.
	* ld-elf/dl1.list: Likewise.
	* ld-elf/dl1.out: Likewise.
	* ld-elf/dl1main.c: Likewise.
	* ld-elf/dl2.c: Likewise.
	* ld-elf/dl2.list: Likewise.
	* ld-elf/dl2a.out: Likewise.
	* ld-elf/dl2b.out: Likewise.
	* ld-elf/dl2main.c: Likewise.
	* ld-elf/dl2xxx.c: Likewise.
	* ld-elf/dl2xxx.list: Likewise.
	* ld-elf/dl3.cc: Likewise.
	* ld-elf/dl3.list: Likewise.
	* ld-elf/dl3a.out: Likewise.
	* ld-elf/dl3b.out: Likewise.
	* ld-elf/dl3header.h: Likewise.
	* ld-elf/dl3main.cc: Likewise.

	* ld-elf/shared.exp: Updated.

	* lib/ld-lib.exp (run_ld_link_exec_tests): Take an optional
	argument for source language. Use CC/CXX for link, depending
	on source language.
	(run_cc_link_tests): Likewise.
2006-09-07 17:16:31 +00:00
Nick Clifton 76ddec15ab * ldmain.c (main): Initialise print_gc_sections field of link_info structure.
* lexsup.c: Add --print-gc-sections and --no-print-gc-sections switches.
* ld.texinfo: Document new switches.
* NEWS: Mention new switches.
* bfdlink.h (struct bfd_link_info): New field: print_gc_sections.
* elflink.c (elf_gc_sweep): If info.print_gc_sections is true, list removed sections to stderr.
2006-08-04 14:53:25 +00:00
H.J. Lu 62f94a893e 2006-07-14 H.J. Lu <hongjiu.lu@intel.com>
* i386.h (i386_optab): Remove InvMem from maskmovq, movhlps,
	movlhps, movmskps, pextrw, pmovmskb, movmskpd, maskmovdqu,
	movdq2q and movq2dq.
2006-07-14 16:15:27 +00:00
Michael Meissner 2d73611e56 Add amdfam10 instructions 2006-07-13 22:25:48 +00:00
Jakub Jelinek a9ad8f8ca5 include/
* bfdlink.h (struct bfd_link_info): Add emit_hash and
	emit_gnu_hash bitfields.
include/elf/
	* common.h (SHT_GNU_HASH, DT_GNU_HASH): Define.
ld/
	* scripttempl/elf.sc: Add .gnu.hash section.
	* emultempl/elf32.em (OPTION_HASH_STYLE): Define.
	(gld${EMULATION_NAME}_add_options): Register --hash-style option.
	(gld${EMULATION_NAME}_handle_option): Handle it.
	(gld${EMULATION_NAME}_list_options): Document it.
	* ldmain.c (main): Initialize emit_hash and emit_gnu_hash.
	* ld.texinfo: Document --hash-style option.
bfd/
	* elf.c (_bfd_elf_print_private_bfd_data): Handle DT_GNU_HASH.
	(bfd_section_from_shdr, elf_fake_sections, assign_section_numbers):
	Handle SHT_GNU_HASH.
	(special_sections_g): Include .gnu.hash section.
	(bfd_elf_gnu_hash): New function.
	* elf-bfd.h (bfd_elf_gnu_hash, _bfd_elf_hash_symbol): New prototypes.
	(struct elf_backend_data): Add elf_hash_symbol method.
	* elflink.c (_bfd_elf_link_create_dynamic_sections): Create .hash
	only if info->emit_hash, create .gnu.hash section if
	info->emit_gnu_hash.
	(struct collect_gnu_hash_codes): New type.
	(elf_collect_gnu_hash_codes, elf_renumber_gnu_hash_syms,
	_bfd_elf_hash_symbol): New functions.
	(compute_bucket_count): Don't compute HASHCODES array, instead add
	that and NSYMS as arguments.  Use bed->s->sizeof_hash_entry
	instead of bed->s->arch_size / 8.  Fix .hash size estimation.
	When not optimizing, use the number of hashed symbols rather than
	dynsymcount.
	(bfd_elf_size_dynamic_sections): Only add DT_HASH if info->emit_hash,
	and ADD DT_GNU_HASH if info->emit_gnu_hash.
	(bfd_elf_size_dynsym_hash_dynstr): Size .hash only if info->emit_hash,
	adjust compute_bucket_count caller.  Create and populate .gnu.hash
	section if info->emit_gnu_hash.
	(elf_link_output_extsym): Only populate .hash section if
	finfo->hash_sec != NULL.
	(bfd_elf_final_link): Adjust assertion.  Handle DT_GNU_HASH.
	* elfxx-target.h (elf_backend_hash_symbol): Define if not yet defined.
	(elfNN_bed): Add elf_backend_hash_symbol.
	* elf64-x86-64.c (elf64_x86_64_hash_symbol): New function.
	(elf_backend_hash_symbol): Define.
	* elf32-i386.c (elf_i386_hash_symbol): New function.
	(elf_backend_hash_symbol): Define.
binutils/
	* readelf.c (get_dynamic_type): Handle DT_GNU_HASH.
	(get_section_type_name): Handle SHT_GNU_HASH.
	(dynamic_info_DT_GNU_HASH): New variable.
	(process_dynamic_section): Handle DT_GNU_HASH.
	(process_symbol_table): Print also DT_GNU_HASH histogram.
ld/testsuite/
	* ld-powerpc/tlsso32.r: Adjust.
	* ld-powerpc/tlsso32.d: Adjust.
	* ld-powerpc/tlsso32.g: Adjust.
	* ld-powerpc/tlsso.r: Adjust.
	* ld-powerpc/tlsso.g: Adjust.
	* ld-powerpc/tlstocso.g: Adjust.
2006-07-10 21:40:24 +00:00
Mark Shinwell dac1814fbe * include/elf/arm.h: Correct names of R_ARM_LDC_G{0,1,2}
to R_ARM_LDC_SB_G{0,1,2} respectively.

bfd/
	* bfd-in2.h: Regenerate.
	* elf32-arm.c (R_ARM_ALU_PC_G0_NC, R_ARM_ALU_PC_G0,
	R_ARM_ALU_PC_G1_NC, R_ARM_ALU_PC_G1, R_ARM_ALU_PC_G2,
	R_ARM_LDR_PC_G1, R_ARM_LDR_PC_G2, R_ARM_LDRS_PC_G0,
	R_ARM_LDRS_PC_G1, R_ARM_LDRS_PC_G2, R_ARM_LDC_PC_G0,
	R_ARM_LDC_PC_G1, R_ARM_LDC_PC_G2, R_ARM_ALU_SB_G0_NC,
	R_ARM_ALU_SB_G0, R_ARM_ALU_SB_G1_NC, R_ARM_ALU_SB_G1,
	R_ARM_ALU_SB_G2, R_ARM_LDR_SB_G0, R_ARM_LDR_SB_G1,
	R_ARM_LDR_SB_G2, R_ARM_LDRS_SB_G0, R_ARM_LDRS_SB_G1,
	R_ARM_LDRS_SB_G2, R_ARM_LDC_SB_G0, R_ARM_LDC_SB_G1,
	R_ARM_LDC_SB_G2): New relocation types.
	(R_ARM_PC13): Rename to AAELF name R_ARM_LDR_PC_G0 and
	adjust HOWTO entry to be consistent with R_ARM_LDR_PC_G1
	and friends.
	(elf32_arm_howto_table_3): Delete; contents merged into
	elf32_arm_howto_table_2.
	(elf32_arm_howto_from_type): Adjust correspondingly.
	(elf32_arm_reloc_map): Extend with the above relocations.
	(calculate_group_reloc_mask): New function.
	(identify_add_or_sub): New function.
	(elf32_arm_final_link_relocate): Support for the above
	relocations.
	* reloc.c: Add enumeration entries for BFD_RELOC_ARM_...
	codes to correspond to the above relocations.

gas/
	* config/tc-arm.c (enum parse_operand_result): New.
	(struct group_reloc_table_entry): New.
	(enum group_reloc_type): New.
	(group_reloc_table): New array.
	(find_group_reloc_table_entry): New function.
	(parse_shifter_operand_group_reloc): New function.
	(parse_address_main): New function, incorporating code
	from the old parse_address function.  To be used via...
	(parse_address): wrapper for parse_address_main; and
	(parse_address_group_reloc): new function, likewise.
	(enum operand_parse_code): New codes OP_SHG, OP_ADDRGLDR,
	OP_ADDRGLDRS, OP_ADDRGLDC.
	(parse_operands): Support for these new operand codes.
	New macro po_misc_or_fail_no_backtrack.
	(encode_arm_cp_address): Preserve group relocations.
	(insns): Modify to use the above operand codes where group
	relocations are permitted.
	(md_apply_fix): Handle the group relocations
	ALU_PC_G0_NC through LDC_SB_G2.
	(tc_gen_reloc): Likewise.
	(arm_force_relocation): Leave group relocations for the linker.
	(arm_fix_adjustable): Likewise.

gas/testsuite/
	* gas/arm/group-reloc-alu.d: New test.
	* gas/arm/group-reloc-alu-encoding-bad.d: New test.
	* gas/arm/group-reloc-alu-encoding-bad.l: New test.
	* gas/arm/group-reloc-alu-encoding-bad.s: New test.
	* gas/arm/group-reloc-alu-parsing-bad.d: New test.
	* gas/arm/group-reloc-alu-parsing-bad.l: New test.
	* gas/arm/group-reloc-alu-parsing-bad.s: New test.
	* gas/arm/group-reloc-alu.s: New test.
	* gas/arm/group-reloc-ldc.d: New test.
	* gas/arm/group-reloc-ldc-encoding-bad.d: New test.
	* gas/arm/group-reloc-ldc-encoding-bad.l: New test.
	* gas/arm/group-reloc-ldc-encoding-bad.s: New test.
	* gas/arm/group-reloc-ldc-parsing-bad.d: New test.
	* gas/arm/group-reloc-ldc-parsing-bad.l: New test.
	* gas/arm/group-reloc-ldc-parsing-bad.s: New test.
	* gas/arm/group-reloc-ldc.s: New test.
	* gas/arm/group-reloc-ldr.d: New test.
	* gas/arm/group-reloc-ldr-encoding-bad.d: New test.
	* gas/arm/group-reloc-ldr-encoding-bad.l: New test.
	* gas/arm/group-reloc-ldr-encoding-bad.s: New test.
	* gas/arm/group-reloc-ldr-parsing-bad.d: New test.
	* gas/arm/group-reloc-ldr-parsing-bad.l: New test.
	* gas/arm/group-reloc-ldr-parsing-bad.s: New test.
	* gas/arm/group-reloc-ldr.s: New test.
	* gas/arm/group-reloc-ldrs.d: New test.
	* gas/arm/group-reloc-ldrs-encoding-bad.d: New test.
	* gas/arm/group-reloc-ldrs-encoding-bad.l: New test.
	* gas/arm/group-reloc-ldrs-encoding-bad.s: New test.
	* gas/arm/group-reloc-ldrs-parsing-bad.d: New test.
	* gas/arm/group-reloc-ldrs-parsing-bad.l: New test.
	* gas/arm/group-reloc-ldrs-parsing-bad.s: New test.
	* gas/arm/group-reloc-ldrs.s: New test.

ld/testsuite/
	* ld-arm/group-relocs-alu-bad.d: New test.
	* ld-arm/group-relocs-alu-bad.s: New test.
	* ld-arm/group-relocs.d: New test.
	* ld-arm/group-relocs-ldc-bad.d: New test.
	* ld-arm/group-relocs-ldc-bad.s: New test.
	* ld-arm/group-relocs-ldr-bad.d: New test.
	* ld-arm/group-relocs-ldr-bad.s: New test.
	* ld-arm/group-relocs-ldrs-bad.d: New test.
	* ld-arm/group-relocs-ldrs-bad.s: New test.
	* ld-arm/group-relocs.s: New test.
	* ld-arm/arm-elf.exp: Wire in new tests.
2006-06-15 11:03:01 +00:00
H.J. Lu acfd62fdfa gas/testsuite/
2006-06-12  H.J. Lu  <hongjiu.lu@intel.com>

	* gas/i386/i386.exp: Run nops and x86-64-nops.

	* gas/i386/nops.d: New file.
	* gas/i386/nops.s: Likewise.
	* gas/i386/x86-64-nops.d: Likewise.
	* gas/i386/x86-64-nops.s: Likewise.

include/opcode/

2006-06-12  H.J. Lu  <hongjiu.lu@intel.com>

	* i386.h (i386_optab): Add "nop" with memory reference.

opcodes/

2006-06-12  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-dis.c (dis386_twobyte): Use "nopQ" for 0x1f.
	(twobyte_has_modrm): Set 1 for 0x1f.
2006-06-12 18:59:36 +00:00
H.J. Lu 2d853d0e39 gas/
2006-06-12  H.J. Lu  <hongjiu.lu@intel.com>

	* config/tc-i386.c (process_suffix): Don't add rex64 for
	"xchg %rax,%rax".

gas/testsuite/

2006-06-12  H.J. Lu  <hongjiu.lu@intel.com>

	* gas/i386/opcode.s: Add "xchg %ax,%ax".
	* gas/i386/opcode.d: Updated.

	* gas/i386/x86-64-opcode.s: Add xchg %ax,%ax, xchg %eax,%eax,
	xchg %rax,%rax, rex64 xchg %rax,%rax and xchg %rax,%r8.
	* gas/i386/x86-64-opcode.d: Updated.

include/opcode/

2006-06-12  H.J. Lu  <hongjiu.lu@intel.com>

	* i386.h (i386_optab): Update comment for 64bit NOP.

opcodes/

2006-06-12  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-dis.c (NOP_Fixup): Removed.
	(NOP_Fixup1): New.
	(NOP_Fixup2): Likewise.
	(dis386): Use NOP_Fixup1 and NOP_Fixup2 on 0x90.
2006-06-12 18:55:42 +00:00
Alan Modra 48df10c776 include/opcode/
* ppc.h (PPC_OPCODE_POWER6): Define.
	Adjust whitespace.
gas/
	* config/tc-ppc.c (parse_cpu): Handle "-mpower6".
	(md_show_usage): Document it.
	(ppc_setup_opcodes): Test power6 opcode flag bits.
	* doc/c-ppc.texi (PowerPC-Opts): Document "-mpower6".
opcodes/
	* ppc-dis.c (powerpc_dialect): Handle power6 option.
	(print_ppc_disassembler_options): Mention power6.
2006-06-07 05:23:59 +00:00
Thiemo Seufer c281fc320f [ gas/ChangeLog ]
* config/tc-mips.c (ISA_SUPPORTS_DSP64): New macro.
	(CPU_HAS_MIPS3D, CPU_HAS_MDMX, CPU_HAS_DSP, CPU_HAS_MT): Delete.
	(macro_build): Update comment.
	(mips_ip): Allow DSP64 instructions for MIPS64R2.
	(mips_after_parse_args): Remove uses of CPU_HAS_MIPS3D and
	CPU_HAS_MDMX.
	(mips_cpu_info): Fix formatting. Add MIPS_CPU_ASE_MIPS3D and
	MIPS_CPU_ASE_MDMX flags for sb1.

	[ gas/testsuite/ChangeLog ]
	* gas/mips/mips64-dsp.s, gas/mips/mips64-dsp.d: New DSP64 tests.
	* gas/mips/mips.exp: Run DSP64 tests.

	[ opcodes/ChangeLog ]
	* mips-dis.c: Disassemble DSP64 instructions for MIPS64R2.
	* mips-opc.c: Add DSP64 instructions.
2006-06-06 10:49:48 +00:00
Thiemo Seufer 9042dfec74 [ gas/ChangeLog ]
* config/tc-mips.c (macro_build): Use INSERT_OPERAND wherew
	appropriate.
	(mips16_macro_build): Use MIPS16_INSERT_OPERAND where appropriate.
	(mips_ip): Make overflowed/underflowed constant arguments in DSP
	and MT instructions a fatal error. Use INSERT_OPERAND where
	appropriate. Improve warnings for break and wait code overflows.
	Use symbolic constant of OP_MASK_COPZ.
	(mips16_ip): Use MIPS16_INSERT_OPERAND where appropriate.

	[ gas/testsuite/ChangeLog ]
	* gas/mips/mips32-dsp.d, gas/mips/mips32-dsp.s, gas/mips/mips32-mt.d,
	gas/mips/mips32-mt.s: Remove instructions with invalid arguments.
	* gas/mips/mips32-dsp.l, gas/mips/mips32-mt.l: Delete file.

	[ include/opcode/ChangeLog ]
	* mips.h: Improve description of MT flags.
2006-06-05 16:28:36 +00:00
DJ Delorie 3e1290a305 merge from gcc 2006-06-01 14:57:47 +00:00
H.J. Lu 022c1ffc94 include/elf/
2006-05-31  H.J. Lu  <hongjiu.lu@intel.com>

	* internal.h (ELF_SECTION_SIZE): New.
	(ELF_IS_SECTION_IN_SEGMENT): Likewise.
	(ELF_IS_SECTION_IN_SEGMENT_FILE): Updated.
	(ELF_IS_SECTION_IN_SEGMENT_MEMORY): Likewise.

ld/testsuite/

2006-05-31  H.J. Lu  <hongjiu.lu@intel.com>

	* ld-elf/binutils.exp: Make it Linux only.
	(strip_test): Renamed to binutils_test. Check for unsupported
	options.
	Add more tests.

	* ld-elf/commonpage1.d: Make it Linux only.
	* ld-elf/maxpage1.d: Likewise.

	* ld-elf/maxpage1.s: Add main, start and __start.

	* ld-elf/maxpage2.d: New file.
	* ld-elf/tbss1.s: Likewise.
	* ld-elf/tbss2.s: Likewise.
	* ld-elf/tdata1.s: Likewise.
	* ld-elf/tdata2.s: Likewise.
2006-06-01 05:40:24 +00:00
Alan Modra ee99fad350 bfd/
* elf.c (assign_file_positions_for_load_sections): Retrieve
	maxpagesize from m->p_align if it is valid.  Set p_vaddr,
	p_paddr and p_align earlier.  Revert 2006-05-19 change to p_align.
	(copy_elf_program_header): Copy p_align.  Set p_align_valid.
include/elf/
	* internal.h (elf_segment_map): Add p_align and p_align_valid.
2006-05-27 00:47:45 +00:00
Richard Sandiford fed9f6504c include/opcodes/
* m68k.h (mcf_mask): Define.

opcodes/
	* m68k-opc.c (m68k_opcodes): Fix the masks of the Coldfire fmovemd
	and fmovem entries.  Put register list entries before immediate
	mask entries.  Use "l" rather than "L" in the fmovem entries.
	* m68k-dis.c (match_insn_m68k): Remove the PRIV argument and work it
	out from INFO.
	(m68k_scan_mask): New function, split out from...
	(print_insn_m68k): ...here.  If no architecture has been set,
	first try printing an m680x0 instruction, then try a Coldfire one.

gas/testsuite/
	* gas/m68k/mcf-fpu.s: Add fmovemd and fmovem instructions.
	* gas/m68k/mcf-fpu.d: Adjust accordingly.
2006-05-25 08:09:03 +00:00
Nick Clifton c164c0d078 Add TLS support for hppa-linux 2006-05-24 11:05:42 +00:00
Nick Clifton b9b4047245 Add support for AVR6 family 2006-05-24 07:36:11 +00:00
Thiemo Seufer 95d55a568f [ gas/ChangeLog ]
* config/tc-mips.c (macro_build): Add case 'k' to handle cache
	instruction.
	(macro): Add new case M_CACHE_AB.

	[ opcodes/ChangeLog ]
	* mips-opc.c: Add macro for cache instruction.

	[ include/opcode/ChangeLog ]
	* mips.h (enum): Add macro M_CACHE_AB.
2006-05-05 15:41:23 +00:00
Thiemo Seufer 4490f3545a [ gas/testsuite/ChangeLog ]
2006-05-04  Thiemo Seufer  <ths@mips.com>
            Nigel Stephens  <nigel@mips.com>

        * gas/mips/mips.exp: Run mips32-dsp tests only for mips32r2.
        * gas/mips/set-arch.d: Adjust according to opcode table changes.

[ include/opcode/ChangeLog ]
2006-05-04  Thiemo Seufer  <ths@mips.com>
            Nigel Stephens  <nigel@mips.com>
            David Ung  <davidu@mips.com>

        * mips.h: Add INSN_SMARTMIPS define.

[ opcodes/ChangeLog ]
2006-05-04  Thiemo Seufer  <ths@mips.com>
            Nigel Stephens  <nigel@mips.com>
            David Ung  <davidu@mips.com>

        * mips-dis.c (mips_arch_choices): Add smartmips instruction
        decoding to MIPS32 and MIPS32R2.  Limit DSP decoding to release
        2 ISAs.  Add MIPS3D decoding to MIPS32R2.  Add MT decoding to
        MIPS64R2.
        * mips-opc.c: fix random typos in comments.
        (INSN_SMARTMIPS): New defines.
        (mips_builtin_opcodes): Add paired single support for MIPS32R2.
        Move bc3f, bc3fl, bc3t, bc3tl downwards.  Move flushi, flushd,
        flushid, wb upwards.  Move cfc3, ctc3 downwards.  Rework the
        FP_S and FP_D flags to denote single and double register
        accesses separately.  Move dmfc3, dmtc3, mfc3, mtc3 downwards.
        Allow jr.hb and jalr.hb for release 1 ISAs.  Allow luxc1, suxc1
        for MIPS32R2.  Add SmartMIPS instructions.  Add two-argument
        variants of bc2f, bc2fl, bc2t, bc2tl.  Add mfhc2, mthc2 to
        release 2 ISAs.
        * mips16-opc.c (mips16_opcodes): Add sdbbp instruction.
2006-05-04 10:47:05 +00:00
Thiemo Seufer 0015de8d38 [ gas/ChangeLog ]
2006-04-30  Thiemo Seufer  <ths@mips.com>
            David Ung  <davidu@mips.com>

        * config/tc-mips.c (validate_mips_insn): Handling of udi cases.
        (mips_immed): New table that records various handling of udi
        instruction patterns.
        (mips_ip): Adds udi handling.

[ include/opcode/ChangeLog ]
2006-04-30  Thiemo Seufer  <ths@mips.com>
            David Ung  <davidu@mips.com>

        * mips.h: Defines udi bits and masks.  Add description of
        characters which may appear in the args field of udi
        instructions.

[ opcodes/ChangeLog ]
2006-04-30  Thiemo Seufer  <ths@mips.com>
            David Ung  <davidu@mips.com>

        * mips-opc.c (mips_builtin_opcodes): Add udi instructions
        "udi0" to "udi15".
        * mips-dis.c (print_insn_args): Adds udi argument handling.
2006-04-30 18:34:39 +00:00
H.J. Lu 0ba7a49150 Move opcode ChangeLog entry to opcode/ChangeLog. 2006-04-29 16:54:51 +00:00
Thiemo Seufer 564d770d9a * mips.h: Improve comments describing the bitfield instruction
fields.
2006-04-26 18:19:15 +00:00