It seems there is a swapped logic in one of the subcases of
setjmp.S for MIPS: when the FPU registers are 64-bit within
a 32-bit aligned jmp_buf, the code realigns the pointers
before doing 64-bit writes, but the branch logic is swapped:
we must avoid the address adjustement when bit 2 is zero
(that is, the address is already 8-byte aligned).
This always triggers an address error when run, as tested
on a MIPS VR4300 with O64 ABI.
from the 64-bit _JBTYPE definition.
* libc/machine/mips/setjmp.S: Re-work the o32 FP64 support to match
the now one-and-only supported o32 FP64 ABI extension. Also
support o32 FPXX.
* libc/include/machine/setjmp.h: Add support for __mips_fpr being
64 and treat it the same as if __mips64 is set.
* libc/machine/mips/setjmp.S: Ditto, plus add checks for _MIPS_SIM
being _ABIN32 and _ABI64.
Giovanni Bajo
Corinna Vinschen
Jeff Johnston
Richard Sandiford
Aldy Hernandez
Christopher Faylor