crt0.S for ARC used to use instruction "asr.f lp_count, r3, 2" for all cores
except ARC601. However instructions which shift more than 1 bit are
optional, so this crt0.S didn't worked for all ARC cores.
Luckily this is a shift just by 2 bits on all occassions, so fix is trivial
- use two single-bit shifts.
libgloss/ChangeLog
2016-04-29 Anton Kolesov <anton.kolesov@synopsys.com>
* arc/crt0.S: Fix support for processors without barrel-shifter.
Signed-off-by: Anton Kolesov <Anton.Kolesov@synopsys.com>
This is similar to commit 06537f05d4b6a0d2db01c6afda1d2a0ea2588126 to the
newlib for ARC.
GCC for ARC has been updated to provide consistent naming of preprocessor
definitions for different optional architecture features:
* __ARC_BARREL_SHIFTER__ instead of __Xbarrel_shifter for
-mbarrel-shifter
* __ARCEM__ instead of __EM__ for ARC EM cores
* __ARCHS__ instead of __HS__ for ARC HS cores
* etc (not used in libgloss)
This patch updates crt0.S for ARC to use new definitions instead of a
deprecated ones. To ensure compatibility with older compiler new definitions
are also defined in crt0.S if needed, based on presence of deprecated
preprocessor definitions.
libgloss/ChangeLog
2016-04-29 Anton Kolesov <Anton.Kolesov@synopsys.com>
* arc/crt0.S: Use new GCC defines to detect processor features.
ARC aproach to this feature is similiar to ARM's one here.
2016-04-29 Anton Kolesov <anton.kolesov@synopsys.com>
* arc/nano.specs: New file.
* arc/Makefile.in: Support nano.specs.
* arc/nsim.specs: Likewise.
