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8 Commits

Author SHA1 Message Date
Kito Cheng 57635f8581 RISC-V: Add machine-specific implementation for lrint[f], lround[f], llrint[f] and llround[f]. 2020-11-18 09:35:28 +01:00
Kito Cheng 5cf5a2e4c0 RISC-V: Add machine-specific implementation for isnan[f] and copysign[f] 2020-11-18 09:35:28 +01:00
Kito Cheng a7f82939d8 RISC-V: Add missing compile rule for s_finite.c, sf_finite.c, s_isinf.c and sf_isinf.c 2020-11-18 09:35:28 +01:00
Kito Cheng b847c83294 RISC-V: Implment finite and fpclassify 2020-10-27 08:56:30 +01:00
Kito Cheng b5f03509d1 RISC-V: Add fabs[f], fmax[f] and fmin[f]. 2020-10-27 08:56:30 +01:00
Keith Packard via Newlib 373f628d04 libm/riscv: Fix machine-specific sqrt build process 
Like ARM, some RISC-V implementations have hardware sqrt. Support for
that can be detected at compile time, which the code did. However, the
filenames were incorrect so that both the risc-v specific and general
code were getting included in the resulting library.

Fix this by following the ARM model and #include'ing the general code
when the architecture-specific support is not available.

Signed-off-by: Keith Packard <keithp@keithp.com>
 2020-09-04 15:11:31 +02:00
Keith Packard via Newlib bafd65f2fb libm/machine/riscv: Add custom fma/sqrt functions when supported [v2] 
Check for HW FMA and SQRT support and use those instructions in place
of software implementations.

Signed-off-by: Keith Packard <keithp@keithp.com>
 2020-08-12 09:52:19 +02:00
Kito Cheng 7040b2de08 Add RISC-V port for libm 
Contributor list:
    - Michael Neilly  <mneilly@yahoo.com>
    - Kito Cheng  <kito.cheng@gmail.com>
 2017-08-17 12:54:56 -04:00