page/swap space name >= 40 or size/used >= 8 leaves no space between fields;
ensure a space after name and add extra tabs after size and used fields;
output appears like Linux 5.8 after changes to mm/swapfile(swap_show);
proc-swaps-space-before.log:
==> /proc/swaps <==
Filename Type Size Used Priority
/mnt/c/pagefile.sys file 11567748292920 0
/mnt/d/pagefile.sys file 12582912205960 0
proc-swaps-space-after.log:
==> /proc/swaps <==
Filename Type Size Used Priority
/mnt/c/pagefile.sys file 11567748 241024 0
/mnt/d/pagefile.sys file 12582912 182928 0
Linux 5.12 Frozen Wasteland added features and changes:
add AMD 0x8000000a EDX:20 v_spec_ctrl virtual speculation control support
add Intel 0x00000007 ECX:24 bus_lock_detect bus lock detect debug exception
Linux 5.11 💕 Valentine's Day Edition 💕 added features and changes:
add Intel 0x00000007 EDX:23 avx512_fp16 and 0x00000007:1 EAX:4 avx_vnni;
group scattered AMD 0x8000001f EAX Secure Mem/Encrypted Virt features at end:
0 sme, 1 sev, 3 sev_es (more to come not yet displayed)
Update to Linux next 5.10 cpuinfo flags for Intel SDM 36.7.1 Software
Guard Extensions, and 38.1.4 SGX Launch Control Configuration.
Launch control restricts what software can run with enclave protections,
which helps protect the system from bad enclaves.
Add linux-next 5.9 cpuinfo flag for Intel enqcmd/s instructions:
x86/cpufeatures: Enumerate ENQCMD and ENQCMDS instructions:
Work submission instruction comes in two flavors. ENQCMD can be called
both in ring 3 and ring 0 and always uses the contents of a PASID MSR
when shipping the command to the device. ENQCMDS allows a kernel driver
to submit commands on behalf of a user process. The driver supplies the
PASID value in ENQCMDS. There isn't any usage of ENQCMD in the kernel as
of now.
The CPU feature flag is shown as "enqcmd" in /proc/cpuinfo.
Both flags are outdated and collide with official flags in
sys/_default_fcntl.h, which may result in weird misbehaviour
of file functions.
O_NOSYMLINK is not used anyway.
O_DIROPEN is used in fhandler_virtual and derived classes.
The collision with O_NOFOLLOW results in spurious EISDIR
errors when, e. g., reading files in the registry.
fhandler_base::open_fs uses O_DIROPEN in the call to
fhandler_base::open, but it's not used in this context
further down the road.
Drop both flags and create an alternative "diropen" bool
flag in fhandler_virtual.
Signed-off-by: Corinna Vinschen <corinna@vinschen.de>
microcode is unsigned long long, printed by _small_sprintf using %x;
Cygwin32 used last 4 bytes of microcode for next field MHz, printing 0;
use correct _small_sprintf format %X to print microcode, producing
correct MHz value under Cygwin32
CPUID 7:0 EDX[14] serialize added in linux-next 5.8 by Ricardo Neri-Calderon:
The Intel architecture defines a set of Serializing Instructions (a
detailed definition can be found in Vol.3 Section 8.3 of the Intel "main"
manual, SDM). However, these instructions do more than what is required,
have side effects and/or may be rather invasive. Furthermore, some of
these instructions are only available in kernel mode or may cause VMExits.
Thus, software using these instructions only to serialize execution (as
defined in the manual) must handle the undesired side effects.
As indicated in the name, SERIALIZE is a new Intel architecture
Serializing Instruction. Crucially, it does not have any of the mentioned
side effects. Also, it does not cause VMExit and can be used in user mode.
This new instruction is currently documented in the latest "extensions"
manual (ISE). It will appear in the "main" manual in the future.
https://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git/commit/arch/x86/include/asm/cpufeatures.h?id=85b23fbc7d88f8c6e3951721802d7845bc39663d
Re: CPU microcode reported wrong in /proc/cpuinfo
https://sourceware.org/pipermail/cygwin/2020-May/245063.html
earlier Windows releases used different registry values to store microcode
revisions depending on the MSR name being used to get microcode revisions:
add these alternative registry values to the cpuinfo registry value lookup;
iterate thru the registry data until a valid microcode revision is found;
some revision values are in the high bits, so if the low bits are all clear,
shift the revision value down into the low bits
linux 4.6 x86/cpu: Add advanced power management bits
Bit 11 of CPUID 8000_0007 edx is processor feedback interface.
Bit 12 of CPUID 8000_0007 edx is accumulated power.
Print proper names in /proc/cpuinfo
[missed enabling this 2016 change during previous major cpuinfo update
as no power related changes were made to the Linux files since then]
Added in Linux 5.6:
Check FSRM and use REP MOVSB for short copies on systems that have it.
>From the Intel Optimization Reference Manual:
3.7.6.1 Fast Short REP MOVSB
Beginning with processors based on Ice Lake Client microarchitecture,
REP MOVSB performance is enhanced with string lengths up to 128 bytes.
Support for fast-short REP MOVSB is indicated by the CPUID feature flag:
CPUID [EAX=7H, ECX=0H).EDX.FAST_SHORT_REP_MOVSB[bit 4] = 1.
There is no change in the REP STOS performance.
rdpru flag is cpuid xfn 80000008 ebx bit 4 added in linux 5.5;
see AMD64 Architecture Programmer's Manual Volume 3:
General-Purpose and System Instructions
https://www.amd.com/system/files/TechDocs/24594.pdf#page=329
and elsewhere in that document
Add feature test print macro that makes feature, bit, and flag text
comparison and checking easier. Handle as common former Intel only
feature flags also supported on AMD. Change order and some flag names
to agree with current Linux.
So far negative values were denoting files, positive values
denoting directories. We should prefer a less error prone
method. Redefine virtual_ftype_t to contain only positive
values and replace checks for negativ or positive values with
inline functions virt_ftype_isfile() and virt_ftype_isdir().
Drop outdcated comments referring to numerical virtual_ftype_t
values.
Signed-off-by: Corinna Vinschen <corinna@vinschen.de>
-Add vendor identification
-Support in get_cpu_cache
Background:
Chengdu Haiguang IC Design Co., Ltd (Hygon) is a Joint Venture
between AMD and Haiguang Information Technology Co.,Ltd., aims at
providing high performance x86 processor for China server market.
Its first generation processor codename is Dhyana, which
originates from AMD technology and shares most of the
architecture with AMD's family 17h, but with different CPU Vendor
ID("HygonGenuine")/Family series number(Family 18h).
Related Hygon kernel patch can be found on:
http://lkml.kernel.org/r/5ce86123a7b9dad925ac583d88d2f921040e859b.1538583282.git.puwen@hygon.cn
Signed-off-by: Jinke Fan <fanjinke@hygon.cn>
3.0.0 changed uname but missed to align /proc/version
which then used the old uname function on the new uname
struct.
Signed-off-by: Corinna Vinschen <corinna@vinschen.de>
* create new function __get_cpus_per_group to evaluate # of CPU groups
* Call from format_proc_cpuinfo and sched_getcpu
* Bump API minor version
Signed-off-by: Corinna Vinschen <corinna@vinschen.de>
There are systems with a MaximumProcessorCount not
reflecting the actually available CPUs. The ActiveProcessorCount
is correct though. So we use ActiveProcessorCount rather than
MaximumProcessorCount per group to set group affinity correctly.
Signed-off-by: Corinna Vinschen <corinna@vinschen.de>
* Redefine NSPERSEC to NS100PERSEC
* Define NSPERSEC as nanosecs per second
* Define USPERSEC as microsecs per second
* Use above constants throughout where appropriate
* Rename to_us to timespec_to_us and inline
* Rename it_bad to timespec_bad and inline
Signed-off-by: Corinna Vinschen <corinna@vinschen.de>
Explicitly format the contents of /proc/loadavg to avoid the decimal point
getting localized according to LC_NUMERIC. Using anything other than '.' is
wrong and breaks top.
Signed-off-by: Jon Turney <jon.turney@dronecode.org.uk>
v2:
autoload PerfDataHelper functions
Keep loadavg in shared memory
Guard loadavg access by a mutex
Initialize loadavg to the current load
v3:
Shared memory version bump isn't needed if we are only extending it
Remove unused autoload
Mark inititalized flags as NO_COPY for correct behaviour in fork child
Signed-off-by: Jon Turney <jon.turney@dronecode.org.uk>
Revamp device parsing code. Introducing support for more partitions
into the shilka-generated parser has the unfortunate side-effect of
raising the size of the DLL by almost 2 Megs. Therefore we split out
the handling for /dev/sdXY devices into a tiny bit of hand-written
code.
While at it, remove some unused cruft from devices.* and generally
clean up the device class to provide access methods instead of direct
access to members.
Signed-off-by: Corinna Vinschen <corinna@vinschen.de>
Bump GPLv2+ to GPLv3+ for some files, clarify BSD 2-clause.
Everything else stays under GPLv3+.
New Linking Exception exempts resulting executables from LGPLv3 section 4.
Add CONTRIBUTORS file to keep track of licensing.
Remove 'Copyright Red Hat Inc' comments.
Signed-off-by: Corinna Vinschen <corinna@vinschen.de>
* include/sys/unistd.h (_SC_LEVEL*): Add cache-related variables as
on Linux.
* fhandler_proc.cc (format_proc_cpuinfo): Fetch cache information
from new cache functions in sysconf.cc, get_cpu_cache_intel and
get_cpu_cache_amd.
* sysconf.cc (__nt_query_system): New local helper.
(get_nproc_values): Utilize __nt_query_system on pre-Windows 7 systems.
Use GetLogicalProcessorInformationEx otherwise to handle more than
64 CPUs. Only handle _SC_NPROCESSORS_CONF and _SC_NPROCESSORS_ONLN.
(get_phys_pages): New helper to handle _SC_PHYS_PAGES.
(cpuid2_cache_descriptor): New array to map Intel CPUID 2 descriptor
values to cache type, cache size, associativity and linesize.
(cpuid2_cache_desc_compar): Comparision function for bsearch over
cpuid2_cache_descriptor.
(get_cpu_cache_intel_cpuid2): New function to fetch cache info from
Intel CPUID 2.
(get_cpu_cache_intel_cpuid4): Ditto from Intel CPUID 4.
(get_cpu_cache_intel): New function as CPU-specific entry point.
(assoc): New array to map associativity values from AMD CPUID
0x80000006.
(get_cpu_cache_amd): New function to fetch cache info from AMD CPUIDs
0x80000005 and 0x80000006.
(get_cpu_cache): New function to fetch cache info.
(sca): Call get_phys_pages if _SC_PHYS_PAGES is requested. Call
get_cpu_cache for new _SC_* cache requests.
(SC_MAX): Set to _SC_LEVEL4_CACHE_LINESIZE.
(get_phys_pages(void)): Call get_phys_pages(int).
* include/cygwin/version.h (CYGWIN_VERSION_API_MINOR): Bump.
* new-features.xml (ov-new2.3): Document sysconf cache addition.
Signed-off-by: Corinna Vinschen <corinna@vinschen.de>
* fhandler_proc.cc (format_proc_cpuinfo): Only fetch group relations,
we don't need anything else.
Signed-off-by: Corinna Vinschen <corinna@vinschen.de>
* autoload.cc (GetLogicalProcessorInformationEx): Import.
(SetThreadGroupAffinity): Import.
* fhandler_proc.cc (add_size): New macro.
(get_msb): New inline function.
(mask_bits): Ditto.
(format_proc_cpuinfo): Drop handling of old CPUs. Check if we're
running on a OS version supporting porcessor groups. If so, use
SetThreadGroupAffinity to set thread affinity. Improve cache info
to include 3rd level cache on Intel CPUs. Improve multi core info.
* wincap.h (wincaps::has_processor_groups): New element.
* wincap.cc: Implement above element throughout.
Signed-off-by: Corinna Vinschen <corinna@vinschen.de>
Brian Inglis
Corinna Vinschen
Jinke Fan
Jon Turney