Commit Graph

714 Commits

Author SHA1 Message Date
Jozef Lawrynowicz e3f29b2472 MSP430: Increase the amount of main memory available in sim ld scripts
The main memory region of the GDB simulator ends at address 0xFFBF,
but the simulator linker scripts do not make full use of this available
memory.

>From 61f3d212741acee583e21ff2c2808775584ecad6 Mon Sep 17 00:00:00 2001
From: Jozef Lawrynowicz <jozef.l@mittosystems.com>
Date: Mon, 3 Aug 2020 19:38:23 +0100
Subject: [PATCH 2/2] MSP430: Increase the amount of main memory available in
 sim ld scripts

The main memory region of the GDB simulator ends at address 0xFFBF,
but the simulator linker scripts do not make full use of this available
memory.
2020-08-07 15:16:43 +02:00
Jozef Lawrynowicz 748970c833 MSP430: Word align __*_array_start symbols in sim linker scripts
__{preinit,init,fini}_array_start symbols must be word aligned in
linker scripts. If the section preceding the __*_array_start symbol
has an odd size, then a NULL byte will be present between the start
symbol and the .*_array section itself, when the section gets
automatically word-aligned.

This results in a branch to an invalid address when the CRT startup
code tries to run through the functions listed in the array sections.

>From de115144d05ecbaa82c9c737cc261715ca4b7d67 Mon Sep 17 00:00:00 2001
From: Jozef Lawrynowicz <jozef.l@mittosystems.com>
Date: Mon, 3 Aug 2020 19:09:46 +0100
Subject: [PATCH 1/2] MSP430: Word align __*_array_start symbols in sim linker
 scripts

__{preinit,init,fini}_array_start symbols must be word aligned in
linker scripts. If the section preceding the __*_array_start symbol
has an odd size, then a NULL byte will be present between the start
symbol and the .*_array section itself, when the section gets
automatically word-aligned.

This results in a branch to an invalid address when the CRT startup
code tries to run through the functions listed in the array sections.
2020-08-07 15:16:43 +02:00
Dimitar Dimitrov 70cd4cbe65 pru: Fix memory corruption on syscall return
In the initial code I missed one level of pointer indirection. Instead
of storing errno in impure_data, _impure_ptr was corrupted.

Only simulator is impacted. Real targets have no OS and no syscalls.

This resolves a bunch of stdio cases from the GCC testsuite:
  FAIL->PASS: gcc.c-torture/execute/printf-2.c   -O0  execution test

Signed-off-by: Dimitar Dimitrov <dimitar@dinux.eu>
2020-07-02 11:00:33 +02:00
Richard Earnshaw f973a7d8be arm: Finish moving newlib to unified syntax for Thumb1
Most code in newlib already uses unified syntax, but just a couple of
laggards remain.  This patch removes these and means the the entire
code base has now been converted.
2020-03-02 13:33:11 +00:00
Georg Sauthoff 9b51beeb2a Only pass the minimum number of syscall arguments
Previously, __internal_syscall() compiled into asm-code that unconditionally
sets the syscall argument registers a0 to a5.

For example, the instruction sequence for a exit syscall looked like
this:

    li    a0, 1   # in ther caller of exit()
    # ...         # in newlib:
    li    a1, 0   # unused arguments
    li    a2, 0
    li    a3, 0
    li    a4, 0
    li    a5, 0
    li    a7, 93  # exit syscall number

(i.e. the binary contains then 5 superfluous instructions for this
one argument syscall)

This commit changes the RISC-V syscall code such that only the required
syscall argument registers are set.

GCC detects that argc is known at compile time and thus evaluates all the
if-statements where argc is used at compile time (tested with -O2 and -Os).
2020-02-11 09:41:52 +01:00
Sandra Loosemore cd78225a50 libgloss: Fix lseek semihosting bug on nios2 and m68k
When off_t is 32 bits, the value needs to be sign-extended to 64 bits
before shifting right to extract the high-order word.  Previously
negative offsets were incorrectly encoded.

Signed-off-by: Sandra Loosemore <sandra@codesourcery.com>
2020-02-06 11:02:38 +01:00
Jim Wilson 8ef32f2dcf RISC-V: Use newlib nano specific libm.
The libm gamma functions use the _gamma_signgam field of the reentrant
structure, which changes offset with the --enable-newlib-reent-small
configure option, which means we need to use a newlib nano specific
version of libm in addition to libc in the nano.specs file.  Reported
by Keith Packard.  There is a riscv-gnu-toolchain patch that goes
along with this to create the new libm_nano.a file.

Signed-off-by: Jim Wilson <jimw@sifive.com>
2020-01-31 12:42:52 +01:00
Keith Packard 9042d0ce65 Use remove-advertising-clause script to edit BSD licenses
This edits licenses held by Berkeley and NetBSD, both of which
have removed the advertising requirement from their licenses.

Signed-off-by: Keith Packard <keithp@keithp.com>
2020-01-29 19:03:31 +01:00
Jozef Lawrynowicz b74ba7dca6 MSP430: Support new msp430-elfbare target
Update the target triplet glob used when configuring for msp430 to
support a new msp430-elfbare target being added to gcc.
2019-12-16 10:15:06 +01:00
Anthony Green 78b7a3b0f8 Implement the unlink system call for the moxie simulator.
Corresponding support for this was just added to the gdb moxie simulator.
Unlink support is required by the GCC testsuite.
2019-12-14 05:27:38 -05:00
Jozef Lawrynowicz fa14f445ba Fix libgloss being built for disabled multilibs
Target libraries are considered to be built for GCC's "host", not GCC's
"target".  The "host" variable must be set by configure scripts using
"config-ml.in" to determine multilib support, otherwise disabled
multilibs (specified as a configure argument with --disable-<multilib>)
will still be built for the subdirectories those configure scripts
reside in.
2019-11-02 16:27:20 +01:00
Dimitar Dimitrov 0c7734673a Initial PRU port for libgloss and newlib
Signed-off-by: Dimitar Dimitrov <dimitar@dinux.eu>
2019-10-31 14:47:19 -04:00
Jozef Lawrynowicz 0574317971 MSP430: Add missing build rule for unlink() to libgloss Makefile 2019-10-25 18:04:46 +02:00
Sandra Loosemore fa29288ef1 Adjust nios2 and m68k semihosting for sys/stat.h changes.
Commit 72ff9acad2 caused st_atime,
st_ctime, and st_mtime to be defined as macros.  This collided with
use of these identifiers as field names in struct gdb_stat (which
represents the GDB RSP encoding of struct stat) in libgloss
semihosting support for nios2 and m68k.  This patch renames the
affected fields of struct gdb_stat.

Signed-off-by: Sandra Loosemore <sandra@codesourcery.com>
2019-09-04 09:44:35 +02:00
Jeff Law d065170441 Fix regression in visium caused by sys/stat.h change 2019-08-20 18:15:41 +02:00
Jeff Johnston b99887c428 Revert previous change to sys/stat.h and fix cris libgloss
- revert previous fix which altered sys/stat.h
- fix libgloss/cris/gensyscalls to undef st_atime, st_mtime,
  and st_ctime macros which cannot be used with new_stat structure
2019-08-19 18:01:45 -04:00
Alexander Fedotov bf56973edc Align libgloss/arm and libc/sys/arm sources: miscellaneous fixes
1. Trim trailing spaces
2. Align comments, function declarations and definitions
2019-08-05 13:00:53 +01:00
Alexander Fedotov dfffe68303 Align libgloss/arm and libc/sys/arm sources: HeapInfo and __heap_limit
Applied changes from commit 8d98f95:

	* arm/crt0.S: Initialise __heap_limit when ARM_RDI_MONITOR is defined.
	* arm/syscalls.c: define __heap_limit global symbol.
	* arm/syscalls.c (_sbrk): Honour __heap_limit.

Applied changes from commit 8d98f95:
	Fixed semihosting for ARM when heapinfo not provided by debugger
2019-08-05 13:00:53 +01:00
Faraz Shahbazker 6661a67747 Align _end symbol to at least 4 in all MIPS scripts
Left-over part of commit 84b2a020da

The _end marker must be aligned to 4-bytes to ensure that the last
element written does not reach beyond the address of _end.  This is
also necessary as the termination condition is an equality test
instead of an ordered test so (_end - _fbss) must be a multiple of
4-bytes.  The alignment is already correct for mti*.ld files, fix
it for all remaining MIPS scripts that don't already align to at
least 4.
2019-07-30 09:38:13 +02:00
Jozef Lawrynowicz 884b05b54e MSP430: Remove .init/.fini sections
The .init/.fini sections are not required for msp430-elf, and add unnecessary
code bloat to the CRT library. These sections are specified as "unused" by
the MSP430 EABI.

.init existed to call __crt0_run_{init,preinit}_array which run through
the functions in .{init,preinit}_array.
__crt0_run_{init,preinit}_array are already dynamically included like the
other crt0 functions, so these can be placed before the call to main,
which ensures they are still called if needed.
With these functions moved, .init has no purpose and can be removed.

.fini existed to call __crt0_run_fini_array.
However, the "__msp430_fini" symbol which marks the start of .fini has
never been used, so no termination routines have ever been run for
msp430. On returning from main(), _exit() is called which just loops
forever.
So there is no current expectation that __crt0_run_fini_array will
get called by the CRT code. Further work is to ensure functions
registered with atexit can be optionally called during program termination,
and then __crt0_run_fini_array can be registered with atexit during
program initialization.

The mechanisms for supporting the "-minrt" option have also been removed.
"-minrt" enabled a "minimum runtime environment" by removing calls to
functions which run global static initializers and constructors. Since
this behaviour is now dynamic, and these functions are only included
when needed, the minrt versions of the CRT object files are no longer
required.
2019-07-24 16:22:00 -04:00
Alexander Fedotov 942f60d714 Stack Pointer and Stack Limit initialization refactored.
SP initialization changes:
  1. set default value in semihosting case as well
  2. moved existing SP & SL init code for processor modes in separate routine and made it as "hook"
  3. init SP for processor modes in Thumb mode as well

Add new macro FN_RETURN, FN_EH_START and FN_EH_END.
2019-07-23 10:00:06 +02:00
Alexander Fedotov a90aa583fb Arm: Use lrdimon-v2m_nano when semihosting v2 and nano selected respectively 2019-06-25 13:38:44 -04:00
Jim Wilson 77ac27dcf8 RISC-V: Add _LITE_EXIT in crt0.S.
This patch adds _LITE_EXIT in crt0.S to enable "lite exit" technique in
RISC-V. The changes have been tested in riscv/riscv-gnu-toolchain by
riscv-dejagnu with riscv-sim.exp/riscv-sim-nano.exp.
2019-05-22 17:41:25 -07:00
Faraz Shahbazker a9a0d219a4 Make .data section placement coincide with _fdata symbol
The _fdata symbol in MIPS linker scripts is aligned to a 16-byte
boundary.  The ALIGN function does not implicitly update current
location counter.  If sections positioned after the assignment
do not have the same natural alignment as the ALIGN function then
the start of the section group will not coincide with the value
of the symbol.

Given the linker command sequence:
  symbol = ALIGN (NN);
  (.section*)
where the idiom implies a desire to mark the beginning of .section
with symbol, there must be an assignment to the location counter
between the assignment to symbol and the .section pattern.

libgloss/
	* mips/array.ld: Update the location counter to match _fdata.
	* mips/cfe.ld: Likewise.
	* mips/ddb-kseg0.ld: Likewise.
	* mips/ddb.ld: Likewise.
	* mips/dve.ld: Likewise.
	* mips/idt.ld: Likewise.
	* mips/idt32.ld: Likewise.
	* mips/idt64.ld: Likewise.
	* mips/idtecoff.ld: Likewise.
	* mips/jmr3904app-java.ld: Likewise.
	* mips/jmr3904app.ld: Likewise.
	* mips/jmr3904dram-java.ld: Likewise.
	* mips/jmr3904dram.ld: Likewise.
	* mips/lsi.ld: Likewise.
	* mips/mti32.ld: Likewise.
	* mips/mti64.ld: Likewise.
	* mips/mti64_64.ld: Likewise.
	* mips/mti64_n32.ld: Likewise.
	* mips/nullmon.ld: Likewise.
	* mips/pmon.ld: Likewise.
	* mips/sde32.ld: Likewise.
	* mips/sde64.ld: Likewise.
2019-05-15 15:30:25 -04:00
Faraz Shahbazker ab2901c843 Fix order of eh_frame sections in linker scripts
The compiler driver positions the linker script at the end of the linker
command-line, after crtend.o.  As a result, any INPUT objects and archive
GROUPs introduced by the linker script are placed after crtend.o and the
end-of-frame marker provided by crtend.o ends up in between .eh_frames
instead of being at the end.

This has always been a problem, but a binutils update to clean-up
redundant NULL markers in .eh_frame exposes it as a execution failure in
exception-handling tests.  This patch re-orders .eh_frames in all
MIPS linker scripts so that the one from crtend.o is always placed last.

libgloss/
	* mips/array.ld: Re-order to place .eh_frame from crtend.o
	after all other .eh_frame sections.
	* mips/cfe.ld: Likewise.
	* mips/ddb-kseg0.ld: Likewise.
	* mips/ddb.ld: Likewise.
	* mips/dve.ld: Likewise.
	* mips/idt.ld: Likewise.
	* mips/idt32.ld: Likewise.
	* mips/idt64.ld: Likewise.
	* mips/jmr3904app.ld: Likewise.
	* mips/lsi.ld: Likewise.
	* mips/mti32.ld: Likewise.
	* mips/mti64.ld: Likewise.
	* mips/mti64_64.ld: Likewise.
	* mips/mti64_n32.ld: Likewise.
	* mips/nullmon.ld: Likewise.
	* mips/pmon.ld: Likewise.
	* mips/sde32.ld: Likewise.
	* mips/sde64.ld: Likewise.
2019-04-29 10:44:24 +02:00
Jozef Lawrynowicz f811485ffb MSP430: Make the inclusion of run_*_array fns depend on defined assembler symbols
Many of the MSP430 crt functions (e.g. to initialize bss) are linked
"dynamically", based on symbols defined in the program.
The GNU assembler defines the symbols corresponding to the crt
functions by examining the section names in the input file.

If GCC has been configured with --enable-initfini-array, then
.init_array and .fini_array will hold pointers to global
constructors/destructors. These sections can also hold functions that
need to be executed for other purposes.

The attached patch puts the __crt0_run_{preinit,init,fini}_array and
__crt0_run_array functions in their own object files, so they will
only be linked when needed.

Successfully regtested the DejaGNU GCC testsuite using the binutils and
newlib changes together with GCC trunk configured with
--enable-initfini-array.
2019-04-18 10:29:24 +02:00
Jozef Lawrynowicz 38ecf252e5 Fix incorrect assembly code in _msp430_run_array 2019-04-16 13:23:46 +02:00
Jozef Lawrynowicz a2e81650d1 Fix definition of write() to use const char * for the type of the buffer 2019-04-15 14:21:59 +02:00
Alexander Fedotov a0b0a4a018 Align comments and spaces in libgloss/arm/crt0.S and newlib/libc/sys/arm/crt0.S to ease further code alignment. 2019-04-12 14:34:47 +01:00
Christophe Lyon cc430406ac Include code in trap.S for APCS only.
The code in trap.S is to support the old APCS chunked stack variant,
which dates back to the Acorn days, so put it under #ifndef
__ARM_EABI__.

	* libgloss/arm/trap.S: Use __ARM_EABI rather than PREFER_THUMB.
	* newlib/libc/sys/arm/trap.S: Use __ARM_EABI rather than
	__thumb2__.
2019-04-11 14:20:21 +00:00
Sandra Loosemore c4c6140463 Add a dummy interrupt handler to nios2 crt0.s.
The location of the handler at offset 0x20 from the start of memory,
immediately after the 32-byte reset vector, matches the expectations
of real hardware (e.g., a 3c120 board).
2019-04-03 18:02:47 +02:00
Jeff Johnston 1cff36cdd7 Add semihosting docs for nios2 and m68k
Author: Sandra Loosemore <sandra@codesourcery.com>
Date:   Wed Mar 13 20:22:16 2019 -0700

    Add semihosting documentation for nios2 and m68k.

    QEMU maintainers have asked for a specification of the nios2
    semihosting interface.  Since it's essentially a copy of the m68k
    implementation, this patch adds a document for that target as well.
2019-03-14 10:23:25 -04:00
Tamar Christina 1ba66fe8fa AArch32: Fix the build for M class semihosting
The M class cores don't support Semihosting v2 mixed mode, but we were
accidentally using the new immediates for it.  My last patch changed the
immediates which broke the build because doing a full multi-lib build
including M architectures now results in an assembler error instead of
silently doing the wrong thing.

This fixes the issue by changing the defines around such that According
to the specs any M class build uses the normal semihosting instructions.

Regtested on arm-none-eabi and no issues, using a build with m class
multilibs too.
2019-02-11 12:49:23 +01:00
Tamar Christina 6d6a623e7d AArch32: Add support for HLT to Mixed Mode models
The Semihosting v2 protocol requires us to output the Armv8-a HLT instruction
when in mixed mode (SEMIHOST_V2_MIXED_MODE), however it also requires this to
be done for Armv7-a and earlier architectures.

The HLT instruction is defined in the undefined encoding space for older
architectures but simulators such as QEMU already trap on it [1] for all
architectures and is a requirement for semihosting v2 [2].

Unfortunately the GAS restricts the use of HLT to Armv8-a which requires us to
use the instruction encodings we want directly in crt0.

This patch does this, I have not updated newlib/libc/* as that is quite out of
date already.  A proper sync is needed in order to get things back in sync.

A different patch for this would be best.

[1] 19a6e31c9d
[2] https://developer.arm.com/docs/100863/latest/the-semihosting-interface
2019-02-08 12:37:16 +01:00
Jim Wilson 7e72be1c39 Add libgloss install-pdf and install-html targets.
The toplevel makefile used by binutils/gcc/newlib/etc has install-pdf and
install-html targets, but they fail because libgloss doesn't support them.
Tested with an arm-eabi combined tree build and install, and verifying that
the install-pdf and install-html targets now work, and that the pdf and html
doc files are now in the install tree.

	libgloss/
	* Makefile.in (install-html, install-pdf): New.
	* doc/Makefile.in (htmldir, pdfdir): New.
	(porting.ps): Delete white space on blank line.
	(install-pdf, install-html): New.
2018-11-20 11:13:34 +01:00
Matthew Malcomson 6dbd190111 Enable return code with semi-hosting SYS_EXIT_EXTENDED
The _exit function currently passes -1 as a "sig" to the _kill function as an
invalid signal number so that _kill can distinguish between an abort and a
standard exit.

For boards using the SYS_EXIT_EXTENDED semi-hosting operation to return a
status code, this means that the "status" paramter to _exit is ignored and the
return code is always -1.
https://developer.arm.com/docs/100863/latest/semihosting-operations/sys_exit_extended-0x20

This patch puts shared code between _kill and _exit into a new function
_kill_shared that takes the semi-hosting "reason" to use (if semi-hosting is
available) as an argument.

For semi-hosting _kill_shared provides that "reason".

Without the "sig" argument being used to distinguish between a normal and
abnormal exit, the _exit function can provide the return code to be used if the
SYS_EXIT_EXTENDED operation is available.

Hence the exit code can be returned.
2018-11-19 13:46:19 +01:00
Tamar Christina 9a7f131e0e Initialize SVE system registers.
This patch initializes the SVE system registers if available
and initializes the vector length to the maximum supported.

This is done according to the SVE specification [1].

[1] https://developer.arm.com/docs/ddi0584/latest/arm-architecture-reference-manual-supplement-the-scalable-vector-extension-sve-for-armv8-a
2018-10-31 11:14:57 +00:00
Christophe Lyon b6ba19e355 [Aarch64] Syscalls: fix prototypes
This patch is similar the arm one committed recently.

2018-10-08  Christophe Lyon  <christophe.lyon@linaro.org>

	* libgloss/aarch64/syscalls.c (_sbrk): Fix prototype.
	(_getpid, _write, _swiwrite, _lseek, _swilseek, _read, _wriread):
	Likewise.
2018-10-08 14:39:16 +01:00
Christophe Lyon 8a7536e91d [ARM] Make _kill() a noreturn function.
AngelSWI_Reason_ReportException does not return accoring to the ARM
documentation, so it is valid to mark _kill() as noreturn.  This way,
the compiler does not warn about _exit() returning a value despite
being noreturn.

2018-10-01  Christophe Lyon  <christophe.lyon@linaro.org>

	* libgloss/arm/_exit.c (_exit): Declare _kill() as noreturn.
	* libgloss/arm/_exit.c (_kill): Likewise. Remove the return
	statements.
	* newlib/libc/sys/arm/syscalls.c (_kill): Likewise..
2018-10-08 14:35:43 +01:00
Christophe Lyon 9edf0810db [Aarch64] Fix warning in _sbrk
2018-10-01  Christophe Lyon  <christophe.lyon@linaro.org>

    	* libgloss/aarch64/syscalls.c (_sbrk): Cast "__heap_limit" to
    	"char *".
2018-10-05 13:21:54 +01:00
Hans-Peter Nilsson a6837ca34f Committed, CRIS port: fix fallout from time_t defaulting to 64 bits, part 1
It's been a while...  I see the CRIS port broke with the
time_t-default-to-64-bit change, observable by a few test-cases in the
gcc fortran(!) tests failing, regressing when trying a recent newlib.

This is a two-part belt-and-suspenders change: adjust the CRIS port
gettimeofday syscall (the only one in newlib/CRIS passing a time_t or
struct timeval) to handle a userspace 64-bit time_t and secondly default
time_t to 32-bit long anyway.  I considered making the local
"kernel_timeval" copy in _gettimeofday conditional on (userspace) time_t
being 64 bits, but thought it not worth bothering with the few move insns.
The effect of a 64-bit time_t is however observable as longer simulation
time when running the gcc testsuite and as bigger binaries without any
actual upside from the larger time_t size, so I thought better make the
default for this port go back to being a "long" again.

Tested by running the gcc testsuite over the three combinations of two
parts of the patch and observing the expected changes.  Committed.

libgloss:
	Adjust for syscall and userspace having different time_t or timeval.
	* cris/linunistd.h (kernel_time_t, kernel_suseconds_t, kernel_timeval):
	New types.
	(gettimeofday): Change the type of the first argument to be a
	pointer to a struct kernel_timeval.
	* cris/gensyscalls (_gettimeofday): Use an intermediate struct
	kernel_timeval for the syscall and initialize the result from
	that.

Signed-off-by: Hans-Peter Nilsson <hp@axis.com>
2018-09-13 17:57:11 +02:00
Denis Ivanov 9e032fd939 RISC-V: Fix _sbrk, it's failed only when return value is -1.
Signed-off-by: Kito Cheng <kito.cheng@gmail.com>
2018-08-29 15:49:00 +02:00
Denis Ivanov 258996b696 RISC-V: Fixed return code in _times syscall.
Upon successful completion, times() shall return the elapsed real time,
in clock ticks, since an arbitrary point in the past (for example,
system start-up time).

Signed-off-by: Kito Cheng <kito.cheng@gmail.com>
2018-08-29 15:49:00 +02:00
Sandra Loosemore fddc74d12b Add BSP and semihosting library for nios2-generic-nommu QEMU emulation. 2018-08-08 10:53:03 +02:00
Jeff Johnston 2ec54fb1d1 Patch from Richard Earnshaw <Richard.Earnshaw@arm.com>
* aarch64/cpu-init/rdimon-aem-el3.S (cpu_init_hook): Simplify
  entry/exit sequences.  Add CFI unwind rules.
2018-08-01 14:02:56 -04:00
Sebastian Huber 6158b30e3e RISC-V: Do not use _init/_fini
Introduce new host configuration variable "have_init_fini" which is set
to "yes" by default.  Override it for RISC-V to "no".

Signed-off-by: Sebastian Huber <sebastian.huber@embedded-brains.de>
2018-07-30 10:47:57 +02:00
Tamar Christina 430b529111 Fix AArch32 semihosting SYS_EXIT call on semihosting v1.
The current SYS_EXIT has a bug that when making the call it always uses
the v2 calling convention.  This is undefined behavior according to the
semihosting specification:
https://developer.arm.com/docs/100863/latest/semihosting-operations/sys_exit-0x18

This patch fixes it by making sure v1 passes the argument directly in the register instead
of in a block. And for v2 it does the same if the v2 extension isn't supported.

The sequence generated now is

   12424:       ebfffecd        bl      11f60 <_has_ext_exit_extended>
   12428:       e3500000        cmp     r0, #0
   1242c:       11a0500d        movne   r5, sp
   12430:       059d5000        ldreq   r5, [sp]
   12434:       e1a00004        mov     r0, r4
   12438:       e1a01005        mov     r1, r5
   1243c:       ef00f000        svc     0x0000f000

Signed-off-by: Tamar Christina <tamar.christina@arm.com>
2018-07-11 17:18:04 +02:00
Ben Levinsky 28627a5a03 libgloss: microblaze: adjust handlers to be weak.
Previously, hw exception handler stub and interrupt handler stub for microbaze were unable to
be overwritten. Change to weak to fix this.

Signed-off-by: Ben Levinsky <ben.levinsky@xilinx.com>
2018-05-03 15:16:13 -04:00
Jaap de Wolff bc9b30ea77 add forward declaration to main() to prevent warnings 2018-02-16 12:16:08 +01:00
Jaap de Wolff c9d4bac58c adapt prototypes arm/syscalls.c to usual prototypes, and do not rely on implicit conversions 2018-02-16 12:16:07 +01:00
Chih-Mao Chen f2c9e55faf RISC-V: isatty: return 0 on error 2018-01-18 09:21:10 +01:00
Yaakov Selkowitz 7192f84096 ansification: remove _HAVE_STDC
Signed-off-by: Yaakov Selkowitz <yselkowi@redhat.com>
2018-01-17 11:47:30 -06:00
Yaakov Selkowitz 70ee6b17df ansification: remove _EXFUN, _EXFUN_NOTHROW
Signed-off-by: Yaakov Selkowitz <yselkowi@redhat.com>
2018-01-17 11:47:29 -06:00
Yaakov Selkowitz 9087163804 ansification: remove _DEFUN
Signed-off-by: Yaakov Selkowitz <yselkowi@redhat.com>
2018-01-17 11:47:26 -06:00
Yaakov Selkowitz 67ee0cac4c ansification: remove _VOID
Signed-off-by: Yaakov Selkowitz <yselkowi@redhat.com>
2018-01-17 11:47:20 -06:00
Yaakov Selkowitz fff27f8429 ansification: remove _DEFUN_VOID
Signed-off-by: Yaakov Selkowitz <yselkowi@redhat.com>
2018-01-17 11:47:19 -06:00
Yaakov Selkowitz eea249da3b ansification: remove _PARAMS
Signed-off-by: Yaakov Selkowitz <yselkowi@redhat.com>
2018-01-17 11:47:13 -06:00
Yaakov Selkowitz e13e191b60 ansification: remove _NOARGS
Signed-off-by: Yaakov Selkowitz <yselkowi@redhat.com>
2018-01-17 11:47:11 -06:00
Yaakov Selkowitz 6783860a2e ansification: remove _AND
Signed-off-by: Yaakov Selkowitz <yselkowi@redhat.com>
2018-01-17 11:47:05 -06:00
Jim Wilson 9588ff7555 RISC-V: Add gdb sim and newlib nano support. Fix a few misc minor bugs. 2017-12-26 12:31:33 -08:00
Jim Wilson 28d5b98038 RISC-V: Moved syscalls to separate files to fix aliasing problems. 2017-12-26 12:27:52 -08:00
Jim Wilson 347b083911 RISC-V: Updated syscall to take 6 arguments 2017-12-26 12:26:19 -08:00
Jim Wilson a6633677b9 RISC-V: Add nanosleep functionality 2017-12-26 12:24:45 -08:00
Jim Wilson e807c51d78 RISC-V: Fix libnosys build. 2017-12-26 12:18:42 -08:00
Alexander Fedotov f6ef29c48f Fixed semihosting for AArch64 when heapinfo parameters are not provided by debugger 2017-10-24 17:27:51 +02:00
Tamar Christina 111b6813fb Fix multido compilation on ARM
The previous multi-build implementation was copying the config.status from the parent
multilib directory when building the different semihosting variants. It did so because
the configuration doesn't change. However when you use a relative path to configure it
turns out that the paths inside the config.status are also relative.

To fix this, the srcdir is adjusted from the initial configuration instead of copying it.

Tested on aarch64-none-elf and arm-none-eabi.

Signed-off-by: Tamar Christina <tamar.christina@arm.com>
2017-10-09 19:03:52 +02:00
Alexander Fedotov e7eb978881 adjust libnosys config for aarch64 to avoid linker error when switching from rdimon.specs to nosys.specs 2017-10-09 17:53:41 +02:00
Alexander Fedotov-B55613 3ec9892f5d move ILP32 sanity check on heap base code under ARM_RDI_MONITOR 2017-08-24 14:41:19 +02:00
Kito Cheng 6864c08b94 Change license to FreeBSD License for RISC-V
- For prevent confuse about what BSD license variant we used, 2- or
   3-clause license, we change the license to FreeBSD license to make
   it unambiguously refers to the 2-clause license.
2017-08-21 11:08:54 +02:00
Kito Cheng c496cbb6bd Add RISC-V port for libgloss
Contributor list:
    - Andrew Waterman  <andrew@sifive.com>
    - Palmer Dabbelt  <palmer@dabbelt.com>
    - Kito Cheng  <kito.cheng@gmail.com>
    - Alex Suykov  <alex.suykov@gmail.com>
2017-08-17 14:51:05 -04:00
Szabolcs Nagy cfa64a86d1 Fix crt0 init fini code
__USES_INITFINI__ ifdef was incorrectly copied from arm
(it's an arm backend thing in gcc, not meaningful on aarch64)
2017-08-17 13:45:26 +02:00
Alexander Fedotov-B55613 7e69f983a4 fix typo in AArch64 crt0 2017-08-15 16:19:25 +02:00
Alexander Fedotov-B55613 1f6644876e use stack from linker script when nosys 2017-08-14 10:18:14 +02:00
Yao Qi 32ca315312 Don't fetch command line options without semi-hosting
Nowadays, the code fetching command line options via semi-hosting are
unconditionally pulled in, so that the semi-hosting code is still
there even I compile with option --specs=nosys.specs.

gdb ./aarch64-none-elf/libgloss/aarch64/crt0.o

(gdb) disassemble _start

   0x0000000000000050 <+80>:	ldr	x1, 0x128 <_cpu_init_hook+48>
   0x0000000000000054 <+84>:	mov	w0, #0x15
   0x0000000000000058 <+88>:	hlt	#0xf000

This patch fixes this problem by wrapping the code by ARM_RDI_MONITOR.
When semi-hosting is not used, set command line options to NULL.
2017-08-09 17:43:09 +02:00
Tamar Christina 61ddc7a436 Fix crt0 overwriting.
On AArch64 we currently always link in crt0 regardless of if another
one is being provided by something else, like rdimon.a. This was never
an issue before as nosys was not supported on AArch64.

This updates the specs to supply a different crt0 when a semihosting
call is required.

Signed-off-by: Tamar Christina <tamar.christina@arm.com>
2017-08-09 14:50:13 +02:00
Tamar Christina cd26662dc5 Previous patch to support nosys.specs accidentally broke validation specs because ARM_RDI_MONITOR was never passed to the build rule for crt0.
This fixed the compile for nosys and validation specs
but nosys won't run because of existing limitations to
aarch64's syscalls.c, it requires semihosting to get
commandline arguments and heap info without having a
fallback method as ARM does.

Signed-off-by: Tamar Christina <tamar.christina@arm.com>
2017-07-21 10:41:37 +02:00
Tamar Christina bb12a1e587 Support building in a different directory than the default output directory by preserving DESTDIR value in recursive calls.
Signed-off-by: Tamar Christina <tamar.christina@arm.com>
2017-07-17 13:38:42 +02:00
Tamar Christina 13665a7c30 Fix link when nosys.specs is used to link
This patch fixes the issue where nosys.specs is used to link.
e.g. The use of crt0 without any support for semihosting requested.

The AArch64 crt0 was missing an #ifdef for the initialise_monitor_handles
which was causing the link to fail. Sorry for missing this before.
2017-07-14 10:36:32 +02:00
Tamar Christina 9eafa44d23 Replace the perl character classes with POSIX ones to fix the build when sed is a BSD sed instead of GNU.
Signed-off-by: Tamar Christina <tamar.christina@arm.com>
2017-07-06 18:05:56 +02:00
Tamar Christina ddb6f8a02a Add support for Semihosting v2 support for AArch64 in libgloss.
Semihosting v2 changes are documented here:
https://developer.arm.com/docs/100863/latest/

The biggest change is the addition of an extensions mechanism
to add more extensions in the future.

Signed-off-by: Tamar Christina <tamar.christina@arm.com>
2017-07-05 14:41:27 +02:00
Tamar Christina d7d6ad7b6b Add support for Semihosting v2 support for ARM in libgloss.
Semihosting v2 changes are documented here:
https://developer.arm.com/docs/100863/latest/

The biggest change is the addition of an extensions mechanism
to add more extensions in the future.

Signed-off-by: Tamar Christina <tamar.christina@arm.com>
2017-07-05 14:41:27 +02:00
Tamar Christina cc142edbe7 Add the needed build system changes in order to compile and create the new libraries for Semihosting v2 for ARM.
This uses the new recursive build target in multi-build.in

The new spec files are:

For AArch32/ARM (m for mixed mode):
  - rdimon-v2m.specs
  - aprofile-validation-v2m.specs
  - aprofile-ve-v2m.specs

These spec files will be using the new libraries generated
by multi-build.in.

Signed-off-by: Tamar Christina <tamar.christina@arm.com>
2017-07-05 14:41:27 +02:00
Tamar Christina bfa3bbcf33 Adds the needed build system changes in order to compile and create the new libraries for Semihosting v2.
This uses the new recursive build target in multi-build.in

For AArch64 no new spec files are needed but the makefiles
are modified to keep them in sync with the ARM ones.

Signed-off-by: Tamar Christina <tamar.christina@arm.com>
2017-07-05 14:41:27 +02:00
Tamar Christina ebd97f4c00 Create a recursive make target that is modeled after the existing multilib makefile config-ml.in which can be used to build the same files within a target multiple ways.
e.g. from the same source file produce multiple libs by varying the
options passed to the compiler.

Signed-off-by: Tamar Christina <tamar.christina@arm.com>
2017-07-05 14:41:27 +02:00
Claudiu Zissulescu 0d79b021a4 Add JLI support.
Initialize the jli_base registers for ARCv2 cpus.

libgloss/
2017-05-23  Claudiu Zissulescu  <claziss@synopsys.com>

	* arc/crt0.S: Initialize the jli_base registers for ARCv2 cpus.
2017-06-14 14:51:22 +02:00
Claudiu Zissulescu 8c8b25e388 Add profile support.
Add profile support for ARC processors.

libgloss/
2016-07-28  Claudiu Zissulescu  <claziss@synopsys.com>

	* arc/crt0.S: Add calls to profiler support routines.
	* Makefile.in (CRT0): Add gcrt0.
	(NSIM_OBJS): Add mcount.
	(CRT0_INSTALL): Install gcrt0, and crt0.
	* arc/gcrt0.S: New file.
	* arc/mcount.c: Likewise.
2017-06-14 14:51:20 +02:00
Martin Young 780503f6ac Fix thinko in MSP430 libgloss implementation of write() system call. 2017-05-26 11:35:13 +01:00
Laurent ALFONSI 9b1167219a ARM/AArch64: Fix GetCmdLine semihosting directives
When simulating arm code, the target program startup code (crt0) uses
semihosting invocations to get the command line from the simulator. The
simulator returns the command line and its size into the area passed in
parameter. (ARM 32-bit specifications :
http://infocenter.arm.com/help/topic/com.arm.doc.dui0058d/DUI0058.pdf
chapter "5.4.19 SYS_GET_CMDLINE").

The memory area pointed by the semihosting register argument is located
in .text section (usually not writtable (RX)).

If we run this code on a simulator that respects this rights properties
(qemu user-mode for instance), the command line will not be written to
the .text program memory, in particular the length of the string. The
program runs with an empty command line. This problem hasn't been seen
earlier probably because qemu user-mode is not so much used, but this can
happen with another simulator that refuse to write in a read-only segment.

With this modification, the command line can be correctly passed to the
target program.

Changes:
- libgloss/arm/crt0.S : Arguments passed to the AngelSWI_Reason_GetCmdLine
  semihosting invocation are placed into .data section instead of .text
- libgloss/aarch64/crt0.S : Idem for aarch64 AngelSVC_Reason_GetCmdLine
  semihosting.
2017-05-19 15:45:58 -04:00
Jozef Lawrynowicz 161b4ff037 Fix relocation type for _bsssize being R_MSP430X_ABS16 when large memory model is used 2017-04-19 15:04:31 +02:00
Carlos Santos 8ae6d8003a libgloss/arm: fix discovery of "eabihf" toolchains
ARM EABI toolchains can optionally use the "hf" suffix to identify
hardware floating point support. Use the "*-*-eabi*" pattern to match
these toolchains.

Original patch by Bryan Hundven for the Crosstool-NG project. Improved
by Alexey Neyman.

Signed-off-by: Carlos Santos <casantos@datacom.ind.br>
CC: Bryan Hundven <bryanhundven@gmail.com
CC: Alexey Neyman <stilor@att.net>
2017-04-18 12:24:42 +02:00
Thomas Preud'homme be5926babb Fix elf-nano.specs to work without -save-temps
The changes in af272aca59 only works when
using gcc/g++ with -E or -save-temps, otherwise newlib's newlib.h gets
used even if -specs=nano.specs is specified. This is because the driver
only use cpp_options spec for the external cpp tool, not for the
integrated one.

This patch uses instead cpp_unique_options which is used in all cases:
it is used directly when the integrated preprocessor is used, and
indirectly by expansion of cpp_options otherwise.
2017-02-15 16:31:16 +01:00
Thomas Preudhomme af272aca59 Fix cpp invocation for C++ in nano spec
Hi,

The changes in c028685518 to use
newlib-nano's include directory work for cc1 but not cc1plus. cc1plus
comes with its own cpp spec which does not have a name attached to it.

This patch uses the renaming trick on cpp_options instead of cpp, as
cpp_options is used both by cc1 and cc1plus.
2017-02-13 09:18:00 +01:00
Stafford Horne 135c0c8368 libgloss: Remove duplicate definition of environ
Environ is defined in libgloss and libc:
 - libgloss/or1k/syscalls.c
 - libc/stdlib/environ.c

When linking we sometimes get errors:
or1k-elf-g++ test.o -mnewlib -mboard=or1ksim -lm -o  test
/opt/shorne/software/or1k/lib/gcc/or1k-elf/5.3.0/../../../../or1k-elf/lib/libor1k.a(syscalls.o):(.data+0x0):
multiple definition of `environ'
/opt/shorne/software/or1k/lib/gcc/or1k-elf/5.3.0/../../../../or1k-elf/lib/libc.a(lib_a-environ.o):(.data+0x0):
first defined here
collect2: error: ld returned 1 exit status

This doesnt happen after the fix. Basic things build fine too.
2017-02-13 09:16:51 +01:00
Stafford Horne ff7b7b8945 libgloss: or1k: If available call the init for init_array
There was an issue revealed in gdb testing where C++ virtual tables
were not getting properly initialized.  This seems to be due to the
c++ global constructors moving from ctors to init_array.

This fix makes sure we call the proper method for initializing the
constructors in all places.
2017-02-13 09:16:51 +01:00
Olof Kindgren d1caad4393 or1k: Make open reentrant
or1k uses reentrant calls by default, but there was no open_r defined
which caused failure in C++/C code such as:

int main() { std::cout << "test\n";  return 0; }

or

int main() {open(".", 0);}
2017-02-13 09:16:51 +01:00
Hans-Peter Nilsson cd5e7e2d82 Committed, libgloss: hook up cris-elf to the initfini-array support.
After a binutils change "a while ago" (2015-12) to default to
--enable-initfini-array, i.e. to merge .ctors and .dtors into
.init_array and .fini_array, this is needed for cdtors to run at all.

Based on what goes on in arm/ and aarch64/.  Tested for cris-elf by
running the gcc testsuite.

By the way, the configure test doesn't detect this change, so the
HAVE_INITFINI_ARRAY ifdeffery is somewhat redundant.  Still, the
change is tested to be safe with older binutils too.

libgloss/
	* cris/crt0.S, cris/lcrt0.c: Include newlib.h.
	[HAVE_INITFINI_ARRAY] (_init): Define to __libc_init_array.
	[HAVE_INITFINI_ARRAY] (_fini): Ditto __libc_fini_array.
2017-01-29 21:23:32 +01:00
Thomas Preudhomme 3ce88693f5 Fix html build with makeinfo 5.2
HTML build fails with makeinfo 5.2 with the following error:

libgloss/doc/porting.texi:73: @menu seen before first @node
libgloss/doc/porting.texi:73: perhaps your @top node should be wrapped in
@ifnottex rather than @ifinfo?

Following the advice indeed solve the issue while still allowing pdf, dvi and
info builds to work.
2016-08-19 10:32:23 +02:00
Claudiu Zissulescu 1baa8bb843 arc: Add align keyword.
libgloss/
2016-06-28  Claudiu Zissulescu  <claziss@synopsys.com>

	* arc/crt0.S: Add align keyword.
2016-08-11 10:59:54 +02:00
Nick Clifton e6413b0a64 Add comment in the v850's crt0.S file noting that separate LMA and VMA addresses for data sections are not currently supported. 2016-05-26 12:08:47 +01:00
Anton Kolesov d1dcdb8886 arc: Have nops in _exit_halt only for ARCompact
ARCompact processors (ARC 600 and ARC 700) require three "nop"s after the
"flag 1" instruction. Later ARC processors do not have this requirement, so
it is possible to reduce size of "_exit_halt" for them.

libgloss/
2016-05-24  Anton Kolesov  <Anton.Kolesov@synopsys.com>

	* arc/crt0.S (_exit_halt): Insert nops only for ARCompact.
2016-05-25 12:15:51 +02:00
Anton Kolesov dd00a8e719 arc: Rework default exception handlers for ARC EM and HS
Initially crt0.S used a special function, declared as weak as a default
exception handler in interrupt vector table. To let user override individual
handlers, this function had multiple names - one for each IVT entry, which,
however, was terribly confusing for the debugger and user - because it
wasn't clear which symbol will be used as a function name in debugger.
Defining multiple separate functions - one for each handler, would resolve
the mess, but would increase code size of crt0.o.

To clean this up, this patch defines exception handlers as weak symbols as
well, but those are defined as just symbols, not functions, hence there
would be less confusion over what is what. At the same time, users still can
redefine exception handlers symbol by creating functions with respective
names.

libgloss/
2016-05-24  Anton Kolesov  <Anton.Kolesov@synopsys.com>

	* arc/crt0.S: Convert memory_error and friends to non-function
	  symbols.
2016-05-25 12:15:51 +02:00
Yaakov Selkowitz 6ac6e7c2bd libgloss/ft32: fix whitespace in Makefile
Signed-off-by: Yaakov Selkowitz <yselkowi@redhat.com>
2016-05-20 10:10:08 -05:00
Jeff Johnston d1d1378d13 Fix libgloss arc nsim specs file. 2016-05-11 12:45:55 -04:00
Jeff Johnston 3312579f44 Fix libgloss/arc/nano.specs file. 2016-05-06 15:56:46 -04:00
Jeff Johnston 5c968d849a Fix white-space in libgloss/arc/Makefile.in. 2016-05-05 12:02:29 -04:00
Jeff Johnston 11afe8f6b6 Fix support ARC processors without barrel-shifter
crt0.S for ARC used to use instruction "asr.f lp_count, r3, 2" for all cores
except ARC601. However instructions which shift more than 1 bit are
optional, so this crt0.S didn't worked for all ARC cores.

Luckily this is a shift just by 2 bits on all occassions, so fix is trivial
- use two single-bit shifts.

libgloss/ChangeLog

2016-04-29  Anton Kolesov  <anton.kolesov@synopsys.com>

        * arc/crt0.S: Fix support for processors without barrel-shifter.

Signed-off-by: Anton Kolesov <Anton.Kolesov@synopsys.com>
2016-05-02 12:04:40 -04:00
Jeff Johnston cd494f7038 Update crt0.S for ARC.
This is similar to commit 06537f05d4 to the
newlib for ARC.

GCC for ARC has been updated to provide consistent naming of preprocessor
definitions for different optional architecture features:

    * __ARC_BARREL_SHIFTER__ instead of __Xbarrel_shifter for
      -mbarrel-shifter
    * __ARCEM__ instead of __EM__ for ARC EM cores
    * __ARCHS__ instead of __HS__ for ARC HS cores
    * etc (not used in libgloss)

This patch updates crt0.S for ARC to use new definitions instead of a
deprecated ones. To ensure compatibility with older compiler new definitions
are also defined in crt0.S if needed, based on presence of deprecated
preprocessor definitions.

libgloss/ChangeLog

2016-04-29  Anton Kolesov  <Anton.Kolesov@synopsys.com>

        * arc/crt0.S: Use new GCC defines to detect processor features.
2016-05-02 11:58:47 -04:00
Jeff Johnston e90da68265 Add necessary infrastructure to support "nano" build of newlib.
ARC aproach to this feature is similiar to ARM's one here.

2016-04-29  Anton Kolesov  <anton.kolesov@synopsys.com>

        * arc/nano.specs: New file.
        * arc/Makefile.in: Support nano.specs.
        * arc/nsim.specs: Likewise.
2016-04-29 15:17:11 -04:00
David Hoover 5c9403eaf4 Fixed semihosting for ARM when heapinfo not provided by debugger. 2016-04-21 09:51:08 +02:00
Nick Clifton 9f664259f9 Fix typo in the name of the MSP430 attribute section of example MSP430 linker scripts. 2016-04-07 12:13:10 +01:00
Jiong Wang 18b47e05d3 Initializing TTBR0 to inner/outer WB
While running tests on internal systems, we identified an issue in the
startup code for newlib on AArch32 systems with Multiprocessor
Extensions to the architecture.

The issue is we were configuring page table flags to be Inner
cacheable/Outer non-cacheable, while for at least architectures with
Multiprocessor Extension, we'd configure it to Inner/Outer write-back, no
write-allocate, and cacheable.

The attached patch fixes this, and no regression on arm-none-eabi
bare-metal tests.

Adopted suggestion given by Richard offline to avoid using jump.

libgloss/
	* arm/cpu-init/rdimon-aem.S: Set TTBR0 to inner/outer
	cacheable WB, and no allocate on WB for arch with multiprocessor
	extension.
2016-03-26 12:45:07 +01:00
Stefan Roesch 414c8adc8b or1k: properly restore timer
Consider the function parameter for restoring the timer
2016-03-13 12:50:23 +01:00
Stefan Roesch 81ad4e656a or1k: Fix multicore stack calculation
Change the type of the stack pointers to enable pointer calculations at byte
granularity, which is needed for the calculation of _or1k_stack_core[c] and
_or1k_exception_stack_core[c] with _or1k_stack_size and
_or1k_exception_stack_size. (util.c:53-54)
2016-03-13 12:50:05 +01:00
Nick Clifton c86b2f8e93 Remove bogus LONG(0) directives from MSP430 linker scripts. 2016-03-10 10:41:13 +00:00
Nick Clifton 9676aeef0d Seperate MSP430 cio syscalls into individual function sections.
START_FUNC: New macro.
    END_FUNC: New macro.
    exit, isatty, getpid, sc2: Use the new macros.
2016-02-09 13:44:05 +00:00
Thomas Preud'homme 69f4c40291 Make macro checks ARMv8-M baseline proof
libgloss:

        * arm/Makefile.in: Add newlib/libc/machine/arm to the include path if
        newlib is present.
        * arm/arm.h: Include acle-compat.h.
        (THUMB_V7_V6M): Rename to ...
        (PREFER_THUMB): This.  Use ACLE macros __ARM_ARCH_ISA_ARM instead of
        __ARM_ARCH_6M__ to decide whether to define it.
        (THUMB1_ONLY): Define for Thumb-1 only targets.
        (THUMB_V7M_V6M): Rename to ...
        (THUMB_VXM): This.  Defined based on __ARM_ARCH_ISA_ARM, excluding
        ARMv7.
        * arm/crt0.S: Use THUMB1_ONLY rather than __ARM_ARCH_6M__,
        !__ARM_ARCH_ISA_ARM rather than THUMB_V7M_V6M for fp enabling, and
        PREFER_THUMB rather than THUMB_V7_V6M.  Rename other occurences of
        THUMB_V7M_V6M to THUMB_VXM.
        * arm/linux-crt0.c: Likewise.
        * arm/redboot-crt0.S: Likewise.
        * arm/swi.h: Likewise.
        * arm/trap.S: Likewise.

newlib:

        * libc/machine/arm/memcpy-stub.c: Use ACLE macros __ARM_ARCH_ISA_THUMB
        and __ARM_ARCH_ISA_ARM to check for Thumb-2 only targets rather than
        __ARM_ARCH and __ARM_ARCH_PROFILE.
        * libc/machine/arm/memcpy.S: Likewise.
        * libc/machine/arm/setjmp.S: Likewise for Thumb-1 only target and
        include acle-compat.h.
        * libc/machine/arm/strcmp.S: Likewise for Thumb-1 and Thumb-2 only
        target and include acle-compat.h.
        * libc/sys/arm/arm.h: Include acle-compat.h.
        (THUMB_V7_V6M): Rename to ...
        (PREFER_THUMB): This.  Use ACLE macro __ARM_ARCH_ISA_ARM instead of
        __ARM_ARCH_6M__ to decide whether to define it.
        (THUMB1_ONLY): Define for Thumb-1 only targets.
        (THUMB_V7M_V6M): Rename to ...
        (THUMB_VXM): This.  Defined based on __ARM_ARCH_ISA_ARM, excluding
        ARMv7.
        * libc/sys/arm/crt0.S: Use PREFER_THUMB rather than THUMB_V7_V6M and
        rename THUMB_V7M_V6M into THUMB_VXM.
        * libc/sys/arm/swi.h: Likewise.
2016-01-28 11:26:37 +01:00
Corinna Vinschen 0b42ea7960 Deprecate newlib and winsup ChangeLog files
Signed-off-by: Corinna Vinschen <corinna@vinschen.de>
2016-01-28 11:15:33 +01:00
DJ Delorie 7d5b16ab9a Build msp430-specific libnosys
The MSP430 debuggers support I/O on hardware through CIO, so
we can use a CIO-enabled library as the "nosys" library (in
addition to the libsim library, which talks to our simulator)

* configure.in: Don't build default libnosys for msp430
* configure: Regenerate.
* msp430/Makefile: Rename libcio to libnosys.
2015-12-17 16:51:41 -05:00
DJ Delorie 28d7af216e Update CIO hooks to be more flexible.
Replace the one hook we had with two to avoid underscore issues.

* msp430/cio.c: Remove, replace with...
* msp430/cio.S: New, this.
2015-12-17 16:22:52 -05:00
Kevin Buettner 725532a3b2 rl78: Don't output CR when LF is encountered in write().
The file libgloss/rl78/write.c currently contains code which outputs
\r when \n is seen.  The code will then output the \n as well.

This patch removes the bit of code that tests for \n and then outputs
\r.

I made this change to fix some failures in gdb.base/call-ar-st.exp.  In
that test, I see two carriage returns followed by a newline.  One CR is
output by the libgloss code.  The other is output by the terminal driver.

The total list of failures fixed (using the default rl78 multilib) are:

FAIL: gdb.base/call-ar-st.exp: print print_double_array(double_array) (timeout)
FAIL: gdb.base/call-ar-st.exp: print print_char_array(char_array) (timeout)
FAIL: gdb.base/call-ar-st.exp: continue to tbreak2 (timeout)
FAIL: gdb.base/call-ar-st.exp: continuing to tbreak3 (timeout)
FAIL: gdb.base/call-ar-st.exp: print print_double_array(array_d) (timeout)
FAIL: gdb.base/call-ar-st.exp: continuing to tbreak4 (timeout)
FAIL: gdb.base/call-ar-st.exp: print sum_array_print(10, *list1, *list2, *list3, *list4) (timeout)
FAIL: gdb.base/call-ar-st.exp: print print_small_structs (timeout)
FAIL: gdb.base/call-ar-st.exp: print print_ten_doubles(123.456, 123.456, -0.12, -1.23, 343434.8, 89.098, 3.14, -5678.12345, -0.11111111, 216.97065) (timeout)
FAIL: gdb.base/call-ar-st.exp: print print_small_structs from print_long_arg_list (timeout)
FAIL: gdb.base/call-ar-st.exp: print print_struct_rep(*struct1, *struct2, *struct3) (timeout)
FAIL: gdb.base/dprintf.exp: call: printf: 1st dprintf (timeout)
FAIL: gdb.base/dprintf.exp: call: printf: 2nd dprintf (timeout)
FAIL: gdb.base/interrupt.exp: process is alive (the program exited)

There are no regressions.

libgloss/ChangeLog:

	* rl78/write.c (_write): Don't output CR when LF is encountered.
2015-12-16 13:38:38 -07:00
Nick Clifton 3ff65caea5 Always define __high_bsssize, do not just PROVIDE it.
* msp430/msp430xl-sim.ld (__high_bsssize): Define.
2015-12-04 10:14:10 +00:00
Nick Clifton c70d8f454a Fix initialisation of .upper.bss for the MSP430.
* msp430/msp430xl-sim.ld (__high_bsssize): Define.
2015-11-23 09:00:23 +00:00
Anton Kolesov acdfcb0a0a Add support for ARC to libgloss
ChangeLog:
2015-11-12  Anton Kolesov  <Anton.Kolesov@synopsys.com>

	* configure.in: Add ARC support to libgloss.
	* configure: Regenerate.

libgloss/ChangeLog:
2015-11-12  Anton Kolesov  <Anton.Kolesov@synopsys.com>

	* configure: Add ARC support.
	* configure.in: Likewise.
	* arc/Makefile.in: Likewise.
	* arc/aclocal.m4: Likewise.
	* arc/configure: Likewise.
	* arc/configure.in: Likewise.
	* arc/crt0.S: Likewise.
	* arc/libcfunc.c: Likewise.
	* arc/nsim-syscall.h: Likewise.
	* arc/nsim-syscalls.c: Likewise.
	* arc/nsim.specs: Likewise.
	* arc/sbrk.c: Likewise.
2015-11-12 14:11:47 +01:00
DJ Delorie 9e8f756124 * rl78/crt0.S (_start): Fixed code that clears .bss 2015-10-20 21:37:06 -04:00
Nick Clifton 3b8933900f Add support for persistent data to the MSP430 linker scripts.
* msp430/msp430-sim.ld: Add .persistent section.
	Tidy up section layout.
	Start RAM above hardware multiply registers.
	* msp430/msp430xl-sim.ld: Likewise.
2015-10-06 17:33:16 +01:00
Jeff Johnston dc09f27aaa Add support for FT32 platform. 2015-09-04 13:13:30 -04:00
Nick Clifton 9eb50ea21b oops - forgot to add PR number to ChangeLog entry. 2015-08-24 10:05:19 +01:00
Nick Clifton 23066e1b64 * msp430/crt0.S: Remove watchdog disabling code. 2015-08-20 17:19:49 +01:00
Jeff Johnston 30c6a3088b or1k: Typo fixes
Wrong paranthesis and an incorrect symbol name are fixed.

          * or1k/boards/optimsoc.S: Fix symbol name
          * or1k/crt0.S: Remove paranthesis
2015-08-07 15:02:03 -04:00
Jeff Johnston 31cf34f849 or1k: Allow exception nesting
Allow exceptions to be nested, which is especially useful with urgent
    interrupts while processing an exception.

    The implementation counts up the nesting level with each call to an
    exception. In the outer exception (level 1), the exception stack is
    started. All nested exceptions just reserve the redzone (scratch
    memory that may be used by compiler) and exception context on the
    stack, but then process on the same scratch.

    Restriction: Impure pointers are shared among all exceptions. This may
    be solved by creating an impure data structure in the stack frame with
    each nested exception.

       * or1k/crt0.S: Add exception nesting
       * or1k/exceptions-asm.S: ditto
       * or1k/util.c: ditto
2015-08-07 15:02:03 -04:00
Jeff Johnston 0d04c03829 or1k: Make heap end globally visible
Boards may change the initial value from _end to another value.

           * or1k/sbrk.c: Make heap end globally visible
2015-08-07 15:01:50 -04:00
Nick Clifton 9698cc0f33 This is part of a larger fix for RL78 complex relocs - they need an absolute symbol at address 0 that is not part of the *ABS* section.
* rl78/rl78-sim.ld: Provide a value for __rl78_abs__.
	* rl78/rl78.ld: Likewise.
2015-08-04 13:38:27 +01:00
Andre Simoes Dias Vieira c028685518 Change to nano.specs to add nano's include dir
Signed-off-by: Corinna Vinschen <corinna@vinschen.de>
2015-07-14 15:55:18 +02:00
Jeff Johnston bb5cb3afb5 or1k: Add missing initialization of impure ptr
* or1k/impure.c: Fix initialization of impure ptr
2015-05-27 13:30:20 +02:00
Jeff Johnston 5eb4a1666d or1k: set heap start for optimsoc-gzll
- With the gzll kernel we have two different loading options:

  - If the image is loaded to the global memory, the bootstrapping
    loads the kernel to local memory. Applications are loaded on
    demand. The heap then starts right after bss.

  - If the image is pre-loaded to the local memory it includes the
    application binaries right after bss. The heap then starts after
    the application objects.

- We can check if this is a gzll kernel as it has the string "gzll" at
  0x2000. At 0x200c we then find the end of the application objects in
  the image. If there is no global memory we set _or1k_heap_start to
  this value.

    * or1k/boards/optimsoc.S: Heap for gzll kernel
2015-05-27 13:30:20 +02:00
Jeff Johnston 58efeedd16 or1k: Make heap start configurable
- Previously the heap started right after the bss section. This can now
  be configured by changing the _or1k_heap_start symbol that defaults to
  the old value (&end). In board_init_early, we can now set this to
  another value.

    * or1k/sbrk.c: Allow for different heap start
2015-05-27 13:30:20 +02:00
Jeff Johnston aa26b78462 or1k: UART also accept timeout interrupt
- The UART interrupt only handled receiver FIFO full interrupts, but we
  also want to handle timeout interrupts.

    * or1k/or1k_uart.c: Fix interrupts
2015-05-27 13:30:20 +02:00
Jeff Johnston 58e5719a0e Bug fix in timer for or1k
- Properly set the interrupt pending flag in the timer mode register.

    * or1k/timer.c: Properly set interrupt flags
2015-05-27 13:30:20 +02:00
Jeff Johnston b46d3b5536 Store entire context for or1k
- Store the exception program counter (from EPCR) and exception status
  register (from ESR) also during the exception. A runtime system may
  replace them thereby to implement a thread switch.

    * or1k/exception-asm.S: Store missing state
2015-05-27 13:30:20 +02:00
Jeff Johnston a6342974b0 Fix exception stack frame for or1k
- We do not need a red zone here, as we do not operate on the current
  stack, but always use the clear exception stack. Also reserve two
  extra words for the context to store EPCR and ESR.

    * or1k/crt0.S: Fix exception stack frame
    * or1k/exception-asm.S: ditto
2015-05-27 13:30:19 +02:00
Jeff Johnston 132030fcf2 Fix interrupt handling for or1k.
- During interrupt handling the PICSR, table pointers and current
  interrupt line have been saved in incorrect registers and/or stored on
  the stack.

- Save the pointer in r16/r18, PICSR in r20 and the current interrupt
  line in r22. Those are callee-saved registers, so that the register
  values will be preserved.

        * or1k/interruts-asm.S: Change registers to callee-saved.
2015-05-27 13:30:19 +02:00
Nick Clifton 324bd11706 Add a check that the data area does not overrun the stack.
* msp430/msp430-sim.ld (.stack): Add an assertion to make sure
	that the data area does not overrun the stack.  PROVIDE a new
	symbol __stack_size to allow the user to set the limit.
	* msp430/msp430xl-sim.ld (.stack): Likewise.
	* rl78/rl78-sim.ld (.stack): Likewise.
	* rl78/rl78.ld (.stack): Likewise.
	* rx/rx-sim.ld (.stack): Likewise.
	* rx/rx.ld (.stack): Likewise.
2015-05-27 13:30:19 +02:00
Nick Clifton baa681fd38 Adds support for placing MSP430 code and data into either low memory or high memory.
* msp430/msp430.ld: Delete.
	* msp430/msp430F5438A-l.ld: Delete.
	* msp430/msp430F5438A-s.ld: Delete.
	* msp430/crt_movedata.S: Delete.

	* msp430/Makefile.in (SCRIPTS): Remove msp430.ld.
	(CRT_OBJS): Add crt_move_highdata.o.
	* msp430/memmodel.h (START_CRT_FUNC): New macro.
	(END_CRT_FUNC): New macro.
	(WEAK_DEF): New macro.
	* msp430/crt0.S: Use new macros.
	(move_highdata): New code to initialise the .data section if it is
	held in high memory.

	* msp430/msp430-sim.ld (.data): Add .either.data.
	(.rodata2): Move some read-only data sections here.
	(.text): Add .either.text.
	(.rodata): Add .either.rodata.
	(.bss): Add .either.bss.
	* msp430/msp430xl-sim.ld (MEMORY): Add HIROM.
	(.rodata2): Move some read-only data sections here.
	(.upper.data): New section.  Include notes about how to initialise
	it.
2015-05-27 13:30:19 +02:00
Mike Frysinger e6101f3008 libgloss: mcore: add custom syscall header
The mcore simulator has a unique set of syscall numbers.  Add a header
that matches reality since the common one doesn't.
2015-04-23 22:03:45 +02:00
Mike Frysinger 6803327326 libgloss: arm: fix copy & paste in syscall.h
This header was clearly copied from the common syscall.h and customized,
but the header comment is no longer accurate -- this isn't the general
file anymore.
2015-04-23 22:03:45 +02:00
Nick Clifton cd0d459135 For the RX port, avoid using string instructions when __RX_DISALLOW_STRING_INSNS__ is defined.
* rx/crt0.S (_start): If string instructions are not allowed,
	avoid using SMOVF.

	* libc/machine/rx/memchr.S: Add non-string insn using version.
	* libc/machine/rx/memcpy.S: Likewise.
	* libc/machine/rx/memmove.S: Likewise.
	* libc/machine/rx/mempcpy.S: Likewise.
	* libc/machine/rx/strcat.S: Likewise.
	* libc/machine/rx/strcmp.S: Likewise.
	* libc/machine/rx/strcpy.S: Likewise.
	* libc/machine/rx/strlen.S: Likewise.
	* libc/machine/rx/strncat.S: Likewise.
	* libc/machine/rx/strncmp.S: Likewise.
	* libc/machine/rx/strncpy.S: Likewise.
2015-04-23 21:57:13 +02:00
Nick Clifton 45d0b17928 Add .note and DWARF3 sections to RX linker scripts.
* rx/rx.ld: Add .note and DWARF3 sections.
	* rx/rx-sim.ld: Likewise.
2015-04-23 21:57:13 +02:00
Nick Clifton 61a2d9dedb Always include the .csstart section in RL78 executables.
* rl78/rl78.ld (.csstart): Add a KEEP directive.
	* rl78/rl78-sim.ld (.csstart): Add a KEEP directive.
2015-04-23 21:57:12 +02:00
Nick Clifton e185d3febe * v850/sim.ld: Add a .note.renesas section. 2015-03-05 11:26:59 +00:00
Corinna Vinschen 8d98f956cc * arm/crt0.S: Initialise __heap_limit when ARM_RDI_MONITOR is defined.
* arm/syscalls.c: define __heap_limit global symbol.
	* arm/syscalls.c (_sbrk): Honour __heap_limit.
2015-02-17 09:30:52 +00:00