2003-01-07 Chris Demetriou <cgd@broadcom.com>
* mips.h: Fix missing space in comment. (INSN_ISA1, INSN_ISA2, INSN_ISA3, INSN_ISA4, INSN_ISA5) (INSN_ISA32, INSN_ISA32R2, INSN_ISA64): Shift values right by four bits.
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@ -1,3 +1,10 @@
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2003-01-07 Chris Demetriou <cgd@broadcom.com>
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* mips.h: Fix missing space in comment.
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(INSN_ISA1, INSN_ISA2, INSN_ISA3, INSN_ISA4, INSN_ISA5)
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(INSN_ISA32, INSN_ISA32R2, INSN_ISA64): Shift values right
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by four bits.
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2003-01-02 Chris Demetriou <cgd@broadcom.com>
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* mips.h: Update copyright years to include 2002 (which had
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@ -373,18 +373,18 @@ struct mips_opcode
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/* Masks used to mark instructions to indicate which MIPS ISA level
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they were introduced in. ISAs, as defined below, are logical
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ORs of these bits, indicatingthat they support the instructions
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ORs of these bits, indicating that they support the instructions
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defined at the given level. */
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#define INSN_ISA_MASK 0x00000fff
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#define INSN_ISA1 0x00000010
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#define INSN_ISA2 0x00000020
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#define INSN_ISA3 0x00000040
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#define INSN_ISA4 0x00000080
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#define INSN_ISA5 0x00000100
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#define INSN_ISA32 0x00000200
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#define INSN_ISA64 0x00000400
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#define INSN_ISA32R2 0x00000800
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#define INSN_ISA1 0x00000001
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#define INSN_ISA2 0x00000002
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#define INSN_ISA3 0x00000004
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#define INSN_ISA4 0x00000008
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#define INSN_ISA5 0x00000010
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#define INSN_ISA32 0x00000020
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#define INSN_ISA64 0x00000040
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#define INSN_ISA32R2 0x00000080
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/* Masks used for MIPS-defined ASEs. */
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#define INSN_ASE_MASK 0x0000f000
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