Add AMD athlon support to x86 assembler and disassembler.
This commit is contained in:
Alan Modra
parent
d0c72719e5
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e5af6ca113
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@ -1,3 +1,9 @@
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1999-08-21 Alan Modra <alan@spri.levels.unisa.edu.au>
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* i386.h: Add AMD athlon instructions, pfnacc, pfpnacc, pswapd.
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Document pf2iw and pi2fw as athlon insns. Remove pswapw.
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Alphabetically sort PIII insns.
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Wed Aug 18 18:14:40 1999 Doug Evans <devans@canuck.cygnus.com>
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* cgen.h (CGEN_INSN_MACH_HAS_P): New macro.
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@ -917,36 +917,35 @@ static const template i386_optab[] = {
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{"addss", 2, 0xf30f58, X, FP|Modrm, { RegXMM|WordMem, RegXMM, 0 } },
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{"andnps", 2, 0x0f55, X, FP|Modrm, { RegXMM|LLongMem, RegXMM, 0 } },
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{"andps", 2, 0x0f54, X, FP|Modrm, { RegXMM|WordMem, RegXMM, 0 } },
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{"cmpps", 3, 0x0fc2, X, FP|Modrm, { Imm8, RegXMM|LLongMem, RegXMM } },
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{"cmpss", 3, 0xf30fc2, X, FP|Modrm, { Imm8, RegXMM|WordMem, RegXMM } },
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{"cmpeqps", 2, 0x0fc2, 0, FP|Modrm|ImmExt, { RegXMM|LLongMem, RegXMM, 0 } },
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{"cmpeqss", 2, 0xf30fc2, 0, FP|Modrm|ImmExt, { RegXMM|WordMem, RegXMM, 0 } },
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{"cmpltps", 2, 0x0fc2, 1, FP|Modrm|ImmExt, { RegXMM|LLongMem, RegXMM, 0 } },
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{"cmpltss", 2, 0xf30fc2, 1, FP|Modrm|ImmExt, { RegXMM|WordMem, RegXMM, 0 } },
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{"cmpleps", 2, 0x0fc2, 2, FP|Modrm|ImmExt, { RegXMM|LLongMem, RegXMM, 0 } },
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{"cmpless", 2, 0xf30fc2, 2, FP|Modrm|ImmExt, { RegXMM|WordMem, RegXMM, 0 } },
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{"cmpunordps",2, 0x0fc2, 3, FP|Modrm|ImmExt, { RegXMM|LLongMem, RegXMM, 0 } },
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{"cmpunordss",2, 0xf30fc2, 3, FP|Modrm|ImmExt, { RegXMM|WordMem, RegXMM, 0 } },
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{"cmpltps", 2, 0x0fc2, 1, FP|Modrm|ImmExt, { RegXMM|LLongMem, RegXMM, 0 } },
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{"cmpltss", 2, 0xf30fc2, 1, FP|Modrm|ImmExt, { RegXMM|WordMem, RegXMM, 0 } },
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{"cmpneqps", 2, 0x0fc2, 4, FP|Modrm|ImmExt, { RegXMM|LLongMem, RegXMM, 0 } },
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{"cmpneqss", 2, 0xf30fc2, 4, FP|Modrm|ImmExt, { RegXMM|WordMem, RegXMM, 0 } },
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{"cmpnltps", 2, 0x0fc2, 5, FP|Modrm|ImmExt, { RegXMM|LLongMem, RegXMM, 0 } },
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{"cmpnltss", 2, 0xf30fc2, 5, FP|Modrm|ImmExt, { RegXMM|WordMem, RegXMM, 0 } },
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{"cmpnleps", 2, 0x0fc2, 6, FP|Modrm|ImmExt, { RegXMM|LLongMem, RegXMM, 0 } },
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{"cmpnless", 2, 0xf30fc2, 6, FP|Modrm|ImmExt, { RegXMM|WordMem, RegXMM, 0 } },
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{"cmpnltps", 2, 0x0fc2, 5, FP|Modrm|ImmExt, { RegXMM|LLongMem, RegXMM, 0 } },
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{"cmpnltss", 2, 0xf30fc2, 5, FP|Modrm|ImmExt, { RegXMM|WordMem, RegXMM, 0 } },
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{"cmpordps", 2, 0x0fc2, 7, FP|Modrm|ImmExt, { RegXMM|LLongMem, RegXMM, 0 } },
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{"cmpordss", 2, 0xf30fc2, 7, FP|Modrm|ImmExt, { RegXMM|WordMem, RegXMM, 0 } },
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{"cmpunordps",2, 0x0fc2, 3, FP|Modrm|ImmExt, { RegXMM|LLongMem, RegXMM, 0 } },
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{"cmpunordss",2, 0xf30fc2, 3, FP|Modrm|ImmExt, { RegXMM|WordMem, RegXMM, 0 } },
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{"cmpps", 3, 0x0fc2, X, FP|Modrm, { Imm8, RegXMM|LLongMem, RegXMM } },
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{"cmpss", 3, 0xf30fc2, X, FP|Modrm, { Imm8, RegXMM|WordMem, RegXMM } },
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{"comiss", 2, 0x0f2f, X, FP|Modrm, { RegXMM|WordMem, RegXMM, 0 } },
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{"cvtpi2ps", 2, 0x0f2a, X, FP|Modrm, { RegMMX|LLongMem, RegXMM, 0 } },
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{"cvtsi2ss", 2, 0xf30f2a, X, FP|Modrm, { Reg32|WordMem, RegXMM, 0 } },
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{"cvtps2pi", 2, 0x0f2d, X, FP|Modrm, { RegXMM|LLongMem, RegMMX, 0 } },
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{"cvtsi2ss", 2, 0xf30f2a, X, FP|Modrm, { Reg32|WordMem, RegXMM, 0 } },
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{"cvtss2si", 2, 0xf30f2d, X, FP|Modrm, { RegXMM|WordMem, Reg32, 0 } },
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{"cvttps2pi", 2, 0x0f2c, X, FP|Modrm, { RegXMM|LLongMem, RegMMX, 0 } },
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{"cvttss2si", 2, 0xf30f2c, X, FP|Modrm, { RegXMM|WordMem, Reg32, 0 } },
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{"divps", 2, 0x0f5e, X, FP|Modrm, { RegXMM|LLongMem, RegXMM, 0 } },
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{"divss", 2, 0xf30f5e, X, FP|Modrm, { RegXMM|WordMem, RegXMM, 0 } },
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{"ldmxcsr", 1, 0x0fae, 2, FP|Modrm, { WordMem, 0, 0 } },
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{"stmxcsr", 1, 0x0fae, 3, FP|Modrm, { WordMem, 0, 0 } },
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{"sfence", 0, 0x0faef8, X, FP, { 0, 0, 0 } },
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{"maskmovq", 2, 0x0ff7, X, FP|Modrm, { RegMMX|InvMem, RegMMX, 0 } },
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{"maxps", 2, 0x0f5f, X, FP|Modrm, { RegXMM|LLongMem, RegXMM, 0 } },
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{"maxss", 2, 0xf30f5f, X, FP|Modrm, { RegXMM|WordMem, RegXMM, 0 } },
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{"minps", 2, 0x0f5d, X, FP|Modrm, { RegXMM|LLongMem, RegXMM, 0 } },
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@ -960,26 +959,15 @@ static const template i386_optab[] = {
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{"movlps", 2, 0x0f12, X, FP|Modrm, { LLongMem, RegXMM, 0 } },
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{"movlps", 2, 0x0f13, X, FP|Modrm, { RegXMM, LLongMem, 0 } },
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{"movmskps", 2, 0x0f50, X, FP|Modrm, { RegXMM|InvMem, Reg32, 0 } },
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{"movups", 2, 0x0f10, X, FP|Modrm, { RegXMM|LLongMem, RegXMM, 0 } },
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{"movups", 2, 0x0f11, X, FP|Modrm, { RegXMM, RegXMM|LLongMem, 0 } },
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{"movntps", 2, 0x0f2b, X, FP|Modrm, { RegXMM, LLongMem, 0 } },
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{"movntq", 2, 0x0fe7, X, FP|Modrm, { RegMMX, LLongMem, 0 } },
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{"movss", 2, 0xf30f10, X, FP|Modrm, { RegXMM|WordMem, RegXMM, 0 } },
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{"movss", 2, 0xf30f11, X, FP|Modrm, { RegXMM, RegXMM|WordMem, 0 } },
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{"movups", 2, 0x0f10, X, FP|Modrm, { RegXMM|LLongMem, RegXMM, 0 } },
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{"movups", 2, 0x0f11, X, FP|Modrm, { RegXMM, RegXMM|LLongMem, 0 } },
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{"mulps", 2, 0x0f59, X, FP|Modrm, { RegXMM|LLongMem, RegXMM, 0 } },
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{"mulss", 2, 0xf30f59, X, FP|Modrm, { RegXMM|WordMem, RegXMM, 0 } },
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{"orps", 2, 0x0f56, X, FP|Modrm, { RegXMM|LLongMem, RegXMM, 0 } },
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{"rcpps", 2, 0x0f53, X, FP|Modrm, { RegXMM|LLongMem, RegXMM, 0 } },
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{"rcpss", 2, 0xf30f53, X, FP|Modrm, { RegXMM|WordMem, RegXMM, 0 } },
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{"rsqrtps", 2, 0x0f52, X, FP|Modrm, { RegXMM|LLongMem, RegXMM, 0 } },
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{"rsqrtss", 2, 0xf30f52, X, FP|Modrm, { RegXMM|WordMem, RegXMM, 0 } },
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{"shufps", 3, 0x0fc6, X, FP|Modrm, { Imm8, RegXMM|LLongMem, RegXMM } },
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{"sqrtps", 2, 0x0f51, X, FP|Modrm, { RegXMM|LLongMem, RegXMM, 0 } },
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{"sqrtss", 2, 0xf30f51, X, FP|Modrm, { RegXMM|WordMem, RegXMM, 0 } },
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{"subps", 2, 0x0f5c, X, FP|Modrm, { RegXMM|LLongMem, RegXMM, 0 } },
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{"subss", 2, 0xf30f5c, X, FP|Modrm, { RegXMM|WordMem, RegXMM, 0 } },
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{"ucomiss", 2, 0x0f2e, X, FP|Modrm, { RegXMM|WordMem, RegXMM, 0 } },
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{"unpckhps", 2, 0x0f15, X, FP|Modrm, { RegXMM|LLongMem, RegXMM, 0 } },
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{"unpcklps", 2, 0x0f14, X, FP|Modrm, { RegXMM|LLongMem, RegXMM, 0 } },
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{"xorps", 2, 0x0f57, X, FP|Modrm, { RegXMM|LLongMem, RegXMM, 0 } },
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{"pavgb", 2, 0x0fe0, X, FP|Modrm, { RegMMX|LLongMem, RegMMX, 0 } },
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{"pavgw", 2, 0x0fe3, X, FP|Modrm, { RegMMX|LLongMem, RegMMX, 0 } },
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{"pextrw", 3, 0x0fc5, X, FP|Modrm, { Imm8, RegMMX, Reg32|InvMem } },
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@ -990,15 +978,27 @@ static const template i386_optab[] = {
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{"pminub", 2, 0x0fda, X, FP|Modrm, { RegMMX|LLongMem, RegMMX, 0 } },
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{"pmovmskb", 2, 0x0fd7, X, FP|Modrm, { RegMMX, Reg32|InvMem, 0 } },
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{"pmulhuw", 2, 0x0fe4, X, FP|Modrm, { RegMMX|LLongMem, RegMMX, 0 } },
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{"psadbw", 2, 0x0ff6, X, FP|Modrm, { RegMMX|LLongMem, RegMMX, 0 } },
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{"pshufw", 3, 0x0f70, X, FP|Modrm, { Imm8, RegMMX|LLongMem, RegMMX } },
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{"maskmovq", 2, 0x0ff7, X, FP|Modrm, { RegMMX|InvMem, RegMMX, 0 } },
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{"movntps", 2, 0x0f2b, X, FP|Modrm, { RegXMM, LLongMem, 0 } },
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{"movntq", 2, 0x0fe7, X, FP|Modrm, { RegMMX, LLongMem, 0 } },
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{"prefetchnta", 1, 0x0f18, 0, FP|Modrm, { LLongMem, 0, 0 } },
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{"prefetcht0", 1, 0x0f18, 1, FP|Modrm, { LLongMem, 0, 0 } },
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{"prefetcht1", 1, 0x0f18, 2, FP|Modrm, { LLongMem, 0, 0 } },
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{"prefetcht2", 1, 0x0f18, 3, FP|Modrm, { LLongMem, 0, 0 } },
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{"psadbw", 2, 0x0ff6, X, FP|Modrm, { RegMMX|LLongMem, RegMMX, 0 } },
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{"pshufw", 3, 0x0f70, X, FP|Modrm, { Imm8, RegMMX|LLongMem, RegMMX } },
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{"rcpps", 2, 0x0f53, X, FP|Modrm, { RegXMM|LLongMem, RegXMM, 0 } },
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{"rcpss", 2, 0xf30f53, X, FP|Modrm, { RegXMM|WordMem, RegXMM, 0 } },
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{"rsqrtps", 2, 0x0f52, X, FP|Modrm, { RegXMM|LLongMem, RegXMM, 0 } },
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{"rsqrtss", 2, 0xf30f52, X, FP|Modrm, { RegXMM|WordMem, RegXMM, 0 } },
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{"sfence", 0, 0x0faef8, X, FP, { 0, 0, 0 } },
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{"shufps", 3, 0x0fc6, X, FP|Modrm, { Imm8, RegXMM|LLongMem, RegXMM } },
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{"sqrtps", 2, 0x0f51, X, FP|Modrm, { RegXMM|LLongMem, RegXMM, 0 } },
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{"sqrtss", 2, 0xf30f51, X, FP|Modrm, { RegXMM|WordMem, RegXMM, 0 } },
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{"stmxcsr", 1, 0x0fae, 3, FP|Modrm, { WordMem, 0, 0 } },
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{"subps", 2, 0x0f5c, X, FP|Modrm, { RegXMM|LLongMem, RegXMM, 0 } },
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{"subss", 2, 0xf30f5c, X, FP|Modrm, { RegXMM|WordMem, RegXMM, 0 } },
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{"ucomiss", 2, 0x0f2e, X, FP|Modrm, { RegXMM|WordMem, RegXMM, 0 } },
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{"unpckhps", 2, 0x0f15, X, FP|Modrm, { RegXMM|LLongMem, RegXMM, 0 } },
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{"unpcklps", 2, 0x0f14, X, FP|Modrm, { RegXMM|LLongMem, RegXMM, 0 } },
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{"xorps", 2, 0x0f57, X, FP|Modrm, { RegXMM|LLongMem, RegXMM, 0 } },
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/* AMD 3DNow! instructions */
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@ -1007,7 +1007,7 @@ static const template i386_optab[] = {
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{"femms", 0, 0x0f0e, X, FP, { 0, 0, 0 } },
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{"pavgusb", 2, 0x0f0f, 0xbf, FP|Modrm|ImmExt, { RegMMX|LongMem, RegMMX, 0 } },
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{"pf2id", 2, 0x0f0f, 0x1d, FP|Modrm|ImmExt, { RegMMX|LongMem, RegMMX, 0 } },
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{"pf2iw", 2, 0x0f0f, 0x1c, FP|Modrm|ImmExt, { RegMMX|LongMem, RegMMX, 0 } }, /* Unofficial! See http://www.x86.org/articles/3dnow/amd_3dnow.html */
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{"pf2iw", 2, 0x0f0f, 0x1c, FP|Modrm|ImmExt, { RegMMX|LongMem, RegMMX, 0 } }, /* Athlon */
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{"pfacc", 2, 0x0f0f, 0xae, FP|Modrm|ImmExt, { RegMMX|LongMem, RegMMX, 0 } },
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{"pfadd", 2, 0x0f0f, 0x9e, FP|Modrm|ImmExt, { RegMMX|LongMem, RegMMX, 0 } },
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{"pfcmpeq", 2, 0x0f0f, 0xb0, FP|Modrm|ImmExt, { RegMMX|LongMem, RegMMX, 0 } },
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@ -1016,6 +1016,8 @@ static const template i386_optab[] = {
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{"pfmax", 2, 0x0f0f, 0xa4, FP|Modrm|ImmExt, { RegMMX|LongMem, RegMMX, 0 } },
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{"pfmin", 2, 0x0f0f, 0x94, FP|Modrm|ImmExt, { RegMMX|LongMem, RegMMX, 0 } },
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{"pfmul", 2, 0x0f0f, 0xb4, FP|Modrm|ImmExt, { RegMMX|LongMem, RegMMX, 0 } },
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{"pfnacc", 2, 0x0f0f, 0x8a, FP|Modrm|ImmExt, { RegMMX|LongMem, RegMMX, 0 } }, /* Athlon */
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{"pfpnacc", 2, 0x0f0f, 0x8e, FP|Modrm|ImmExt, { RegMMX|LongMem, RegMMX, 0 } }, /* Athlon */
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{"pfrcp", 2, 0x0f0f, 0x96, FP|Modrm|ImmExt, { RegMMX|LongMem, RegMMX, 0 } },
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{"pfrcpit1", 2, 0x0f0f, 0xa6, FP|Modrm|ImmExt, { RegMMX|LongMem, RegMMX, 0 } },
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{"pfrcpit2", 2, 0x0f0f, 0xb6, FP|Modrm|ImmExt, { RegMMX|LongMem, RegMMX, 0 } },
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@ -1024,9 +1026,9 @@ static const template i386_optab[] = {
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{"pfsub", 2, 0x0f0f, 0x9a, FP|Modrm|ImmExt, { RegMMX|LongMem, RegMMX, 0 } },
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{"pfsubr", 2, 0x0f0f, 0xaa, FP|Modrm|ImmExt, { RegMMX|LongMem, RegMMX, 0 } },
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{"pi2fd", 2, 0x0f0f, 0x0d, FP|Modrm|ImmExt, { RegMMX|LongMem, RegMMX, 0 } },
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{"pi2fw", 2, 0x0f0f, 0x0c, FP|Modrm|ImmExt, { RegMMX|LongMem, RegMMX, 0 } }, /* Unofficial! */
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{"pi2fw", 2, 0x0f0f, 0x0c, FP|Modrm|ImmExt, { RegMMX|LongMem, RegMMX, 0 } }, /* Athlon */
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{"pmulhrw", 2, 0x0f0f, 0xb7, FP|Modrm|ImmExt, { RegMMX|LongMem, RegMMX, 0 } },
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{"pswapw", 2, 0x0f0f, 0xbb, FP|Modrm|ImmExt, { RegMMX|LongMem, RegMMX, 0 } }, /* Unofficial! */
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{"pswapd", 2, 0x0f0f, 0xbb, FP|Modrm|ImmExt, { RegMMX|LongMem, RegMMX, 0 } }, /* Athlon */
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{NULL, 0, 0, 0, 0, { 0, 0, 0} } /* sentinel */
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};
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