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RISC-V: Fix optimized strcmp on big endian

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This commit is contained in:
Marcus Comstedt 2021-02-23 22:31:17 +01:00 committed by Ken Brown
parent 653198d861
commit e3a6e8290c
1 changed files with 36 additions and 4 deletions
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40
newlib/libc/machine/riscv/strcmp.S
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@ -11,10 +11,6 @@
#include <sys/asm.h> #include <sys/asm.h>
#if BYTE_ORDER != LITTLE_ENDIAN
# error
#endif
.text .text
.globl strcmp .globl strcmp
.type strcmp, @function .type strcmp, @function
@ -96,6 +92,9 @@ strcmp:
.Lmismatch: .Lmismatch:
# words don't match, but a2 has no null byte. # words don't match, but a2 has no null byte.
#if __BYTE_ORDER__ == __ORDER_LITTLE_ENDIAN__
#if __riscv_xlen == 64 #if __riscv_xlen == 64
sll a4, a2, 48 sll a4, a2, 48
sll a5, a3, 48 sll a5, a3, 48
@ -128,6 +127,39 @@ strcmp:
sub a0, a4, a5 sub a0, a4, a5
ret ret
#else
#if __riscv_xlen == 64
srl a4, a2, 48
srl a5, a3, 48
bne a4, a5, .Lmismatch_lower
srl a4, a2, 32
srl a5, a3, 32
bne a4, a5, .Lmismatch_lower
#endif
srl a4, a2, 16
srl a5, a3, 16
bne a4, a5, .Lmismatch_lower
srl a4, a2, 8
srl a5, a3, 8
bne a4, a5, 1f
and a4, a2, 0xff
and a5, a3, 0xff
1:sub a0, a4, a5
ret
.Lmismatch_lower:
srl a2, a4, 8
srl a3, a5, 8
bne a2, a3, 1f
and a2, a4, 0xff
and a3, a5, 0xff
1:sub a0, a2, a3
ret
#endif
.Lmisaligned: .Lmisaligned:
# misaligned # misaligned
lbu a2, 0(a0) lbu a2, 0(a0)