include/opcode/
* ppc.h (struct powerpc_operand): Replace "bits" with "bitm". (num_powerpc_operands): Declare. (PPC_OPERAND_SIGNED et al): Redefine as hex. (PPC_OPERAND_PLUS1): Define. opcodes/ * ppc-dis.c (print_insn_powerpc): Adjust for struct powerpc_operand change. * ppc-opc.c (powerpc_operands): Replace bit count with bit mask in all entries. Add PPC_OPERAND_SIGNED to DE entry. Remove references to following deleted functions. (insert_bd, extract_bd, insert_dq, extract_dq): Delete. (insert_ds, extract_ds, insert_de, extract_de): Delete. (insert_des, extract_des, insert_li, extract_li): Delete. (insert_nb, insert_rsq, insert_rtq, insert_ev2, extract_ev2): Delete. (insert_ev4, extract_ev4, insert_ev8, extract_ev8): Delete. (num_powerpc_operands): New constant. (XSPRG_MASK): Remove entire SPRG field. (powerpc_opcodes <bcctre, bcctrel>): Use XLBB_MASK not XLYBB_MASK. gas/ * messages.c (as_internal_value_out_of_range): Extend to report errors for values with invalid low bits set. * config/tc-ppc.c (ppc_setup_opcodes): Check powerpc_operands bitm fields. Check that operands and opcode fields are disjoint. (ppc_insert_operand): Check operands using mask rather than bit count. Check low bits too. Handle PPC_OPERAND_PLUS1. Adjust insertion code. (md_apply_fix): Adjust for struct powerpc_operand change.
This commit is contained in:
Alan Modra
parent
c84ece703d
commit
d8507ced8b
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@ -1,3 +1,10 @@
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2007-04-20 Alan Modra <amodra@bigpond.net.au>
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* ppc.h (struct powerpc_operand): Replace "bits" with "bitm".
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(num_powerpc_operands): Declare.
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(PPC_OPERAND_SIGNED et al): Redefine as hex.
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(PPC_OPERAND_PLUS1): Define.
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2007-03-21 H.J. Lu <hongjiu.lu@intel.com>
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* i386.h (REX_MODE64): Renamed to ...
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@ -1,6 +1,6 @@
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/* ppc.h -- Header file for PowerPC opcode table
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Copyright 1994, 1995, 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006
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Free Software Foundation, Inc.
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Copyright 1994, 1995, 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006,
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2007 Free Software Foundation, Inc.
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Written by Ian Lance Taylor, Cygnus Support
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This file is part of GDB, GAS, and the GNU binutils.
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@ -153,20 +153,21 @@ extern const int powerpc_num_opcodes;
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struct powerpc_operand
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{
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/* The number of bits in the operand. */
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int bits;
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/* A bitmask of bits in the operand. */
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unsigned int bitm;
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/* How far the operand is left shifted in the instruction. */
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/* How far the operand is left shifted in the instruction.
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-1 to indicate that BITM and SHIFT cannot be used to determine
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where the operand goes in the insn. */
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int shift;
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/* Insertion function. This is used by the assembler. To insert an
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operand value into an instruction, check this field.
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If it is NULL, execute
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i |= (op & ((1 << o->bits) - 1)) << o->shift;
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i |= (op & o->bitm) << o->shift;
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(i is the instruction which we are filling in, o is a pointer to
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this structure, and op is the opcode value; this assumes twos
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complement arithmetic).
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this structure, and op is the operand value).
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If this field is not NULL, then simply call it with the
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instruction and the operand value. It will return the new value
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@ -182,12 +183,11 @@ struct powerpc_operand
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extract this operand type from an instruction, check this field.
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If it is NULL, compute
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op = ((i) >> o->shift) & ((1 << o->bits) - 1);
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if ((o->flags & PPC_OPERAND_SIGNED) != 0
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&& (op & (1 << (o->bits - 1))) != 0)
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op -= 1 << o->bits;
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op = (i >> o->shift) & o->bitm;
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if ((o->flags & PPC_OPERAND_SIGNED) != 0)
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sign_extend (op);
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(i is the instruction, o is a pointer to this structure, and op
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is the result; this assumes twos complement arithmetic).
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is the result).
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If this field is not NULL, then simply call it with the
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instruction value. It will return the value of the operand. If
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@ -205,17 +205,18 @@ struct powerpc_operand
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the operands field of the powerpc_opcodes table. */
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extern const struct powerpc_operand powerpc_operands[];
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extern const unsigned int num_powerpc_operands;
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/* Values defined for the flags field of a struct powerpc_operand. */
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/* This operand takes signed values. */
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#define PPC_OPERAND_SIGNED (01)
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#define PPC_OPERAND_SIGNED (0x1)
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/* This operand takes signed values, but also accepts a full positive
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range of values when running in 32 bit mode. That is, if bits is
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16, it takes any value from -0x8000 to 0xffff. In 64 bit mode,
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this flag is ignored. */
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#define PPC_OPERAND_SIGNOPT (02)
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#define PPC_OPERAND_SIGNOPT (0x2)
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/* This operand does not actually exist in the assembler input. This
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is used to support extended mnemonics such as mr, for which two
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@ -223,14 +224,14 @@ extern const struct powerpc_operand powerpc_operands[];
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insert function with any op value. The disassembler should call
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the extract function, ignore the return value, and check the value
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placed in the valid argument. */
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#define PPC_OPERAND_FAKE (04)
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#define PPC_OPERAND_FAKE (0x4)
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/* The next operand should be wrapped in parentheses rather than
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separated from this one by a comma. This is used for the load and
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store instructions which want their operands to look like
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reg,displacement(reg)
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*/
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#define PPC_OPERAND_PARENS (010)
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#define PPC_OPERAND_PARENS (0x8)
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/* This operand may use the symbolic names for the CR fields, which
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are
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@ -239,26 +240,26 @@ extern const struct powerpc_operand powerpc_operands[];
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cr4 4 cr5 5 cr6 6 cr7 7
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These may be combined arithmetically, as in cr2*4+gt. These are
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only supported on the PowerPC, not the POWER. */
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#define PPC_OPERAND_CR (020)
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#define PPC_OPERAND_CR (0x10)
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/* This operand names a register. The disassembler uses this to print
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register names with a leading 'r'. */
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#define PPC_OPERAND_GPR (040)
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#define PPC_OPERAND_GPR (0x20)
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/* Like PPC_OPERAND_GPR, but don't print a leading 'r' for r0. */
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#define PPC_OPERAND_GPR_0 (0100)
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#define PPC_OPERAND_GPR_0 (0x40)
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/* This operand names a floating point register. The disassembler
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prints these with a leading 'f'. */
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#define PPC_OPERAND_FPR (0200)
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#define PPC_OPERAND_FPR (0x80)
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/* This operand is a relative branch displacement. The disassembler
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prints these symbolically if possible. */
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#define PPC_OPERAND_RELATIVE (0400)
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#define PPC_OPERAND_RELATIVE (0x100)
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/* This operand is an absolute branch address. The disassembler
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prints these symbolically if possible. */
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#define PPC_OPERAND_ABSOLUTE (01000)
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#define PPC_OPERAND_ABSOLUTE (0x200)
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/* This operand is optional, and is zero if omitted. This is used for
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example, in the optional BF field in the comparison instructions. The
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@ -266,7 +267,7 @@ extern const struct powerpc_operand powerpc_operands[];
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and the number of operands remaining for the opcode, and decide
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whether this operand is present or not. The disassembler should
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print this operand out only if it is not zero. */
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#define PPC_OPERAND_OPTIONAL (02000)
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#define PPC_OPERAND_OPTIONAL (0x400)
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/* This flag is only used with PPC_OPERAND_OPTIONAL. If this operand
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is omitted, then for the next operand use this operand value plus
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@ -274,24 +275,27 @@ extern const struct powerpc_operand powerpc_operands[];
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hack is needed because the Power rotate instructions can take
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either 4 or 5 operands. The disassembler should print this operand
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out regardless of the PPC_OPERAND_OPTIONAL field. */
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#define PPC_OPERAND_NEXT (04000)
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#define PPC_OPERAND_NEXT (0x800)
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/* This operand should be regarded as a negative number for the
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purposes of overflow checking (i.e., the normal most negative
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number is disallowed and one more than the normal most positive
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number is allowed). This flag will only be set for a signed
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operand. */
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#define PPC_OPERAND_NEGATIVE (010000)
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#define PPC_OPERAND_NEGATIVE (0x1000)
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/* This operand names a vector unit register. The disassembler
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prints these with a leading 'v'. */
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#define PPC_OPERAND_VR (020000)
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#define PPC_OPERAND_VR (0x2000)
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/* This operand is for the DS field in a DS form instruction. */
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#define PPC_OPERAND_DS (040000)
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#define PPC_OPERAND_DS (0x4000)
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/* This operand is for the DQ field in a DQ form instruction. */
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#define PPC_OPERAND_DQ (0100000)
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#define PPC_OPERAND_DQ (0x8000)
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/* Valid range of operand is 1..n rather than 0..n-1. */
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#define PPC_OPERAND_PLUS1 (0x10000)
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/* The POWER and PowerPC assemblers use a few macros. We keep them
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with the operands table for simplicity. The macro table is an
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