fenv: drop Cygwin-specific implementation in favor of newlib code
Drop the Cygwin-specific fenv.cc and fenv.h file and use the equivalent
newlib functionality now, so we have at least one example of a user for
this new mechanism.
fenv.c: allow _feinitialise to be called from Cygwin startup code
fenv.h: add declarations for fegetprec and fesetprec for Cygwin only.
Fix a comment.
Signed-off-by: Corinna Vinschen <corinna@vinschen.de>
This commit is contained in:
Corinna Vinschen
parent
572fdaa419
commit
cf8c783cc1
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@ -163,11 +163,20 @@ int fedisableexcept (int __excepts);
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int fegetexcept (void);
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int fegetexcept (void);
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#endif /* __GNU_VISIBLE */
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#endif /* __GNU_VISIBLE */
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#ifdef __CYGWIN__
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#if __MISC_VISIBLE
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int fegetprec (void);
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int fesetprec (int __prec);
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#endif
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#ifdef __INSIDE_CYGWIN__
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#ifdef __INSIDE_CYGWIN__
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/* This is Cygwin-custom, not from the standard, for use in the Cygwin CRT. */
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/* Cygwin-internal ONLY. */
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extern void _feinitialise ();
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extern void _feinitialise ();
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#endif
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#endif
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#endif /* __CYGWIN__ */
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#ifdef __cplusplus
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#ifdef __cplusplus
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}
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}
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#endif
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#endif
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@ -63,8 +63,10 @@ static inline bool use_sse(void)
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return false;
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return false;
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}
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}
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#ifndef __CYGWIN__
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/* forward declaration */
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/* forward declaration */
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static void _feinitialise (void);
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static void _feinitialise (void);
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#endif
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/* This function enables traps for each of the exceptions as indicated
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/* This function enables traps for each of the exceptions as indicated
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by the parameter except. The individual exceptions are described in
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by the parameter except. The individual exceptions are described in
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@ -449,7 +451,10 @@ fesetprec (int prec)
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#endif
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#endif
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/* Set up the FPU and SSE environment at the start of execution. */
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/* Set up the FPU and SSE environment at the start of execution. */
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static void
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#ifndef __CYGWIN__
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static
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#endif
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void
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_feinitialise (void)
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_feinitialise (void)
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{
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{
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extern fenv_t __fe_dfl_env;
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extern fenv_t __fe_dfl_env;
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@ -288,7 +288,6 @@ DLL_OFILES:= \
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exec.o \
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exec.o \
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external.o \
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external.o \
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fcntl.o \
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fcntl.o \
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fenv.o \
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fhandler.o \
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fhandler.o \
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fhandler_clipboard.o \
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fhandler_clipboard.o \
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fhandler_console.o \
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fhandler_console.o \
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@ -1,466 +0,0 @@
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/* fenv.cc
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This file is part of Cygwin.
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This software is a copyrighted work licensed under the terms of the
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Cygwin license. Please consult the file "CYGWIN_LICENSE" for
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details. */
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#include "winsup.h"
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#include "fenv.h"
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#include "errno.h"
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#include "wincap.h"
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#include <string.h>
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/* x87 supports subnormal numbers so we need it below. */
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#define __FE_DENORM (1 << 1)
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/* mask (= 0x3f) to disable all exceptions at initialization */
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#define __FE_ALL_EXCEPT_X86 (FE_ALL_EXCEPT | __FE_DENORM)
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/* Mask and shift amount for rounding bits. */
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#define FE_CW_ROUND_MASK (0x0c00)
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#define FE_CW_ROUND_SHIFT (10)
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/* Same, for SSE MXCSR. */
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#define FE_MXCSR_ROUND_MASK (0x6000)
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#define FE_MXCSR_ROUND_SHIFT (13)
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/* Mask and shift amount for precision bits. */
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#define FE_CW_PREC_MASK (0x0300)
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#define FE_CW_PREC_SHIFT (8)
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/* In x87, exception status bits and mask bits occupy
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corresponding bit positions in the status and control
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registers, respectively. In SSE, they are both located
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in the control-and-status register, with the status bits
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corresponding to the x87 positions, and the mask bits
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shifted by this amount to the left. */
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#define FE_SSE_EXCEPT_MASK_SHIFT (7)
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/* These are writable so we can initialise them at startup. */
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static fenv_t fe_nomask_env;
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/* These pointers provide the outside world with read-only access to them. */
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const fenv_t *_fe_nomask_env = &fe_nomask_env;
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/* Although Cygwin assumes i686 or above (hence SSE available) these
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days, and the compiler feels free to use it (depending on compile-
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time flags of course), we should avoid needlessly breaking any
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purely integer mode apps (or apps compiled with -mno-sse), so we
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only manage SSE state in this fenv module if we detect that SSE
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instructions are available at runtime. If we didn't do this, all
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applications run on older machines would bomb out with an invalid
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instruction exception right at startup; let's not be *that* WJM! */
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static bool use_sse = false;
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/* This function enables traps for each of the exceptions as indicated
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by the parameter except. The individual exceptions are described in
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[ ... glibc manual xref elided ...]. Only the specified exceptions are
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enabled, the status of the other exceptions is not changed.
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The function returns the previous enabled exceptions in case the
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operation was successful, -1 otherwise. */
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int
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feenableexcept (int excepts)
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{
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unsigned short cw, old_cw;
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unsigned int mxcsr = 0;
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if (excepts & ~FE_ALL_EXCEPT)
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return -1;
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/* Get control words. */
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__asm__ volatile ("fnstcw %0" : "=m" (old_cw) : );
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if (use_sse)
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__asm__ volatile ("stmxcsr %0" : "=m" (mxcsr) : );
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/* Enable exceptions by clearing mask bits. */
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cw = old_cw & ~excepts;
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mxcsr &= ~(excepts << FE_SSE_EXCEPT_MASK_SHIFT);
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/* Store updated control words. */
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__asm__ volatile ("fldcw %0" :: "m" (cw));
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if (use_sse)
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__asm__ volatile ("ldmxcsr %0" :: "m" (mxcsr));
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/* Return old value. We assume SSE and x87 stay in sync. Note that
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we are returning a mask of enabled exceptions, which is the opposite
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of the flags in the register, which are set to disable (mask) their
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related exceptions. */
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return (~old_cw) & FE_ALL_EXCEPT;
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}
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/* This function disables traps for each of the exceptions as indicated
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by the parameter except. The individual exceptions are described in
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[ ... glibc manual xref elided ...]. Only the specified exceptions are
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disabled, the status of the other exceptions is not changed.
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The function returns the previous enabled exceptions in case the
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operation was successful, -1 otherwise. */
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int
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fedisableexcept (int excepts)
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{
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unsigned short cw, old_cw;
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unsigned int mxcsr = 0;
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if (excepts & ~FE_ALL_EXCEPT)
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return -1;
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/* Get control words. */
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__asm__ volatile ("fnstcw %0" : "=m" (old_cw) : );
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if (use_sse)
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__asm__ volatile ("stmxcsr %0" : "=m" (mxcsr) : );
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/* Disable exceptions by setting mask bits. */
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cw = old_cw | excepts;
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mxcsr |= (excepts << FE_SSE_EXCEPT_MASK_SHIFT);
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/* Store updated control words. */
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__asm__ volatile ("fldcw %0" :: "m" (cw));
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if (use_sse)
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__asm__ volatile ("ldmxcsr %0" :: "m" (mxcsr));
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/* Return old value. We assume SSE and x87 stay in sync. Note that
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we are returning a mask of enabled exceptions, which is the opposite
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of the flags in the register, which are set to disable (mask) their
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related exceptions. */
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return (~old_cw) & FE_ALL_EXCEPT;
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}
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/* This function returns a bitmask of all currently enabled exceptions. It
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returns -1 in case of failure. */
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int
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fegetexcept (void)
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{
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unsigned short cw;
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/* Get control word. We assume SSE and x87 stay in sync. */
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__asm__ volatile ("fnstcw %0" : "=m" (cw) : );
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/* Exception is *dis*abled when mask bit is set. */
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return (~cw) & FE_ALL_EXCEPT;
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}
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/* Store the floating-point environment in the variable pointed to by envp.
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The function returns zero in case the operation was successful, a non-zero
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value otherwise. */
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int
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fegetenv (fenv_t *envp)
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{
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/* fnstenv disables all exceptions in the x87 FPU; as this is not what is
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desired here, reload the cfg saved from the x87 FPU, back to the FPU */
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__asm__ volatile ("fnstenv %0\n\
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fldenv %0"
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: "=m" (envp->_fpu) : );
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if (use_sse)
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__asm__ volatile ("stmxcsr %0" : "=m" (envp->_sse_mxcsr) : );
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return 0;
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}
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/* Store the current floating-point environment in the object pointed to
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by envp. Then clear all exception flags, and set the FPU to trap no
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exceptions. Not all FPUs support trapping no exceptions; if feholdexcept
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cannot set this mode, it returns nonzero value. If it succeeds, it
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returns zero. */
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int
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feholdexcept (fenv_t *envp)
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{
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unsigned int mxcsr;
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fegetenv (envp);
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mxcsr = envp->_sse_mxcsr & ~FE_ALL_EXCEPT;
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if (use_sse)
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__asm__ volatile ("ldmxcsr %0" :: "m" (mxcsr));
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__asm__ volatile ("fnclex");
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fedisableexcept (FE_ALL_EXCEPT);
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return 0;
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}
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/* Set the floating-point environment to that described by envp. The
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function returns zero in case the operation was successful, a non-zero
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value otherwise. */
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int
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fesetenv (const fenv_t *envp)
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{
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__asm__ volatile ("fldenv %0" :: "m" (envp->_fpu) );
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if (use_sse)
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__asm__ volatile ("ldmxcsr %0" :: "m" (envp->_sse_mxcsr));
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return 0;
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}
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/* Like fesetenv, this function sets the floating-point environment to
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that described by envp. However, if any exceptions were flagged in the
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status word before feupdateenv was called, they remain flagged after
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the call. In other words, after feupdateenv is called, the status
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word is the bitwise OR of the previous status word and the one saved
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in envp. The function returns zero in case the operation was successful,
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a non-zero value otherwise. */
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int
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feupdateenv (const fenv_t *envp)
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{
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fenv_t envcopy;
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unsigned int mxcsr = 0;
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unsigned short sw;
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/* Don't want to modify *envp, but want to update environment atomically,
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so take a copy and merge the existing exceptions into it. */
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memcpy (&envcopy, envp, sizeof *envp);
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__asm__ volatile ("fnstsw %0" : "=m" (sw) : );
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if (use_sse)
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__asm__ volatile ("stmxcsr %0" : "=m" (mxcsr) : );
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envcopy._fpu._fpu_sw |= (sw & FE_ALL_EXCEPT);
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envcopy._sse_mxcsr |= (mxcsr & FE_ALL_EXCEPT);
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return fesetenv (&envcopy);
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}
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/* This function clears all of the supported exception flags indicated by
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excepts. The function returns zero in case the operation was successful,
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a non-zero value otherwise. */
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int
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feclearexcept (int excepts)
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{
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fenv_t fenv;
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if (excepts & ~FE_ALL_EXCEPT)
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return EINVAL;
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/* Need to save/restore whole environment to modify status word. */
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fegetenv (&fenv);
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/* Mask undesired bits out. */
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fenv._fpu._fpu_sw &= ~excepts;
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fenv._sse_mxcsr &= ~excepts;
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/* Set back into FPU state. */
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return fesetenv (&fenv);
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}
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/* This function raises the supported exceptions indicated by
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excepts. If more than one exception bit in excepts is set the order
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in which the exceptions are raised is undefined except that overflow
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(FE_OVERFLOW) or underflow (FE_UNDERFLOW) are raised before inexact
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(FE_INEXACT). Whether for overflow or underflow the inexact exception
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is also raised is also implementation dependent. The function returns
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zero in case the operation was successful, a non-zero value otherwise. */
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int
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feraiseexcept (int excepts)
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{
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fenv_t fenv;
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if (excepts & ~FE_ALL_EXCEPT)
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return EINVAL;
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/* Need to save/restore whole environment to modify status word. */
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__asm__ volatile ("fnstenv %0" : "=m" (fenv) : );
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/* Set desired exception bits. */
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fenv._fpu._fpu_sw |= excepts;
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/* Set back into FPU state. */
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__asm__ volatile ("fldenv %0" :: "m" (fenv));
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/* And trigger them - whichever are unmasked. */
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__asm__ volatile ("fwait");
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return 0;
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}
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/* Test whether the exception flags indicated by the parameter except
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are currently set. If any of them are, a nonzero value is returned
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which specifies which exceptions are set. Otherwise the result is zero. */
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int
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fetestexcept (int excepts)
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{
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unsigned short sw;
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unsigned int mxcsr = 0;
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if (excepts & ~FE_ALL_EXCEPT)
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return EINVAL;
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/* Get status registers. */
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__asm__ volatile ("fnstsw %0" : "=m" (sw) : );
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if (use_sse)
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__asm__ volatile ("stmxcsr %0" : "=m" (mxcsr) : );
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/* Mask undesired bits out and return result. */
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return (sw | mxcsr) & excepts;
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}
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/* This function stores in the variable pointed to by flagp an
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implementation-defined value representing the current setting of the
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exception flags indicated by excepts. The function returns zero in
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case the operation was successful, a non-zero value otherwise. */
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int
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fegetexceptflag (fexcept_t *flagp, int excepts)
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{
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unsigned short sw;
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unsigned int mxcsr = 0;
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if (excepts & ~FE_ALL_EXCEPT)
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return EINVAL;
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/* Get status registers. */
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__asm__ volatile ("fnstsw %0" : "=m" (sw) : );
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if (use_sse)
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__asm__ volatile ("stmxcsr %0" : "=m" (mxcsr) : );
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/* Mask undesired bits out and set result. */
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*flagp = (sw | mxcsr) & excepts;
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return 0;
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}
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/* This function restores the flags for the exceptions indicated by
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|
||||||
excepts to the values stored in the variable pointed to by flagp. */
|
|
||||||
int
|
|
||||||
fesetexceptflag (const fexcept_t *flagp, int excepts)
|
|
||||||
{
|
|
||||||
fenv_t fenv;
|
|
||||||
|
|
||||||
if (excepts & ~FE_ALL_EXCEPT)
|
|
||||||
return EINVAL;
|
|
||||||
|
|
||||||
/* Need to save/restore whole environment to modify status word. */
|
|
||||||
fegetenv (&fenv);
|
|
||||||
|
|
||||||
/* Set/Clear desired exception bits. */
|
|
||||||
fenv._fpu._fpu_sw &= ~excepts;
|
|
||||||
fenv._fpu._fpu_sw |= excepts & *flagp;
|
|
||||||
fenv._sse_mxcsr &= ~excepts;
|
|
||||||
fenv._sse_mxcsr |= excepts & *flagp;
|
|
||||||
|
|
||||||
/* Set back into FPU state. */
|
|
||||||
return fesetenv (&fenv);
|
|
||||||
}
|
|
||||||
|
|
||||||
/* Returns the currently selected rounding mode, represented by one of the
|
|
||||||
values of the defined rounding mode macros. */
|
|
||||||
int
|
|
||||||
fegetround (void)
|
|
||||||
{
|
|
||||||
unsigned short cw;
|
|
||||||
|
|
||||||
/* Get control word. We assume SSE and x87 stay in sync. */
|
|
||||||
__asm__ volatile ("fnstcw %0" : "=m" (cw) : );
|
|
||||||
|
|
||||||
return (cw & FE_CW_ROUND_MASK) >> FE_CW_ROUND_SHIFT;
|
|
||||||
}
|
|
||||||
|
|
||||||
/* Changes the currently selected rounding mode to round. If round does
|
|
||||||
not correspond to one of the supported rounding modes nothing is changed.
|
|
||||||
fesetround returns zero if it changed the rounding mode, a nonzero value
|
|
||||||
if the mode is not supported. */
|
|
||||||
int
|
|
||||||
fesetround (int round)
|
|
||||||
{
|
|
||||||
unsigned short cw;
|
|
||||||
unsigned int mxcsr = 0;
|
|
||||||
|
|
||||||
/* Will succeed for any valid value of the input parameter. */
|
|
||||||
if (round < FE_TONEAREST || round > FE_TOWARDZERO)
|
|
||||||
return EINVAL;
|
|
||||||
|
|
||||||
/* Get control words. */
|
|
||||||
__asm__ volatile ("fnstcw %0" : "=m" (cw) : );
|
|
||||||
if (use_sse)
|
|
||||||
__asm__ volatile ("stmxcsr %0" : "=m" (mxcsr) : );
|
|
||||||
|
|
||||||
/* Twiddle bits. */
|
|
||||||
cw &= ~FE_CW_ROUND_MASK;
|
|
||||||
cw |= (round << FE_CW_ROUND_SHIFT);
|
|
||||||
mxcsr &= ~FE_MXCSR_ROUND_MASK;
|
|
||||||
mxcsr |= (round << FE_MXCSR_ROUND_SHIFT);
|
|
||||||
|
|
||||||
/* Set back into FPU state. */
|
|
||||||
__asm__ volatile ("fldcw %0" :: "m" (cw));
|
|
||||||
if (use_sse)
|
|
||||||
__asm__ volatile ("ldmxcsr %0" :: "m" (mxcsr));
|
|
||||||
|
|
||||||
/* Indicate success. */
|
|
||||||
return 0;
|
|
||||||
}
|
|
||||||
|
|
||||||
/* Returns the currently selected precision, represented by one of the
|
|
||||||
values of the defined precision macros. */
|
|
||||||
int
|
|
||||||
fegetprec (void)
|
|
||||||
{
|
|
||||||
unsigned short cw;
|
|
||||||
|
|
||||||
/* Get control word. */
|
|
||||||
__asm__ volatile ("fnstcw %0" : "=m" (cw) : );
|
|
||||||
|
|
||||||
return (cw & FE_CW_PREC_MASK) >> FE_CW_PREC_SHIFT;
|
|
||||||
}
|
|
||||||
|
|
||||||
/* http://www.open-std.org/jtc1/sc22//WG14/www/docs/n752.htm:
|
|
||||||
|
|
||||||
The fesetprec function establishes the precision represented by its
|
|
||||||
argument prec. If the argument does not match a precision macro, the
|
|
||||||
precision is not changed.
|
|
||||||
|
|
||||||
The fesetprec function returns a nonzero value if and only if the
|
|
||||||
argument matches a precision macro (that is, if and only if the requested
|
|
||||||
precision can be established). */
|
|
||||||
int
|
|
||||||
fesetprec (int prec)
|
|
||||||
{
|
|
||||||
unsigned short cw;
|
|
||||||
|
|
||||||
/* Will succeed for any valid value of the input parameter. */
|
|
||||||
switch (prec)
|
|
||||||
{
|
|
||||||
case FE_FLTPREC:
|
|
||||||
case FE_DBLPREC:
|
|
||||||
case FE_LDBLPREC:
|
|
||||||
break;
|
|
||||||
default:
|
|
||||||
return 0;
|
|
||||||
}
|
|
||||||
|
|
||||||
/* Get control word. */
|
|
||||||
__asm__ volatile ("fnstcw %0" : "=m" (cw) : );
|
|
||||||
|
|
||||||
/* Twiddle bits. */
|
|
||||||
cw &= ~FE_CW_PREC_MASK;
|
|
||||||
cw |= (prec << FE_CW_PREC_SHIFT);
|
|
||||||
|
|
||||||
/* Set back into FPU state. */
|
|
||||||
__asm__ volatile ("fldcw %0" :: "m" (cw));
|
|
||||||
|
|
||||||
/* Indicate success. */
|
|
||||||
return 1;
|
|
||||||
}
|
|
||||||
|
|
||||||
/* Set up the FPU and SSE environment at the start of execution. */
|
|
||||||
void
|
|
||||||
_feinitialise (void)
|
|
||||||
{
|
|
||||||
unsigned int edx, eax;
|
|
||||||
extern fenv_t __fe_dfl_env;
|
|
||||||
|
|
||||||
/* Check for presence of SSE: invoke CPUID #1, check EDX bit 25. */
|
|
||||||
eax = 1;
|
|
||||||
__asm__ volatile ("cpuid" : "=d" (edx), "+a" (eax) :: "%ecx", "%ebx");
|
|
||||||
/* If this flag isn't set we'll avoid trying to execute any SSE. */
|
|
||||||
if ((edx & (1 << 25)) != 0)
|
|
||||||
use_sse = true;
|
|
||||||
|
|
||||||
/* Reset FPU: extended prec, all exceptions cleared and masked off. */
|
|
||||||
__asm__ volatile ("fninit");
|
|
||||||
/* The default cw value, 0x37f, is rounding mode zero. The MXCSR has
|
|
||||||
no precision control, so the only thing to do is set the exception
|
|
||||||
mask bits. */
|
|
||||||
|
|
||||||
/* initialize the MXCSR register: mask all exceptions */
|
|
||||||
unsigned int mxcsr = __FE_ALL_EXCEPT_X86 << FE_SSE_EXCEPT_MASK_SHIFT;
|
|
||||||
if (use_sse)
|
|
||||||
__asm__ volatile ("ldmxcsr %0" :: "m" (mxcsr));
|
|
||||||
|
|
||||||
/* Setup unmasked environment, but leave __FE_DENORM masked. */
|
|
||||||
feenableexcept (FE_ALL_EXCEPT);
|
|
||||||
fegetenv (&fe_nomask_env);
|
|
||||||
|
|
||||||
/* Restore default exception masking (all masked). */
|
|
||||||
fedisableexcept (FE_ALL_EXCEPT);
|
|
||||||
|
|
||||||
/* Finally cache state as default environment. */
|
|
||||||
fegetenv (&__fe_dfl_env);
|
|
||||||
}
|
|
||||||
|
|
||||||
|
|
@ -1,177 +0,0 @@
|
||||||
/* fenv.h
|
|
||||||
|
|
||||||
This file is part of Cygwin.
|
|
||||||
|
|
||||||
This software is a copyrighted work licensed under the terms of the
|
|
||||||
Cygwin license. Please consult the file "CYGWIN_LICENSE" for
|
|
||||||
details. */
|
|
||||||
|
|
||||||
#ifndef _FENV_H
|
|
||||||
#define _FENV_H 1
|
|
||||||
|
|
||||||
#include <sys/cdefs.h>
|
|
||||||
|
|
||||||
#ifdef __cplusplus
|
|
||||||
extern "C" {
|
|
||||||
#endif
|
|
||||||
|
|
||||||
|
|
||||||
/* Primary sources:
|
|
||||||
|
|
||||||
The Open Group Base Specifications Issue 6:
|
|
||||||
http://www.opengroup.org/onlinepubs/000095399/basedefs/fenv.h.html
|
|
||||||
|
|
||||||
C99 Language spec (draft n1256):
|
|
||||||
<url unknown>
|
|
||||||
|
|
||||||
Intel(R) 64 and IA-32 Architectures Software Developer's Manuals:
|
|
||||||
http://www.intel.com/products/processor/manuals/
|
|
||||||
|
|
||||||
GNU C library manual pages:
|
|
||||||
http://www.gnu.org/software/libc/manual/html_node/Control-Functions.html
|
|
||||||
http://www.gnu.org/software/libc/manual/html_node/Rounding.html
|
|
||||||
http://www.gnu.org/software/libc/manual/html_node/FP-Exceptions.html
|
|
||||||
http://www.gnu.org/software/libc/manual/html_node/Status-bit-operations.html
|
|
||||||
|
|
||||||
Linux online man page(s):
|
|
||||||
http://linux.die.net/man/3/fegetexcept
|
|
||||||
|
|
||||||
The documentation quotes these sources for reference. All definitions and
|
|
||||||
code have been developed solely based on the information from these specs.
|
|
||||||
|
|
||||||
*/
|
|
||||||
|
|
||||||
/* Represents the entire floating-point environment. The floating-point
|
|
||||||
environment refers collectively to any floating-point status flags and
|
|
||||||
control modes supported by the implementation.
|
|
||||||
In this implementation, the struct contains the state information from
|
|
||||||
the fstenv/fnstenv instructions and a copy of the SSE MXCSR, since GCC
|
|
||||||
uses SSE for a lot of floating-point operations. (Cygwin assumes i686
|
|
||||||
or above these days, as does the compiler.) */
|
|
||||||
|
|
||||||
typedef struct _fenv_t
|
|
||||||
{
|
|
||||||
struct _fpu_env_info {
|
|
||||||
unsigned int _fpu_cw; /* low 16 bits only. */
|
|
||||||
unsigned int _fpu_sw; /* low 16 bits only. */
|
|
||||||
unsigned int _fpu_tagw; /* low 16 bits only. */
|
|
||||||
unsigned int _fpu_ipoff;
|
|
||||||
unsigned int _fpu_ipsel;
|
|
||||||
unsigned int _fpu_opoff;
|
|
||||||
unsigned int _fpu_opsel; /* low 16 bits only. */
|
|
||||||
} _fpu;
|
|
||||||
unsigned int _sse_mxcsr;
|
|
||||||
} fenv_t;
|
|
||||||
|
|
||||||
/* Represents the floating-point status flags collectively, including
|
|
||||||
any status the implementation associates with the flags. A floating-point
|
|
||||||
status flag is a system variable whose value is set (but never cleared)
|
|
||||||
when a floating-point exception is raised, which occurs as a side effect
|
|
||||||
of exceptional floating-point arithmetic to provide auxiliary information.
|
|
||||||
A floating-point control mode is a system variable whose value may be
|
|
||||||
set by the user to affect the subsequent behavior of floating-point
|
|
||||||
arithmetic. */
|
|
||||||
|
|
||||||
typedef __uint32_t fexcept_t;
|
|
||||||
|
|
||||||
/* The <fenv.h> header shall define the following constants if and only
|
|
||||||
if the implementation supports the floating-point exception by means
|
|
||||||
of the floating-point functions feclearexcept(), fegetexceptflag(),
|
|
||||||
feraiseexcept(), fesetexceptflag(), and fetestexcept(). Each expands to
|
|
||||||
an integer constant expression with values such that bitwise-inclusive
|
|
||||||
ORs of all combinations of the constants result in distinct values. */
|
|
||||||
|
|
||||||
#define FE_DIVBYZERO (1 << 2)
|
|
||||||
#define FE_INEXACT (1 << 5)
|
|
||||||
#define FE_INVALID (1 << 0)
|
|
||||||
#define FE_OVERFLOW (1 << 3)
|
|
||||||
#define FE_UNDERFLOW (1 << 4)
|
|
||||||
|
|
||||||
/* The <fenv.h> header shall define the following constant, which is
|
|
||||||
simply the bitwise-inclusive OR of all floating-point exception
|
|
||||||
constants defined above: */
|
|
||||||
|
|
||||||
/* in agreement w/ Linux the subnormal exception will always be masked */
|
|
||||||
#define FE_ALL_EXCEPT \
|
|
||||||
(FE_INEXACT | FE_UNDERFLOW | FE_OVERFLOW | FE_DIVBYZERO | FE_INVALID)
|
|
||||||
|
|
||||||
/* The <fenv.h> header shall define the following constants if and only
|
|
||||||
if the implementation supports getting and setting the represented
|
|
||||||
rounding direction by means of the fegetround() and fesetround()
|
|
||||||
functions. Each expands to an integer constant expression whose values
|
|
||||||
are distinct non-negative vales. */
|
|
||||||
|
|
||||||
#define FE_DOWNWARD (1)
|
|
||||||
#define FE_TONEAREST (0)
|
|
||||||
#define FE_TOWARDZERO (3)
|
|
||||||
#define FE_UPWARD (2)
|
|
||||||
|
|
||||||
/* Only Solaris and QNX implement fegetprec/fesetprec. As Solaris, use the
|
|
||||||
values defined by http://www.open-std.org/jtc1/sc22//WG14/www/docs/n752.htm
|
|
||||||
QNX defines different values. */
|
|
||||||
#if __MISC_VISIBLE
|
|
||||||
#define FE_FLTPREC (0)
|
|
||||||
#define FE_DBLPREC (2)
|
|
||||||
#define FE_LDBLPREC (3)
|
|
||||||
#endif
|
|
||||||
|
|
||||||
/* The <fenv.h> header shall define the following constant, which
|
|
||||||
represents the default floating-point environment (that is, the one
|
|
||||||
installed at program startup) and has type pointer to const-qualified
|
|
||||||
fenv_t. It can be used as an argument to the functions within the
|
|
||||||
<fenv.h> header that manage the floating-point environment. */
|
|
||||||
|
|
||||||
extern const fenv_t *_fe_dfl_env;
|
|
||||||
#define FE_DFL_ENV (_fe_dfl_env)
|
|
||||||
|
|
||||||
/* Additional implementation-defined environments, with macro
|
|
||||||
definitions beginning with FE_ and an uppercase letter,and having
|
|
||||||
type "pointer to const-qualified fenv_t",may also be specified by
|
|
||||||
the implementation. */
|
|
||||||
|
|
||||||
#if __GNU_VISIBLE
|
|
||||||
/* If possible, the GNU C Library defines a macro FE_NOMASK_ENV which
|
|
||||||
represents an environment where every exception raised causes a trap
|
|
||||||
to occur. You can test for this macro using #ifdef. It is only defined
|
|
||||||
if _GNU_SOURCE is defined. */
|
|
||||||
extern const fenv_t *_fe_nomask_env;
|
|
||||||
#define FE_NOMASK_ENV (_fe_nomask_env)
|
|
||||||
#endif /* __GNU_VISIBLE */
|
|
||||||
|
|
||||||
|
|
||||||
/* The following shall be declared as functions and may also be
|
|
||||||
defined as macros. Function prototypes shall be provided. */
|
|
||||||
extern int feclearexcept (int __excepts);
|
|
||||||
extern int fegetexceptflag (fexcept_t *__flagp, int __excepts);
|
|
||||||
extern int feraiseexcept (int __excepts);
|
|
||||||
extern int fesetexceptflag (const fexcept_t *__flagp, int __excepts);
|
|
||||||
extern int fetestexcept (int __excepts);
|
|
||||||
extern int fegetround (void);
|
|
||||||
extern int fesetround (int __round);
|
|
||||||
extern int fegetenv (fenv_t *__envp);
|
|
||||||
extern int feholdexcept (fenv_t *__envp);
|
|
||||||
extern int fesetenv (const fenv_t *__envp);
|
|
||||||
extern int feupdateenv (const fenv_t *__envp);
|
|
||||||
|
|
||||||
#if __GNU_VISIBLE
|
|
||||||
/* These are GNU extensions defined in glibc. */
|
|
||||||
extern int feenableexcept (int __excepts);
|
|
||||||
extern int fedisableexcept (int __excepts);
|
|
||||||
extern int fegetexcept (void);
|
|
||||||
#endif
|
|
||||||
|
|
||||||
#if __MISC_VISIBLE
|
|
||||||
extern int fegetprec (void);
|
|
||||||
extern int fesetprec (int __prec);
|
|
||||||
#endif
|
|
||||||
|
|
||||||
#ifdef __INSIDE_CYGWIN__
|
|
||||||
/* This is Cygwin-custom, not from the standard, for use in the Cygwin CRT. */
|
|
||||||
extern void _feinitialise ();
|
|
||||||
#endif
|
|
||||||
|
|
||||||
#ifdef __cplusplus
|
|
||||||
}
|
|
||||||
#endif
|
|
||||||
|
|
||||||
#endif /* _FENV_H */
|
|
||||||
Loading…
Reference in New Issue