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This commit was manufactured by cvs2svn to create branch

'kettenis_i386newframe-20030419-branch'.

Sprout from kettenis_i386newframe-20030406-branch 2003-04-04 08:15:16 UTC cvs2svn 'This commit was manufactured by cvs2svn to create branch'
Cherrypick from master 2003-04-19 00:19:40 UTC DJ Delorie <dj@redhat.com> '* Makefile.tpl (MAKEINFOFLAGS): Default to --split-size=5000000.':
    ChangeLog
    Makefile.in
    Makefile.tpl
    configure
    configure.in
    include/coff/ChangeLog
    include/coff/h8300.h
    include/coff/h8500.h
    include/coff/sh.h
    include/elf/ChangeLog
    include/elf/common.h
    include/opcode/ChangeLog
    include/opcode/h8300.h
    include/opcode/mips.h
    libtool.m4
This commit is contained in:
cvs2svn 2003-04-19 00:19:41 +00:00
parent 44c1c61b1d
commit cd4993ccbb
15 changed files with 88 additions and 47 deletions

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@ -1,3 +1,30 @@
2003-04-18 Gerald Pfeifer <pfeifer@dbai.tuwien.ac.at>
* Makefile.tpl (MAKEINFOFLAGS): Default to --split-size=5000000.
* Makefile.in: Regenerate.
2003-04-18 Jakub Jelinek <jakub@redhat.com>
* configure.in (powerpc64*-*-linux*): Remove.
* configure: Rebuilt.
2003-04-17 Phil Edwards <pme@gcc.gnu.org>
* Makefile.tpl (GCC_STRAP_TARGETS): New variable containing all the
previous bootstrap targets, plus bubblestrap, quickstrap, cleanstrap,
and restrap.
* Makefile.in: Regenerate.
2003-04-16 Richard Earnshaw <rearnsha@arm.com>
* configure.in (arm-*-netbsdelf*): Enable building java libraries.
* configure: Regenerated.
2003-04-11 Alexandre Oliva <aoliva@redhat.com>
* libtool.m4 (lt_cv_deplibs_check_method): Use pass_all on mips*.
* */configure: Rebuilt.
2003-03-14 Nathanael Nerode <neroden@gcc.gnu.org>
* Makefile.tpl: Move .NOEXPORT, MAKEOVERRIDES back down.

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@ -203,7 +203,8 @@ USUAL_MAKEINFO = `if [ -f $$r/texinfo/makeinfo/makeinfo ] ; \
# This just becomes part of the MAKEINFO definition passed down to
# sub-makes. It lets flags be given on the command line while still
# using the makeinfo from the object tree.
MAKEINFOFLAGS =
# (Default to avoid splitting info files by setting the threshold high.)
MAKEINFOFLAGS = --split-size=5000000
EXPECT = `if [ -f $$r/expect/expect ] ; \
then echo $$r/expect/expect ; \
@ -7264,8 +7265,9 @@ all-gcc: configure-gcc
# In theory, on an SMP all those dependencies can be resolved
# in parallel.
#
.PHONY: bootstrap bootstrap-lean bootstrap2 bootstrap2-lean bootstrap3 bootstrap3-lean bootstrap4 bootstrap4-lean bubblestrap quickstrap cleanstrap restrap
bootstrap bootstrap-lean bootstrap2 bootstrap2-lean bootstrap3 bootstrap3-lean bootstrap4 bootstrap4-lean bubblestrap quickstrap cleanstrap restrap: all-bootstrap configure-gcc
GCC_STRAP_TARGETS = bootstrap bootstrap-lean bootstrap2 bootstrap2-lean bootstrap3 bootstrap3-lean bootstrap4 bootstrap4-lean bubblestrap quickstrap cleanstrap restrap
.PHONY: $(GCC_STRAP_TARGETS)
$(GCC_STRAP_TARGETS): all-bootstrap configure-gcc
@r=`${PWD}`; export r; \
s=`cd $(srcdir); ${PWD}`; export s; \
$(SET_LIB_PATH) \

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@ -206,7 +206,8 @@ USUAL_MAKEINFO = `if [ -f $$r/texinfo/makeinfo/makeinfo ] ; \
# This just becomes part of the MAKEINFO definition passed down to
# sub-makes. It lets flags be given on the command line while still
# using the makeinfo from the object tree.
MAKEINFOFLAGS =
# (Default to avoid splitting info files by setting the threshold high.)
MAKEINFOFLAGS = --split-size=5000000
EXPECT = `if [ -f $$r/expect/expect ] ; \
then echo $$r/expect/expect ; \
@ -1189,8 +1190,9 @@ all-gcc: configure-gcc
# In theory, on an SMP all those dependencies can be resolved
# in parallel.
#
.PHONY: bootstrap bootstrap-lean bootstrap2 bootstrap2-lean bootstrap3 bootstrap3-lean bootstrap4 bootstrap4-lean bubblestrap quickstrap cleanstrap restrap
bootstrap bootstrap-lean bootstrap2 bootstrap2-lean bootstrap3 bootstrap3-lean bootstrap4 bootstrap4-lean bubblestrap quickstrap cleanstrap restrap: all-bootstrap configure-gcc
GCC_STRAP_TARGETS = bootstrap bootstrap-lean bootstrap2 bootstrap2-lean bootstrap3 bootstrap3-lean bootstrap4 bootstrap4-lean bubblestrap quickstrap cleanstrap restrap
.PHONY: $(GCC_STRAP_TARGETS)
$(GCC_STRAP_TARGETS): all-bootstrap configure-gcc
@r=`${PWD}`; export r; \
s=`cd $(srcdir); ${PWD}`; export s; \
$(SET_LIB_PATH) \

6
configure vendored
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@ -1009,6 +1009,7 @@ case "${target}" in
# Skip some stuff that's unsupported on some NetBSD configurations.
case "${target}" in
i*86-*-netbsdelf*) ;;
arm*-*-netbsdelf*) ;;
*)
noconfigdirs="$noconfigdirs ${libgcj}"
;;
@ -1266,11 +1267,6 @@ case "${target}" in
powerpc-*-eabi)
noconfigdirs="$noconfigdirs ${libgcj}"
;;
powerpc64*-*-linux*)
noconfigdirs="$noconfigdirs target-newlib target-libgloss"
# not yet ported.
noconfigdirs="$noconfigdirs target-libffi"
;;
rs6000-*-lynxos*)
noconfigdirs="$noconfigdirs target-newlib gprof ${libgcj}"
;;

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@ -349,6 +349,7 @@ case "${target}" in
# Skip some stuff that's unsupported on some NetBSD configurations.
case "${target}" in
i*86-*-netbsdelf*) ;;
arm*-*-netbsdelf*) ;;
*)
noconfigdirs="$noconfigdirs ${libgcj}"
;;
@ -606,11 +607,6 @@ case "${target}" in
powerpc-*-eabi)
noconfigdirs="$noconfigdirs ${libgcj}"
;;
powerpc64*-*-linux*)
noconfigdirs="$noconfigdirs target-newlib target-libgloss"
# not yet ported.
noconfigdirs="$noconfigdirs target-libffi"
;;
rs6000-*-lynxos*)
noconfigdirs="$noconfigdirs target-newlib gprof ${libgcj}"
;;

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@ -1,3 +1,9 @@
2003-04-15 Rohit Kumar Srivastava <rohits@kpitcummins.com>
* sh.h: Replace occurrances of 'Hitachi' with 'Renesas'.
* h8300.h: Likewise.
* h8500.h: Likewise.
2003-03-25 Stan Cox <scox@redhat.com>
Nick Clifton <nickc@redhat.com>

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@ -1,6 +1,6 @@
/* coff information for Hitachi H8/300 and H8/300-H
/* coff information for Renesas H8/300 and H8/300-H
Copyright 2001 Free Software Foundation, Inc.
Copyright 2001, 2003 Free Software Foundation, Inc.
This program is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by

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@ -1,6 +1,6 @@
/* coff information for Hitachi H8/500
/* coff information for Renesas H8/500
Copyright 2001 Free Software Foundation, Inc.
Copyright 2001, 2003 Free Software Foundation, Inc.
This program is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by

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@ -1,6 +1,6 @@
/* coff information for Hitachi SH
/* coff information for Renesas SH
Copyright 2001 Free Software Foundation, Inc.
Copyright 2001, 2003 Free Software Foundation, Inc.
This program is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by

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@ -1,3 +1,7 @@
2003-04-15 Rohit Kumar Srivastava <rohits@kpitcummins.com>
* common.h: Replace occurrances of 'Hitachi' with 'Renesas'.
2003-04-01 Bob Wilson <bob.wilson@acm.org>
* elf/common.h (EM_XTENSA_OLD): Define.

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@ -7,32 +7,32 @@
in "UNIX System V Release 4, Programmers Guide: ANSI C and
Programming Support Tools".
This file is part of BFD, the Binary File Descriptor library.
This file is part of BFD, the Binary File Descriptor library.
This program is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 2 of the License, or
(at your option) any later version.
This program is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 2 of the License, or
(at your option) any later version.
This program is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
This program is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with this program; if not, write to the Free Software
Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
You should have received a copy of the GNU General Public License
along with this program; if not, write to the Free Software
Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
/* This file is part of ELF support for BFD, and contains the portions
that are common to both the internal and external representations.
For example, ELFMAG0 is the byte 0x7F in both the internal (in-memory)
and external (in-file) representations. */
and external (in-file) representations. */
#ifndef _ELF_COMMON_H
#define _ELF_COMMON_H
/* Fields in e_ident[] */
/* Fields in e_ident[]. */
#define EI_MAG0 0 /* File identification byte 0 index */
#define ELFMAG0 0x7F /* Magic number byte 0 */
@ -126,14 +126,14 @@ Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
#define EM_RCE 39 /* Old name for MCore */
#define EM_ARM 40 /* ARM */
#define EM_OLD_ALPHA 41 /* Digital Alpha */
#define EM_SH 42 /* Hitachi SH */
#define EM_SH 42 /* Renesas (formerly Hitachi) SH */
#define EM_SPARCV9 43 /* SPARC v9 64-bit */
#define EM_TRICORE 44 /* Siemens Tricore embedded processor */
#define EM_ARC 45 /* ARC Cores */
#define EM_H8_300 46 /* Hitachi H8/300 */
#define EM_H8_300H 47 /* Hitachi H8/300H */
#define EM_H8S 48 /* Hitachi H8S */
#define EM_H8_500 49 /* Hitachi H8/500 */
#define EM_H8_300 46 /* Renesas (formerly Hitachi) H8/300 */
#define EM_H8_300H 47 /* Renesas (formerly Hitachi) H8/300H */
#define EM_H8S 48 /* Renesas (formerly Hitachi) H8S */
#define EM_H8_500 49 /* Renesas (formerly Hitachi) H8/500 */
#define EM_IA_64 50 /* Intel IA-64 Processor */
#define EM_MIPS_X 51 /* Stanford MIPS-X */
#define EM_COLDFIRE 52 /* Motorola Coldfire */

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@ -1,3 +1,11 @@
2003-04-07 Michael Snyder <msnyder@redhat.com>
* h8300.h (ldc/stc): Fix up src/dst swaps.
2003-04-09 J. Grant <jg-binutils@jguk.org>
* mips.h: Correct comment typo.
2003-03-21 Martin Schwidefsky <schwidefsky@de.ibm.com>
* s390.h (s390_opcode_arch_val): Rename to s390_opcode_mode_val.

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@ -436,7 +436,7 @@ const struct h8_opcode h8_opcodes[] =
NEW_SOP(O(O_LDC,SB),0,2,"ldc"),{{DISP|SRC|L_16,CCR|DST,E}},{{PREFIXLDC,0x6,0xF,B30|DISPREG,0,DISP|L_16,IGNORE,IGNORE,IGNORE,E}}EOP,
NEW_SOP(O(O_LDC,SB),0,2,"ldc"),{{DISP|SRC|L_32,CCR|DST,E}},{{PREFIXLDC,0x7,0x8,B30|DISPREG,0,0x6,0xB,0x2,0x0,SRC|DISP32LIST,E}}EOP,
NEW_SOP(O(O_LDC,SB),0,2,"ldc"),{{RSINC,CCR|DST,E}}, {{PREFIXLDC,0x6,0xD,B30|RSINC,0x0,E}}EOP,
NEW_SOP(O(O_LDC,SB),0,2,"ldc"),{{RSIND,CCR|DST,E}}, {{PREFIXLDC,0x6,0x9,B30|RDIND,0x0,E}} EOP,
NEW_SOP(O(O_LDC,SB),0,2,"ldc"),{{RSIND,CCR|DST,E}}, {{PREFIXLDC,0x6,0x9,B30|RSIND,0x0,E}} EOP,
NEW_SOP(O(O_LDC,SB),1,2,"ldc"),{{IMM8,EXR|DST,E}}, {{ 0x0,0x1,0x4,0x1,0x0,0x7,IMM8,IGNORE,E,0,0,0,0}}EOP,
NEW_SOP(O(O_LDC,SB),1,2,"ldc"),{{OR8,EXR|DST,E}}, {{ 0x0,0x3,0x1,OR8,E,0,0,0,0}}EOP,
@ -445,7 +445,7 @@ const struct h8_opcode h8_opcodes[] =
NEW_SOP(O(O_LDC,SB),0,2,"ldc"),{{DISP|SRC|L_16,EXR|DST,E}},{{ 0x0,0x1,0x4,0x1,0x6,0xf,B30|DISPREG,0,DISP|L_16,IGNORE,IGNORE,IGNORE,E}}EOP,
NEW_SOP(O(O_LDC,SB),0,2,"ldc"),{{DISP|SRC|L_32,EXR|DST,E}},{{ 0x0,0x1,0x4,0x1,0x7,0x8,B30|DISPREG,0,0x6,0xB,0x2,0x0,SRC|DISP32LIST,E}}EOP,
NEW_SOP(O(O_LDC,SB),0,2,"ldc"),{{RSINC,EXR|DST,E}}, {{ 0x0,0x1,0x4,0x1,0x6,0xd,B30|RSINC,0x0,E}}EOP,
NEW_SOP(O(O_LDC,SB),0,2,"ldc"),{{RSIND,EXR|DST,E}}, {{ 0x0,0x1,0x4,0x1,0x6,0x9,B30|RDIND,0x0,E}} EOP,
NEW_SOP(O(O_LDC,SB),0,2,"ldc"),{{RSIND,EXR|DST,E}}, {{ 0x0,0x1,0x4,0x1,0x6,0x9,B30|RSIND,0x0,E}} EOP,
SOP(O(O_MOV_TO_REG,SB),4,"mov.b"),{{ABS|SRC|L_16|MEMRELAX,RD8,E}}, {{ 0x6,0xA,0x0,RD8,SRC|ABS|MEMRELAX|A16LIST,E}}EOP,
SOP(O(O_MOV_TO_REG,SB),6,"mov.b"),{{ABS|SRC|L_32|MEMRELAX,RD8,E }}, {{ 0x6,0xA,0x2,RD8,SRC|ABS|MEMRELAX|A32LIST,E }}EOP,
@ -556,7 +556,7 @@ const struct h8_opcode h8_opcodes[] =
NEW_SOP(O(O_STC,SB), 1,2,"stc"),{{CCR|SRC,RD8,E}},{{ 0x0,0x2,0x0,RD8,E,0,0,0,0}} EOP,
NEW_SOP(O(O_STC,SB),0,2,"stc"),{{CCR|SRC,RSIND,E}}, {{PREFIXLDC,0x6,0x9,B31|RDIND,0x0,E}} EOP,
NEW_SOP(O(O_STC,SB),0,2,"stc"),{{CCR|SRC,RDIND,E}}, {{PREFIXLDC,0x6,0x9,B31|RDIND,0x0,E}} EOP,
NEW_SOP(O(O_STC,SB),0,2,"stc"),{{CCR|SRC,DISP|DST|L_16,E}},{{PREFIXLDC,0x6,0xF,B31|DISPREG,0,DST|DISP|L_16,IGNORE,IGNORE,IGNORE,E}}EOP,
NEW_SOP(O(O_STC,SB),0,2,"stc"),{{CCR|SRC,DISP|DST|L_32,E}},{{PREFIXLDC,0x7,0x8,B30|DISPREG,0,0x6,0xB,0xA,0x0,DST|DISP32LIST,E}}EOP,
NEW_SOP(O(O_STC,SB),0,2,"stc"),{{CCR|SRC,RDDEC,E}}, {{PREFIXLDC,0x6,0xD,B31|RDDEC,0x0,E}}EOP,
@ -566,7 +566,7 @@ const struct h8_opcode h8_opcodes[] =
NEW_SOP(O(O_STC,SB), 1,2,"stc"),{{EXR|SRC,RD8,E}},{{ 0x0,0x2,0x1,RD8,E,0,0,0,0}} EOP,
NEW_SOP(O(O_STC,SB),0,2,"stc"),{{EXR|SRC,RSIND,E}}, {{0x0,0x1,0x4,0x1,0x6,0x9,B31|RDIND,0x0,E}} EOP,
NEW_SOP(O(O_STC,SB),0,2,"stc"),{{EXR|SRC,RDIND,E}}, {{0x0,0x1,0x4,0x1,0x6,0x9,B31|RDIND,0x0,E}} EOP,
NEW_SOP(O(O_STC,SB),0,2,"stc"),{{EXR|SRC,DISP|DST|L_16,E}},{{0x0,0x1,0x4,0x1,0x6,0xF,B31|DISPREG,0,DST|DISP|L_16,IGNORE,IGNORE,IGNORE,E}}EOP,
NEW_SOP(O(O_STC,SB),0,2,"stc"),{{EXR|SRC,DISP|DST|L_32,E}},{{0x0,0x1,0x4,0x1,0x7,0x8,B30|DISPREG,0,0x6,0xB,0xA,0x0,DST|DISP32LIST,E}}EOP,
NEW_SOP(O(O_STC,SB),0,2,"stc"),{{EXR|SRC,RDDEC,E}}, {{0x0,0x1,0x4,0x1,0x6,0xD,B31|RDDEC,0x0,E}}EOP,

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@ -197,7 +197,7 @@ struct mips_opcode
unsigned long membership;
};
/* These are the characters which may appears in the args field of an
/* These are the characters which may appear in the args field of an
instruction. They appear in the order in which the fields appear
when the instruction is used. Commas and parentheses in the args
string are ignored when assembling, and written into the output

2
libtool.m4 vendored
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@ -636,7 +636,7 @@ irix5* | irix6*)
# This must be Linux ELF.
linux-gnu*)
case $host_cpu in
alpha* | hppa* | i*86 | powerpc* | sparc* | ia64* )
alpha* | mips* | hppa* | i*86 | powerpc* | sparc* | ia64* )
lt_cv_deplibs_check_method=pass_all ;;
*)
# glibc up to 2.1.1 does not perform some relocations on ARM