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This commit was manufactured by cvs2svn to create branch
'kettenis_i386newframe-20030419-branch'. Sprout from kettenis_i386newframe-20030406-branch 2003-04-04 08:15:16 UTC cvs2svn 'This commit was manufactured by cvs2svn to create branch' Cherrypick from master 2003-04-19 00:19:40 UTC DJ Delorie <dj@redhat.com> '* Makefile.tpl (MAKEINFOFLAGS): Default to --split-size=5000000.': ChangeLog Makefile.in Makefile.tpl configure configure.in include/coff/ChangeLog include/coff/h8300.h include/coff/h8500.h include/coff/sh.h include/elf/ChangeLog include/elf/common.h include/opcode/ChangeLog include/opcode/h8300.h include/opcode/mips.h libtool.m4
This commit is contained in:
parent
44c1c61b1d
commit
cd4993ccbb
27
ChangeLog
27
ChangeLog
@ -1,3 +1,30 @@
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2003-04-18 Gerald Pfeifer <pfeifer@dbai.tuwien.ac.at>
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* Makefile.tpl (MAKEINFOFLAGS): Default to --split-size=5000000.
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* Makefile.in: Regenerate.
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2003-04-18 Jakub Jelinek <jakub@redhat.com>
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* configure.in (powerpc64*-*-linux*): Remove.
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* configure: Rebuilt.
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2003-04-17 Phil Edwards <pme@gcc.gnu.org>
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* Makefile.tpl (GCC_STRAP_TARGETS): New variable containing all the
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previous bootstrap targets, plus bubblestrap, quickstrap, cleanstrap,
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and restrap.
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* Makefile.in: Regenerate.
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2003-04-16 Richard Earnshaw <rearnsha@arm.com>
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* configure.in (arm-*-netbsdelf*): Enable building java libraries.
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* configure: Regenerated.
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2003-04-11 Alexandre Oliva <aoliva@redhat.com>
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* libtool.m4 (lt_cv_deplibs_check_method): Use pass_all on mips*.
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* */configure: Rebuilt.
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2003-03-14 Nathanael Nerode <neroden@gcc.gnu.org>
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* Makefile.tpl: Move .NOEXPORT, MAKEOVERRIDES back down.
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@ -203,7 +203,8 @@ USUAL_MAKEINFO = `if [ -f $$r/texinfo/makeinfo/makeinfo ] ; \
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# This just becomes part of the MAKEINFO definition passed down to
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# sub-makes. It lets flags be given on the command line while still
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# using the makeinfo from the object tree.
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MAKEINFOFLAGS =
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# (Default to avoid splitting info files by setting the threshold high.)
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MAKEINFOFLAGS = --split-size=5000000
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EXPECT = `if [ -f $$r/expect/expect ] ; \
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then echo $$r/expect/expect ; \
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@ -7264,8 +7265,9 @@ all-gcc: configure-gcc
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# In theory, on an SMP all those dependencies can be resolved
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# in parallel.
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#
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.PHONY: bootstrap bootstrap-lean bootstrap2 bootstrap2-lean bootstrap3 bootstrap3-lean bootstrap4 bootstrap4-lean bubblestrap quickstrap cleanstrap restrap
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bootstrap bootstrap-lean bootstrap2 bootstrap2-lean bootstrap3 bootstrap3-lean bootstrap4 bootstrap4-lean bubblestrap quickstrap cleanstrap restrap: all-bootstrap configure-gcc
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GCC_STRAP_TARGETS = bootstrap bootstrap-lean bootstrap2 bootstrap2-lean bootstrap3 bootstrap3-lean bootstrap4 bootstrap4-lean bubblestrap quickstrap cleanstrap restrap
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.PHONY: $(GCC_STRAP_TARGETS)
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$(GCC_STRAP_TARGETS): all-bootstrap configure-gcc
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@r=`${PWD}`; export r; \
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s=`cd $(srcdir); ${PWD}`; export s; \
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$(SET_LIB_PATH) \
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@ -206,7 +206,8 @@ USUAL_MAKEINFO = `if [ -f $$r/texinfo/makeinfo/makeinfo ] ; \
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# This just becomes part of the MAKEINFO definition passed down to
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# sub-makes. It lets flags be given on the command line while still
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# using the makeinfo from the object tree.
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MAKEINFOFLAGS =
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# (Default to avoid splitting info files by setting the threshold high.)
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MAKEINFOFLAGS = --split-size=5000000
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EXPECT = `if [ -f $$r/expect/expect ] ; \
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then echo $$r/expect/expect ; \
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@ -1189,8 +1190,9 @@ all-gcc: configure-gcc
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# In theory, on an SMP all those dependencies can be resolved
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# in parallel.
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#
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.PHONY: bootstrap bootstrap-lean bootstrap2 bootstrap2-lean bootstrap3 bootstrap3-lean bootstrap4 bootstrap4-lean bubblestrap quickstrap cleanstrap restrap
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bootstrap bootstrap-lean bootstrap2 bootstrap2-lean bootstrap3 bootstrap3-lean bootstrap4 bootstrap4-lean bubblestrap quickstrap cleanstrap restrap: all-bootstrap configure-gcc
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GCC_STRAP_TARGETS = bootstrap bootstrap-lean bootstrap2 bootstrap2-lean bootstrap3 bootstrap3-lean bootstrap4 bootstrap4-lean bubblestrap quickstrap cleanstrap restrap
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.PHONY: $(GCC_STRAP_TARGETS)
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$(GCC_STRAP_TARGETS): all-bootstrap configure-gcc
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@r=`${PWD}`; export r; \
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s=`cd $(srcdir); ${PWD}`; export s; \
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$(SET_LIB_PATH) \
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6
configure
vendored
6
configure
vendored
@ -1009,6 +1009,7 @@ case "${target}" in
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# Skip some stuff that's unsupported on some NetBSD configurations.
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case "${target}" in
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i*86-*-netbsdelf*) ;;
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arm*-*-netbsdelf*) ;;
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*)
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noconfigdirs="$noconfigdirs ${libgcj}"
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;;
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@ -1266,11 +1267,6 @@ case "${target}" in
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powerpc-*-eabi)
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noconfigdirs="$noconfigdirs ${libgcj}"
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;;
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powerpc64*-*-linux*)
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noconfigdirs="$noconfigdirs target-newlib target-libgloss"
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# not yet ported.
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noconfigdirs="$noconfigdirs target-libffi"
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;;
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rs6000-*-lynxos*)
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noconfigdirs="$noconfigdirs target-newlib gprof ${libgcj}"
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;;
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@ -349,6 +349,7 @@ case "${target}" in
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# Skip some stuff that's unsupported on some NetBSD configurations.
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case "${target}" in
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i*86-*-netbsdelf*) ;;
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arm*-*-netbsdelf*) ;;
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*)
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noconfigdirs="$noconfigdirs ${libgcj}"
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;;
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@ -606,11 +607,6 @@ case "${target}" in
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powerpc-*-eabi)
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noconfigdirs="$noconfigdirs ${libgcj}"
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;;
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powerpc64*-*-linux*)
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noconfigdirs="$noconfigdirs target-newlib target-libgloss"
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# not yet ported.
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noconfigdirs="$noconfigdirs target-libffi"
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;;
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rs6000-*-lynxos*)
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noconfigdirs="$noconfigdirs target-newlib gprof ${libgcj}"
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;;
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@ -1,3 +1,9 @@
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2003-04-15 Rohit Kumar Srivastava <rohits@kpitcummins.com>
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* sh.h: Replace occurrances of 'Hitachi' with 'Renesas'.
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* h8300.h: Likewise.
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* h8500.h: Likewise.
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2003-03-25 Stan Cox <scox@redhat.com>
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Nick Clifton <nickc@redhat.com>
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@ -1,6 +1,6 @@
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/* coff information for Hitachi H8/300 and H8/300-H
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/* coff information for Renesas H8/300 and H8/300-H
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Copyright 2001 Free Software Foundation, Inc.
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Copyright 2001, 2003 Free Software Foundation, Inc.
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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@ -1,6 +1,6 @@
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/* coff information for Hitachi H8/500
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/* coff information for Renesas H8/500
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Copyright 2001 Free Software Foundation, Inc.
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Copyright 2001, 2003 Free Software Foundation, Inc.
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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@ -1,6 +1,6 @@
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/* coff information for Hitachi SH
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/* coff information for Renesas SH
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Copyright 2001 Free Software Foundation, Inc.
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Copyright 2001, 2003 Free Software Foundation, Inc.
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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@ -1,3 +1,7 @@
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2003-04-15 Rohit Kumar Srivastava <rohits@kpitcummins.com>
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* common.h: Replace occurrances of 'Hitachi' with 'Renesas'.
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2003-04-01 Bob Wilson <bob.wilson@acm.org>
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* elf/common.h (EM_XTENSA_OLD): Define.
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@ -7,32 +7,32 @@
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in "UNIX System V Release 4, Programmers Guide: ANSI C and
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Programming Support Tools".
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This file is part of BFD, the Binary File Descriptor library.
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This file is part of BFD, the Binary File Descriptor library.
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 2 of the License, or
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(at your option) any later version.
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 2 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program; if not, write to the Free Software
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Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
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You should have received a copy of the GNU General Public License
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along with this program; if not, write to the Free Software
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Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
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/* This file is part of ELF support for BFD, and contains the portions
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that are common to both the internal and external representations.
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For example, ELFMAG0 is the byte 0x7F in both the internal (in-memory)
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and external (in-file) representations. */
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and external (in-file) representations. */
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#ifndef _ELF_COMMON_H
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#define _ELF_COMMON_H
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/* Fields in e_ident[] */
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/* Fields in e_ident[]. */
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#define EI_MAG0 0 /* File identification byte 0 index */
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#define ELFMAG0 0x7F /* Magic number byte 0 */
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@ -126,14 +126,14 @@ Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
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#define EM_RCE 39 /* Old name for MCore */
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#define EM_ARM 40 /* ARM */
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#define EM_OLD_ALPHA 41 /* Digital Alpha */
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#define EM_SH 42 /* Hitachi SH */
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#define EM_SH 42 /* Renesas (formerly Hitachi) SH */
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#define EM_SPARCV9 43 /* SPARC v9 64-bit */
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#define EM_TRICORE 44 /* Siemens Tricore embedded processor */
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#define EM_ARC 45 /* ARC Cores */
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#define EM_H8_300 46 /* Hitachi H8/300 */
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#define EM_H8_300H 47 /* Hitachi H8/300H */
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#define EM_H8S 48 /* Hitachi H8S */
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#define EM_H8_500 49 /* Hitachi H8/500 */
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#define EM_H8_300 46 /* Renesas (formerly Hitachi) H8/300 */
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#define EM_H8_300H 47 /* Renesas (formerly Hitachi) H8/300H */
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#define EM_H8S 48 /* Renesas (formerly Hitachi) H8S */
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#define EM_H8_500 49 /* Renesas (formerly Hitachi) H8/500 */
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#define EM_IA_64 50 /* Intel IA-64 Processor */
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#define EM_MIPS_X 51 /* Stanford MIPS-X */
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#define EM_COLDFIRE 52 /* Motorola Coldfire */
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@ -1,3 +1,11 @@
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2003-04-07 Michael Snyder <msnyder@redhat.com>
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* h8300.h (ldc/stc): Fix up src/dst swaps.
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2003-04-09 J. Grant <jg-binutils@jguk.org>
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* mips.h: Correct comment typo.
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2003-03-21 Martin Schwidefsky <schwidefsky@de.ibm.com>
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* s390.h (s390_opcode_arch_val): Rename to s390_opcode_mode_val.
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|
@ -436,7 +436,7 @@ const struct h8_opcode h8_opcodes[] =
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NEW_SOP(O(O_LDC,SB),0,2,"ldc"),{{DISP|SRC|L_16,CCR|DST,E}},{{PREFIXLDC,0x6,0xF,B30|DISPREG,0,DISP|L_16,IGNORE,IGNORE,IGNORE,E}}EOP,
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NEW_SOP(O(O_LDC,SB),0,2,"ldc"),{{DISP|SRC|L_32,CCR|DST,E}},{{PREFIXLDC,0x7,0x8,B30|DISPREG,0,0x6,0xB,0x2,0x0,SRC|DISP32LIST,E}}EOP,
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NEW_SOP(O(O_LDC,SB),0,2,"ldc"),{{RSINC,CCR|DST,E}}, {{PREFIXLDC,0x6,0xD,B30|RSINC,0x0,E}}EOP,
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NEW_SOP(O(O_LDC,SB),0,2,"ldc"),{{RSIND,CCR|DST,E}}, {{PREFIXLDC,0x6,0x9,B30|RDIND,0x0,E}} EOP,
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NEW_SOP(O(O_LDC,SB),0,2,"ldc"),{{RSIND,CCR|DST,E}}, {{PREFIXLDC,0x6,0x9,B30|RSIND,0x0,E}} EOP,
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NEW_SOP(O(O_LDC,SB),1,2,"ldc"),{{IMM8,EXR|DST,E}}, {{ 0x0,0x1,0x4,0x1,0x0,0x7,IMM8,IGNORE,E,0,0,0,0}}EOP,
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NEW_SOP(O(O_LDC,SB),1,2,"ldc"),{{OR8,EXR|DST,E}}, {{ 0x0,0x3,0x1,OR8,E,0,0,0,0}}EOP,
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@ -445,7 +445,7 @@ const struct h8_opcode h8_opcodes[] =
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NEW_SOP(O(O_LDC,SB),0,2,"ldc"),{{DISP|SRC|L_16,EXR|DST,E}},{{ 0x0,0x1,0x4,0x1,0x6,0xf,B30|DISPREG,0,DISP|L_16,IGNORE,IGNORE,IGNORE,E}}EOP,
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NEW_SOP(O(O_LDC,SB),0,2,"ldc"),{{DISP|SRC|L_32,EXR|DST,E}},{{ 0x0,0x1,0x4,0x1,0x7,0x8,B30|DISPREG,0,0x6,0xB,0x2,0x0,SRC|DISP32LIST,E}}EOP,
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NEW_SOP(O(O_LDC,SB),0,2,"ldc"),{{RSINC,EXR|DST,E}}, {{ 0x0,0x1,0x4,0x1,0x6,0xd,B30|RSINC,0x0,E}}EOP,
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NEW_SOP(O(O_LDC,SB),0,2,"ldc"),{{RSIND,EXR|DST,E}}, {{ 0x0,0x1,0x4,0x1,0x6,0x9,B30|RDIND,0x0,E}} EOP,
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NEW_SOP(O(O_LDC,SB),0,2,"ldc"),{{RSIND,EXR|DST,E}}, {{ 0x0,0x1,0x4,0x1,0x6,0x9,B30|RSIND,0x0,E}} EOP,
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SOP(O(O_MOV_TO_REG,SB),4,"mov.b"),{{ABS|SRC|L_16|MEMRELAX,RD8,E}}, {{ 0x6,0xA,0x0,RD8,SRC|ABS|MEMRELAX|A16LIST,E}}EOP,
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SOP(O(O_MOV_TO_REG,SB),6,"mov.b"),{{ABS|SRC|L_32|MEMRELAX,RD8,E }}, {{ 0x6,0xA,0x2,RD8,SRC|ABS|MEMRELAX|A32LIST,E }}EOP,
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@ -556,7 +556,7 @@ const struct h8_opcode h8_opcodes[] =
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NEW_SOP(O(O_STC,SB), 1,2,"stc"),{{CCR|SRC,RD8,E}},{{ 0x0,0x2,0x0,RD8,E,0,0,0,0}} EOP,
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NEW_SOP(O(O_STC,SB),0,2,"stc"),{{CCR|SRC,RSIND,E}}, {{PREFIXLDC,0x6,0x9,B31|RDIND,0x0,E}} EOP,
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NEW_SOP(O(O_STC,SB),0,2,"stc"),{{CCR|SRC,RDIND,E}}, {{PREFIXLDC,0x6,0x9,B31|RDIND,0x0,E}} EOP,
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NEW_SOP(O(O_STC,SB),0,2,"stc"),{{CCR|SRC,DISP|DST|L_16,E}},{{PREFIXLDC,0x6,0xF,B31|DISPREG,0,DST|DISP|L_16,IGNORE,IGNORE,IGNORE,E}}EOP,
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NEW_SOP(O(O_STC,SB),0,2,"stc"),{{CCR|SRC,DISP|DST|L_32,E}},{{PREFIXLDC,0x7,0x8,B30|DISPREG,0,0x6,0xB,0xA,0x0,DST|DISP32LIST,E}}EOP,
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NEW_SOP(O(O_STC,SB),0,2,"stc"),{{CCR|SRC,RDDEC,E}}, {{PREFIXLDC,0x6,0xD,B31|RDDEC,0x0,E}}EOP,
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@ -566,7 +566,7 @@ const struct h8_opcode h8_opcodes[] =
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NEW_SOP(O(O_STC,SB), 1,2,"stc"),{{EXR|SRC,RD8,E}},{{ 0x0,0x2,0x1,RD8,E,0,0,0,0}} EOP,
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NEW_SOP(O(O_STC,SB),0,2,"stc"),{{EXR|SRC,RSIND,E}}, {{0x0,0x1,0x4,0x1,0x6,0x9,B31|RDIND,0x0,E}} EOP,
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NEW_SOP(O(O_STC,SB),0,2,"stc"),{{EXR|SRC,RDIND,E}}, {{0x0,0x1,0x4,0x1,0x6,0x9,B31|RDIND,0x0,E}} EOP,
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NEW_SOP(O(O_STC,SB),0,2,"stc"),{{EXR|SRC,DISP|DST|L_16,E}},{{0x0,0x1,0x4,0x1,0x6,0xF,B31|DISPREG,0,DST|DISP|L_16,IGNORE,IGNORE,IGNORE,E}}EOP,
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NEW_SOP(O(O_STC,SB),0,2,"stc"),{{EXR|SRC,DISP|DST|L_32,E}},{{0x0,0x1,0x4,0x1,0x7,0x8,B30|DISPREG,0,0x6,0xB,0xA,0x0,DST|DISP32LIST,E}}EOP,
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NEW_SOP(O(O_STC,SB),0,2,"stc"),{{EXR|SRC,RDDEC,E}}, {{0x0,0x1,0x4,0x1,0x6,0xD,B31|RDDEC,0x0,E}}EOP,
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|
@ -197,7 +197,7 @@ struct mips_opcode
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unsigned long membership;
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};
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/* These are the characters which may appears in the args field of an
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/* These are the characters which may appear in the args field of an
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instruction. They appear in the order in which the fields appear
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when the instruction is used. Commas and parentheses in the args
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string are ignored when assembling, and written into the output
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|
2
libtool.m4
vendored
2
libtool.m4
vendored
@ -636,7 +636,7 @@ irix5* | irix6*)
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# This must be Linux ELF.
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linux-gnu*)
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case $host_cpu in
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alpha* | hppa* | i*86 | powerpc* | sparc* | ia64* )
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alpha* | mips* | hppa* | i*86 | powerpc* | sparc* | ia64* )
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lt_cv_deplibs_check_method=pass_all ;;
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*)
|
||||
# glibc up to 2.1.1 does not perform some relocations on ARM
|
||||
|
Loading…
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Reference in New Issue
Block a user