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newlib-cygwin
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include: 

* opcode/arm.h: Adjust comments for ARM_EXT_V4T and ARM_EXT_V5T.
	Add ARM_EXT_V6T2, ARM_ARCH_V6T2, ARM_ARCH_V6KT2, ARM_ARCH_V6ZT2,
	and ARM_ARCH_V6ZKT2.
opcodes:
	* arm-dis.c (arm_opcodes): Document %E and %V.
	Add entries for v6T2 ARM instructions:
	bfc bfi mls strht ldrht ldrsht ldrsbt movw movt rbit ubfx sbfx.
	(print_insn_arm): Add support for %E and %V.
This commit is contained in:
Zack Weinberg 2005-03-12 18:14:05 +00:00
parent ac7bc2d470
commit be4edc9b08
2 changed files with 15 additions and 4 deletions
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10
include/ChangeLog
View File

@ -1,3 +1,9 @@
2005-03-12 Zack Weinberg <zack@codesourcery.com>
* opcode/arm.h: Adjust comments for ARM_EXT_V4T and ARM_EXT_V5T.
Add ARM_EXT_V6T2, ARM_ARCH_V6T2, ARM_ARCH_V6KT2, ARM_ARCH_V6ZT2,
and ARM_ARCH_V6ZKT2.
2005-03-09 Mark Mitchell <mark@codesourcery.com>
* libiberty.h (gettimeofday): Declare.
@ -58,7 +64,7 @@
* dis-asm.h: Add prototype for print_insn_maxq_little.
2004-11-05 Tomer Levi <Tomer.Levi@nsc.com>
* opcode/crx.h (enum argtype): Rename types, remove unused types.
2004-10-27 Richard Earnshaw <rearnsha@arm.com>
@ -71,7 +77,7 @@
(enum reg_type): Remove CRX_PC_REGTYPE, CRX_MTPR_REGTYPE.
(enum operand_type): Rearrange operands, edit comments.
replace us<N> with ui<N> for unsigned immediate.
replace d<N> with disps<N>/dispu<N>/dispe<N> for signed/unsigned/escaped
replace d<N> with disps<N>/dispu<N>/dispe<N> for signed/unsigned/escaped
displacements (respectively).
replace rbase_ridx_scl2_dispu<N> with rindex_disps<N> for register index.
(instruction type): Add NO_TYPE_INS.

9
include/opcode/arm.h
View File

@ -25,15 +25,16 @@
#define ARM_EXT_V3 0x00000008 /* MSR MRS. */
#define ARM_EXT_V3M 0x00000010 /* Allow long multiplies. */
#define ARM_EXT_V4 0x00000020 /* Allow half word loads. */
#define ARM_EXT_V4T 0x00000040 /* Thumb v1. */
#define ARM_EXT_V4T 0x00000040 /* Thumb. */
#define ARM_EXT_V5 0x00000080 /* Allow CLZ, etc. */
#define ARM_EXT_V5T 0x00000100 /* Thumb v2. */
#define ARM_EXT_V5T 0x00000100 /* Improved interworking. */
#define ARM_EXT_V5ExP 0x00000200 /* DSP core set. */
#define ARM_EXT_V5E 0x00000400 /* DSP Double transfers. */
#define ARM_EXT_V5J 0x00000800 /* Jazelle extension. */
#define ARM_EXT_V6 0x00001000 /* ARM V6. */
#define ARM_EXT_V6K 0x00002000 /* ARM V6K. */
#define ARM_EXT_V6Z 0x00004000 /* ARM V6Z. */
#define ARM_EXT_V6T2 0x00008000 /* Thumb-2. */
/* Co-processor space extensions. */
#define ARM_CEXT_XSCALE 0x00800000 /* Allow MIA etc. */
@ -65,6 +66,10 @@
#define ARM_ARCH_V6K (ARM_ARCH_V6 | ARM_EXT_V6K)
#define ARM_ARCH_V6Z (ARM_ARCH_V6 | ARM_EXT_V6Z)
#define ARM_ARCH_V6ZK (ARM_ARCH_V6 | ARM_EXT_V6K | ARM_EXT_V6Z)
#define ARM_ARCH_V6T2 (ARM_ARCH_V6 | ARM_EXT_V6T2)
#define ARM_ARCH_V6KT2 (ARM_ARCH_V6 | ARM_EXT_V6T2 | ARM_EXT_V6K)
#define ARM_ARCH_V6ZT2 (ARM_ARCH_V6 | ARM_EXT_V6T2 | ARM_EXT_V6Z)
#define ARM_ARCH_V6ZKT2 (ARM_ARCH_V6 | ARM_EXT_V6T2 | ARM_EXT_V6K | ARM_EXT_V6Z)
/* Processors with specific extensions in the co-processor space. */
#define ARM_ARCH_XSCALE (ARM_ARCH_V5TE | ARM_CEXT_XSCALE)