bfd ChangeLog

* elf32-xtensa.c (elf32xtensa_size_opt): New global variable.
	(xtensa_default_isa): Global variable moved here from xtensa-isa.c.
	(elf32xtensa_no_literal_movement): New global variable.
	(elf_howto_table): Add entries for new relocations.
	(elf_xtensa_reloc_type_lookup): Handle new relocations.
	(property_table_compare): When addresses are equal, compare sizes and
	various property flags.
	(property_table_matches): New.
	(xtensa_read_table_entries): Extend to read new property tables.  Add
	output_addr parameter to indicate that output addresses should be used.
	Use bfd_get_section_limit.
	(elf_xtensa_find_property_entry): New.
	(elf_xtensa_in_literal_pool): Use elf_xtensa_find_property_entry.
	(elf_xtensa_check_relocs): Handle new relocations.
	(elf_xtensa_do_reloc): Use bfd_get_section_limit.  Handle new
	relocations.  Use new xtensa-isa.h functions.
	(build_encoding_error_message): Remove encode_result parameter.  Add
	new target_address parameter used to detect alignment errors.
	(elf_xtensa_relocate_section): Use bfd_get_section_limit.  Clean up
	error handling.  Use new is_operand_relocation function.
	(elf_xtensa_combine_prop_entries, elf_xtensa_merge_private_bfd_data):
	Use underbar macro for error messages.  Formatting.
	(get_const16_opcode): New.
	(get_l32r_opcode): Add a separate flag for initialization.
	(get_relocation_opnd): Operand number is no longer explicit in the
	relocation.  Change to decode the opcode and analyze its operands.
	(get_relocation_slot): New.
	(get_relocation_opcode): Add bfd parameter.  Use bfd_get_section_limit.
	Use new xtensa-isa.h functions to handle multislot instructions.
	(is_l32r_relocation): Add bfd parameter.  Use is_operand_relocation.
	(get_asm_simplify_size, is_alt_relocation, is_operand_relocation,
	insn_decode_len, insn_decode_opcode, check_branch_target_aligned,
	check_loop_aligned, check_branch_target_aligned_address, narrowable,
	widenable, narrow_instruction, widen_instruction, op_single_fmt_table,
	get_single_format, init_op_single_format_table): New.
	(elf_xtensa_do_asm_simplify): Add error_message parameter and use it
	instead of calling _bfd_error_handler.  Use new xtensa-isa.h functions.
	(contract_asm_expansion): Add error_message parameter and pass it to
	elf_xtensa_do_asm_simplify.  Replace use of R_XTENSA_OP0 relocation
	with R_XTENSA_SLOT0_OP.
	(get_expanded_call_opcode): Extend to handle either L32R or CONST16
	instructions.  Use new xtensa-isa.h functions.
	(r_reloc struct): Add new virtual_offset field.
	(r_reloc_init): Add contents and content_length parameters.  Set
	virtual_offset field to zero.  Add contents to target_offset field for
	partial_inplace relocations.
	(r_reloc_is_defined): Check for null.
	(print_r_reloc): New debug function.
	(source_reloc struct): Replace xtensa_operand field with pair of the
	opcode and the operand position.  Add is_abs_literal field.
	(init_source_reloc): Specify operand by opcode/position pair.  Set
	is_abs_literal field.
	(source_reloc_compare): When target_offsets are equal, compare other
	fields to make sorting predictable.
	(literal_value struct): Add is_abs_literal field.
	(value_map_hash_table struct): Add has_last_loc and last_loc fields.
	(init_literal_value): New.
	(is_same_value): Replace with ...
	(literal_value_equal): ... this function.  Add comparisons of
	virtual_offset and is_abs_literal fields.
	(value_map_hash_table_init): Use bfd_zmalloc.  Check for allocation
	failure.  Initialize has_last_loc field.
	(value_map_hash_table_delete): New.
	(hash_literal_value): Rename to ...
	(literal_value_hash): ... this.  Include is_abs_literal flag and
	virtual_offset field in the hash value.
	(get_cached_value): Rename to ...
	(value_map_get_cached_value): ... this.  Update calls to
	literal_value_hash and literal_value_equal.
	(add_value_map): Check for allocation failure.  Update calls to
	value_map_get_cached_value and literal_value_hash.
	(text_action, text_action_list, text_action_t): New types.
	(find_fill_action, compute_removed_action_diff, adjust_fill_action,
	text_action_add, text_action_add_literal, offset_with_removed_text,
	offset_with_removed_text_before_fill, find_insn_action,
	print_action_list, print_removed_literals): New.
	(offset_with_removed_literals): Delete.
	(xtensa_relax_info struct): Add is_relaxable_asm_section, action_list,
	fix_array, fix_array_count, allocated_relocs, relocs_count, and
	allocated_relocs_count fields.
	(init_xtensa_relax_info): Initialize new fields.
	(reloc_bfd_fix struct): Add new translated field.
	(reloc_bfd_fix_init): Add translated parameter and use it to set the
	translated field.
	(fix_compare, cache_fix_array): New.
	(get_bfd_fix): Remove fix_list parameter and get all relax_info for the
	section via get_xtensa_relax_info.  Use cache_fix_array to set up
	sorted fix_array and use bsearch instead of linear search.
	(section_cache_t): New struct.
	(init_section_cache, section_cache_section, clear_section_cache): New.
	(ebb_t, ebb_target_enum, proposed_action, ebb_constraint): New types.
	(init_ebb_constraint, free_ebb_constraint, init_ebb, extend_ebb_bounds,
	extend_ebb_bounds_forward, extend_ebb_bounds_backward,
	insn_block_decodable_len, ebb_propose_action, ebb_add_proposed_action):
	New.
	(retrieve_contents): Use bfd_get_section_limit.
	(elf_xtensa_relax_section): Add relocations_analyzed flag.  Update call
	to compute_removed_literals.  Free value_map_hash_table when no longer
	needed.
	(analyze_relocations): Check is_relaxable_asm_section flag.  Call
	compute_text_actions for all sections.
	(find_relaxable_sections): Mark sections as relaxable if they contain
	ASM_EXPAND relocations that can be optimized.  Adjust r_reloc_init
	call.  Increment relax_info src_count field only for appropriate
	relocation types.  Remove is_literal_section check.
	(collect_source_relocs): Use bfd_get_section_limit.  Adjust calls to
	r_reloc_init and find_associated_l32r_irel.  Check
	is_relaxable_asm_section flag.  Handle L32R instructions with absolute
	literals.  Pass is_abs_literal flag to init_source_reloc.
	(is_resolvable_asm_expansion): Use bfd_get_section_limit.  Check for
	CONST16 instructions.  Adjust calls to r_reloc_init and
	pcrel_reloc_fits.  Handle weak symbols conservatively.
	(find_associated_l32r_irel): Add bfd parameter and pass it to
	is_l32r_relocation.
	(compute_text_actions, compute_ebb_proposed_actions,
	compute_ebb_actions, check_section_ebb_pcrels_fit,
	check_section_ebb_reduces, text_action_add_proposed,
	compute_fill_extra_space): New.
	(remove_literals): Replace with ...
	(compute_removed_literals): ... this function.  Call
	init_section_cache.  Use bfd_get_section_limit.  Sort internal_relocs.
	Call xtensa_read_table_entries to get the property table.  Skip
	relocations other than R_XTENSA_32 and R_XTENSA_PLT.  Use new
	is_removable_literal, remove_dead_literal, and
	identify_literal_placement functions.
	(get_irel_at_offset): Rewrite to use bsearch on sorted relocations
	instead of linear search.
	(is_removable_literal, remove_dead_literal,
	identify_literal_placement): New.
	(relocations_reach): Update check for literal not referenced by any
	PC-relative relocations.  Adjust call to pcrel_reloc_fits.
	(coalesce_shared_literal, move_shared_literal): New.
	(relax_section): Use bfd_get_section_limit.  Call
	translate_section_fixes.  Update calls to r_reloc_init and
	offset_with_removed_text.  Check new is_relaxable_asm_section flag.
	Add call to pin_internal_relocs.  Add special handling for
	R_XTENSA_ASM_SIMPLIFY and R_XTENSA_DIFF* relocs.  Use virtual_offset
	info to calculate new addend_displacement variable.  Replace code for
	deleting literals with more general code to perform the actions
	determined by the action_list for the section.
	(translate_section_fixes, translate_reloc_bfd_fix): New.
	(translate_reloc): Check new is_relaxable_asm_section flag.  Call
	find_removed_literal only if is_operand_relocation.  Update call to
	offset_with_removed_text.  Use new target_offset and removed_bytes
	variables.
	(move_literal): New.
	(relax_property_section):  Use bfd_get_section_limit.  Set new
	is_full_prop_section flag and handle new property tables.  Update calls
	to r_reloc_init and offset_with_removed_text.  Check
	is_relaxable_asm_section flag.  Handle expansion of zero-sized
	unreachable entries, with use of offset_with_removed_text_before_fill.
	For relocatable links, combine entries only for literal tables.
	(relax_section_symbols): Check is_relaxable_asm_section flag.  Update
	calls to offset_with_removed_text.  Translate st_size field for
	function symbols.
	(do_fix_for_relocatable_link): Change to return bfd_boolean to indicate
	failure.  Add contents parameter.  Update call to get_bfd_fix.  Update
	call to r_reloc_init.  Call _bfd_error_handler and return FALSE for
	R_XTENSA_ASM_EXPAND relocs.
	(do_fix_for_final_link): Add input_bfd and contents parameters.  Update
	call to get_bfd_fix.  Include offset from contents for partial_inplace
	relocations.
	(is_reloc_sym_weak): New.
	(pcrel_reloc_fits): Use new xtensa-isa.h functions.
	(prop_sec_len): New.
	(xtensa_is_property_section): Handle new property sections.
	(is_literal_section): Delete.
	(internal_reloc_compare): When r_offset matches, compare r_info and
	r_addend to make sorting predictable.
	(internal_reloc_matches): New.
	(xtensa_get_property_section_name): Handle new property sections.
	(xtensa_get_property_predef_flags): New.
	(xtensa_callback_required_dependence): Use bfd_get_section_limit.
	Update calls to xtensa_isa_init, is_l32r_relocation, and r_reloc_init.
	* xtensa-isa.c (xtensa_default_isa): Moved to elf32-xtensa.c.
	(xtisa_errno, xtisa_error_msg): New variables.
	(xtensa_isa_errno, xtensa_isa_error_msg): New.
	(xtensa_insnbuf_alloc): Add error handling.
	(xtensa_insnbuf_to_chars): Add num_chars parameter.  Update to
	use xtensa_format_decode.  Add error handling.
	(xtensa_insnbuf_from_chars): Add num_chars parameter.  Decode the
	instruction length to find the number of bytes to copy.
	(xtensa_isa_init): Add error handling.  Replace calls to
	xtensa_load_isa and xtensa_extend_isa with code to initialize lookup
	tables in the xtensa_modules structure.
	(xtensa_check_isa_config, xtensa_add_isa, xtensa_load_isa,
	xtensa_extend_isa): Delete.
	(xtensa_isa_free): Change to only free lookup tables.
	(opname_lookup_compare): Replace with ...
	(xtensa_isa_name_compare): ... this function.  Use strcasecmp.
	(xtensa_insn_maxlength): Rename to ...
	(xtensa_isa_maxlength): ... this.
	(xtensa_insn_length): Delete.
	(xtensa_insn_length_from_first_byte): Replace with ...
	(xtensa_isa_length_from_chars): ... this function.
	(xtensa_num_opcodes): Rename to ...
	(xtensa_isa_num_opcodes): ... this.
	(xtensa_isa_num_pipe_stages, xtensa_isa_num_formats,
	xtensa_isa_num_regfiles, xtensa_isa_num_stages,
	xtensa_isa_num_sysregs, xtensa_isa_num_interfaces,
	xtensa_isa_num_funcUnits, xtensa_format_name, xtensa_format_lookup,
	xtensa_format_decode, xtensa_format_encode, xtensa_format_length,
	xtensa_format_num_slots, xtensa_format_slot_nop_opcode,
	xtensa_format_get_slot, xtensa_format_set_slot): New functions.
	(xtensa_opcode_lookup): Add error handling.
	(xtensa_decode_insn): Replace with ...
	(xtensa_opcode_decode): ... this function, with new format and
	slot parameters.  Add error handling.
	(xtensa_encode_insn): Replace with ...
	(xtensa_opcode_encode): ... this function, which does the encoding via
	one of the entries in the "encode_fns" array.  Add error handling.
	(xtensa_opcode_name): Add error handling.
	(xtensa_opcode_is_branch, xtensa_opcode_is_jump, xtensa_opcode_is_loop,
	xtensa_opcode_is_call): New.
	(xtensa_num_operands): Replace with ...
	(xtensa_opcode_num_operands): ... this function.  Add error handling.
	(xtensa_opcode_num_stateOperands,
	xtensa_opcode_num_interfaceOperands, xtensa_opcode_num_funcUnit_uses,
	xtensa_opcode_funcUnit_use, xtensa_operand_name,
	xtensa_operand_is_visible): New.
	(xtensa_get_operand, xtensa_operand_kind): Delete.
	(xtensa_operand_inout): Add error handling and special-case for
	"sout" operands.
	(xtensa_operand_get_field, xtensa_operand_set_field): Rewritten to
	operate on one slot of an instruction.  Added error handling.
	(xtensa_operand_encode): Handle default operands with no encoding
	functions.  Check for success by comparing against decoded value.
	Add error handling.
	(xtensa_operand_decode): Handle default operands.  Return decoded value
	through argument pointer.  Add error handling.
	(xtensa_operand_is_register, xtensa_operand_regfile,
	xtensa_operand_num_regs, xtensa_operand_is_known_reg): New.
	(xtensa_operand_isPCRelative): Rename to ...
	(xtensa_operand_is_PCrelative): ... this.  Add error handling.
	(xtensa_operand_do_reloc, xtensa_operand_undo_reloc): Return value
	through argument pointer.  Add error handling.
	(xtensa_stateOperand_state, xtensa_stateOperand_inout,
	xtensa_interfaceOperand_interface, xtensa_regfile_lookup,
	xtensa_regfile_lookup_shortname, xtensa_regfile_name,
	xtensa_regfile_shortname, xtensa_regfile_view_parent,
	xtensa_regfile_num_bits, xtensa_regfile_num_entries,
	xtensa_state_lookup, xtensa_state_name, xtensa_state_num_bits,
	xtensa_state_is_exported, xtensa_sysreg_lookup,
	xtensa_sysreg_lookup_name, xtensa_sysreg_name, xtensa_sysreg_number,
	xtensa_sysreg_is_user, xtensa_interface_lookup, xtensa_interface_name,
	xtensa_interface_num_bits, xtensa_interface_inout,
	xtensa_interface_has_side_effect, xtensa_funcUnit_lookup,
	xtensa_funcUnit_name, xtensa_funcUnit_num_copies): New.
	* xtensa-modules.c: Rewrite to use new data structures.
	* reloc.c (BFD_RELOC_XTENSA_DIFF8, BFD_RELOC_XTENSA_DIFF16,
	BFD_RELOC_XTENSA_DIFF32, BFD_RELOC_XTENSA_SLOT0_OP,
	BFD_RELOC_XTENSA_SLOT1_OP, BFD_RELOC_XTENSA_SLOT2_OP,
	BFD_RELOC_XTENSA_SLOT3_OP, BFD_RELOC_XTENSA_SLOT4_OP,
	BFD_RELOC_XTENSA_SLOT5_OP, BFD_RELOC_XTENSA_SLOT6_OP,
	BFD_RELOC_XTENSA_SLOT7_OP, BFD_RELOC_XTENSA_SLOT8_OP,
	BFD_RELOC_XTENSA_SLOT9_OP, BFD_RELOC_XTENSA_SLOT10_OP,
	BFD_RELOC_XTENSA_SLOT11_OP, BFD_RELOC_XTENSA_SLOT12_OP,
	BFD_RELOC_XTENSA_SLOT13_OP, BFD_RELOC_XTENSA_SLOT14_OP,
	BFD_RELOC_XTENSA_SLOT0_ALT, BFD_RELOC_XTENSA_SLOT1_ALT,
	BFD_RELOC_XTENSA_SLOT2_ALT, BFD_RELOC_XTENSA_SLOT3_ALT,
	BFD_RELOC_XTENSA_SLOT4_ALT, BFD_RELOC_XTENSA_SLOT5_ALT,
	BFD_RELOC_XTENSA_SLOT6_ALT, BFD_RELOC_XTENSA_SLOT7_ALT,
	BFD_RELOC_XTENSA_SLOT8_ALT, BFD_RELOC_XTENSA_SLOT9_ALT,
	BFD_RELOC_XTENSA_SLOT10_ALT, BFD_RELOC_XTENSA_SLOT11_ALT,
	BFD_RELOC_XTENSA_SLOT12_ALT, BFD_RELOC_XTENSA_SLOT13_ALT,
	BFD_RELOC_XTENSA_SLOT14_ALT): Add new relocations.
	* Makefile.am (xtensa-isa.lo, xtensa-modules.lo): Update dependencies.
	* Makefile.in: Regenerate.
	* bfd-in2.h: Likewise.
	* libbfd.h: Likewise.

gas ChangeLog

	* config/tc-xtensa.c (absolute_literals_supported): New global flag.
	(UNREACHABLE_MAX_WIDTH): Define.
	(XTENSA_FETCH_WIDTH): Delete.
	(cur_vinsn, xtensa_fetch_width, xt_saved_debug_type, past_xtensa_end,
	prefer_const16, prefer_l32r): New global variables.
	(LIT4_SECTION_NAME): Define.
	(lit4_state struct): Add lit4_seg_name and lit4_seg fields.
	(XTENSA_PROP_*, GET_XTENSA_PROP_*, SET_XTENSA_PROP_*): Define.
	(frag_flags struct): New.
	(xtensa_block_info struct): Move from tc-xtensa.h.  Add flags field.
	(subseg_map struct): Add cur_total_freq and cur_target_freq fields.
	(bitfield, bit_is_set, set_bit, clear_bit): Define.
	(MAX_FORMATS): Define.
	(op_placement_info struct, op_placement_table): New.
	(O_pltrel, O_hi16, O_lo16): Define.
	(directiveE enum): Rename directive_generics to directive_transform.
	Delete directive_relax.  Add directive_schedule,
	directive_absolute_literals, and directive_last_directive.
	(directive_info): Rename "generics" to "transform".  Delete "relax".
	Add "schedule" and "absolute-literals".
	(directive_state): Adjust entries to match changes in directive_info.
	(xtensa_relax_statesE, RELAX_IMMED_MAXSTEPS): Move to tc-xtensa.h.
	(xtensa_const16_opcode, xtensa_movi_opcode, xtensa_movi_n_opcode,
	xtensa_l32r_opcode, xtensa_nop_opcode, xtensa_rsr_lcount_opcode): New.
	(xtensa_j_opcode, xtensa_rsr_opcode): Delete.
	(align_only_targets, software_a0_b_retw_interlock,
	software_avoid_b_j_loop_end, maybe_has_b_j_loop_end,
	software_avoid_short_loop, software_avoid_close_loop_end,
	software_avoid_all_short_loops, specific_opcode): Delete.
	(warn_unaligned_branch_targets): New.
	(workaround_a0_b_retw, workaround_b_j_loop_end, workaround_short_loop,
	workaround_close_loop_end, workaround_all_short_loops): Default FALSE.
	(option_[no_]link_relax, option_[no_]transform,
	option_[no_]absolute_literals, option_warn_unaligned_targets,
	option_prefer_l32r, option_prefer_const16, option_target_hardware):
	New enum values.
	(option_[no_]align_only_targets, option_literal_section_name,
	option_text_section_name, option_data_section_name,
	option_bss_section_name, option_eb, option_el): Delete.
	(md_longopts): Add entries for: [no-]transform, [no-]absolute-literals,
	warn-unaligned-targets, prefer-l32r, prefer-const16, [no-]link-relax,
	and target-hardware.  Delete entries for [no-]target-align-only,
	literal-section-name, text-section-name, data-section-name, and
	bss-section-name.
	(md_parse_option): Handle new options and remove old ones.  Accept but
	ignore [no-]density options.  Warn for [no-]generics and [no-]relax
	and treat them as [no-]transform.
	(md_show_usage): Add new options and remove old ones.
	(xtensa_setup_hw_workarounds): New.
	(md_pseudo_table): Change "word" entry to use xtensa_elf_cons.  Add
	"long", "short", "loc" and "frequency" entries.
	(use_generics): Rename to ...
	(use_transform): ... this function.  Add past_xtensa_end check.
	(use_longcalls): Add past_xtensa_end check.
	(code_density_available, can_relax): Delete.
	(do_align_targets): New.
	(get_directive): Accept dashes in directive names.  Warn about
	[no-]generics and [no-]relax directives and treat them as
	[no-]transform.
	(xtensa_begin_directive): Call md_flush_pending_output only for some
	directives.  Check for directives inside instruction bundles.  Warn
	about deprecated ".begin literal" usage.  Warn and ignore [no-]density
	directives.  Handle new directives.  Check generating_literals flag
	for literal_prefix.
	(xtensa_end_directive): Check for directives inside instruction
	bundles.  Warn and ignore [no-]density directives.  Handle new
	directives.  Call xtensa_set_frag_assembly_state.
	(xtensa_loc_directive_seen, xtensa_dwarf2_directive_loc,
	xtensa_dwarf2_emit_insn): New.
	(xtensa_literal_position): Call md_flush_pending_output.  Do not check
	use_literal_section flag.
	(xtensa_literal_pseudo): Call md_flush_pending_output.  Handle absolute
	literals.  Use xtensa_elf_cons to parse the expression.
	(xtensa_literal_prefix): Do not check use_literal_section.  Support
	".lit4" sections for absolute literals.  Change prefix convention to
	replace ".text" (or ".t" in a linkonce section).  No need to call
	subseg_set.
	(xtensa_frequency_pseudo, xtensa_elf_cons, xtensa_elf_suffix): New.
	(expression_end): Handle closing braces and colons.
	(PLT_SUFFIX, plt_suffix): Delete.
	(expression_maybe_register): Use new xtensa-isa.h functions.  Use
	xtensa_elf_suffix instead of checking for plt suffix, and handle O_lo16
	and O_hi16 expressions as well.
	(tokenize_arguments): Handle closing braces and colons.
	(parse_arguments): Use new xtensa-isa.h functions.  Handle "invisible"
	operands and paired register syntax.
	(get_invisible_operands): New.
	(xg_translate_sysreg_op): Handle new Xtensa LX RSR/WSR/XSR syntax.  Use
	new xtensa-isa.h functions.
	(xtensa_translate_old_userreg_ops, xtensa_translate_zero_immed): New.
	(xg_translate_idioms): Check if inside bundle.  Use use_transform.
	Handle new Xtensa LX RSR/WSR/XSR syntax.  Remove code to widen density
	instructions.  Use xtensa_translate_zero_immed.
	(operand_is_immed, operand_is_pcrel_label): Delete.
	(get_relaxable_immed): Use new xtensa-isa.h functions.
	(get_opcode_from_buf): Add slot parameter.  Use new xtensa-isa.h
	functions.
	(xtensa_print_insn_table, print_vliw_insn): New.
	(is_direct_call_opcode): Use new xtensa-isa.h functions.
	(is_call_opcode, is_loop_opcode, is_conditional_branch_opcode,
	is_branch_or_jump_opcode): Delete.
	(is_movi_opcode, decode_reloc, encode_reloc, encode_alt_reloc): New.
	(opnum_to_reloc, reloc_to_opnum): Delete.
	(xtensa_insnbuf_set_operand, xtensa_insnbuf_get_operand): Use new
	xtensa-isa.h functions.  Operate on one slot of an instruction.
	(xtensa_insnbuf_set_immediate_field, is_negatable_branch,
	xg_get_insn_size): Delete.
	(xg_get_build_instr_size): Use xg_get_single_size.
	(xg_is_narrow_insn, xg_is_single_relaxable_insn): Update calls to
	xg_build_widen_table.  Use xg_get_single_size.
	(xg_get_max_narrow_insn_size): Delete.
	(xg_get_max_insn_widen_size, xg_get_max_insn_widen_literal_size,
	xg_is_relaxable_insn): Update calls to xg_build_widen_table.  Use
	xg_get_single_size.
	(xg_build_to_insn): Record the loc field.  Handle OP_OPERAND_HI16U and
	OP_OPERAND_LOW16U.  Check xg_valid_literal_expression.
	(xg_expand_to_stack, xg_expand_narrow): Update calls to
	xg_build_widen_table.  Use xg_get_single_size.
	(xg_immeds_fit): Use new xtensa-isa.h functions.  Update call to
	xg_check_operand.
	(xg_symbolic_immeds_fit): Likewise.  Also handle O_lo16 and O_hi16, and
	treat weak symbols conservatively.
	(xg_check_operand): Use new xtensa-isa.h functions.
	(is_dnrange): Delete.
	(xg_assembly_relax): Inline previous calls to tinsn_copy.
	(xg_finish_frag): Specify separate relax states for the frag and slot0.
	(is_branch_jmp_to_next, xg_add_branch_and_loop_targets): Use new
	xtensa-isa.h functions.
	(xg_instruction_matches_option_term, xg_instruction_matches_or_options,
	xg_instruction_matches_options): New.
	(xg_instruction_matches_rule): Handle O_register expressions.  Call
	xg_instruction_matches_options.
	(transition_rule_cmp): New.
	(xg_instruction_match): Update call to xg_build_simplify_table.
	(xg_build_token_insn): Record loc fields.
	(xg_simplify_insn): Check is_specific_opcode field and
	density_supported flag.
	(xg_expand_assembly_insn): Skip checking code_density_available.  Use
	new xtensa-isa.h functions.  Call use_transform instead of can_relax.
	(xg_assemble_literal): Add error handling for O_big.  Call
	record_alignment.  Handle O_pltrel.
	(xg_valid_literal_expression): New.
	(xg_assemble_literal_space): Add slot parameter.  Remove call to
	set_expr_symbol_offset.  Add call to record_alignment.  Update call to
	xg_finish_frag.
	(xg_emit_insn): Delete.
	(xg_emit_insn_to_buf): Add format parameter.  Update calls to
	xg_add_opcode_fix and xtensa_insnbuf_to_chars.
	(xg_add_opcode_fix): Change opcode parameter to tinsn and add format
	and slot parameters.  Handle new "alternate" relocations for absolute
	literals and CONST16 instructions.  Check for bad uses of O_lo16 and
	O_hi16.  Use new xtensa-isa.h functions.
	(xg_assemble_tokens): Delete.
	(is_register_writer): Use new xtensa-isa.h functions.
	(is_bad_loopend_opcode): Check for xtensa_rsr_lcount_opcode instead of
	old-style RSR from LCOUNT.
	(next_frag_opcode): Delete.
	(next_frag_opcode_is_loop, next_frag_format_size, frag_format_size,
	update_next_frag_state): New.
	(update_next_frag_nop_state): Delete.
	(next_frag_pre_opcode_bytes): Use next_frag_opcode_is_loop.
	(xtensa_mark_literal_pool_location): Check use_literal_section flag and
	the state of the absolute-literals directive.  Add calls to
	record_alignment and xtensa_set_frag_assembly_state.  Call
	xtensa_switch_to_non_abs_literal_fragment instead of
	xtensa_switch_to_literal_fragment.
	(build_nop): New.
	(assemble_nop): Use build_nop.  Update call to xtensa_insnbuf_to_chars.
	(get_expanded_loop_offset): Change check for undefined opcode to an
	assertion.
	(xtensa_set_frag_assembly_state, relaxable_section,
	xtensa_find_unmarked_state_frags, xtensa_find_unaligned_branch_targets,
	xtensa_find_unaligned_loops, xg_apply_tentative_value): New.
	(md_begin): Update call to xtensa_isa_init.  Initialize linkrelax to 1.
	Set lit4_seg_name.  Call xg_init_vinsn.  Initialize new global opcodes.
	Call init_op_placement_info_table and xtensa_set_frag_assembly_state.
	(xtensa_init_fix_data): New.
	(xtensa_frob_label): Reset label symbol to the current frag.  Check
	do_align_targets and generating_literals flag.  Propagate frequency
	info to new alignment frag.  Call xtensa_set_frag_assembly_state.
	(xtensa_unrecognized_line): New.
	(xtensa_flush_pending_output): Check if inside a bundle.  Add a call
	to xtensa_set_frag_assembly_state.
	(error_reset_cur_vinsn): New.
	(md_assemble): Remove check for literal frag.  Remove call to
	istack_init.  Call use_transform instead of use_generics.  Parse
	explicit instruction format specifiers.  Move code for
	a0_b_retw_interlock workaround to xg_assemble_vliw_tokens.  Call
	error_reset_cur_vinsn on errors.  Add call to get_invisible_operands.
	Add dwarf2_where call.  Remote automatic alignment for ENTRY
	instructions.  Move call to xtensa_clear_insn_labels to the end.
	Rearrange to handle bundles.
	(xtensa_cons_fix_new): Delete.
	(xtensa_handle_align): New.
	(xtensa_frag_init): Call xtensa_set_frag_assembly_state.  Remove
	assignment to is_no_density field.
	(md_pcrel_from): Use new xtensa-isa.h functions.  Use decode_reloc
	instead of reloc_to_opnum.  Handle "alternate" relocations.
	(xtensa_force_relocation, xtensa_check_inside_bundle,
	xtensa_elf_section_change_hook): New.
	(xtensa_symbol_new_hook): Delete.
	(xtensa_fix_adjustable): Check for difference of symbols with an
	offset.  Check for external and weak symbols.
	(md_apply_fix3): Remove cases for XTENSA_OP{0,1,2} relocs.
	(md_estimate_size_before_relax): Return expansion for the first slot.
	(tc_gen_reloc): Handle difference of symbols by producing
	XTENSA_DIFF{8,16,32} relocs and by writing the value of the difference
	into the output.  Handle new XTENSA_SLOT*_OP relocs by storing the
	tentative values into the output when linkrelax is set.
	(XTENSA_PROP_SEC_NAME): Define.
	(xtensa_post_relax_hook): Call xtensa_find_unmarked_state_frags.
	Create literal tables only if using literal sections.  Create new
	property tables instead of old instruction tables.  Check for unaligned
	branch targets and loops.
	(finish_vinsn, find_vinsn_conflicts, check_t1_t2_reads_and_writes,
	new_resource_table, clear_resource_table, resize_resource_table,
	resources_available, reserve_resources, release_resources,
	opcode_funcUnit_use_unit, opcode_funcUnit_use_stage,
	resources_conflict, xg_find_narrowest_format, relaxation_requirements,
	bundle_single_op, emit_single_op, xg_assemble_vliw_tokens): New.
	(xtensa_end): Call xtensa_flush_pending_output.  Set past_xtensa_end
	flag.  Update checks for workaround options.  Call
	xtensa_mark_narrow_branches and xtensa_mark_zcl_first_insns.
	(xtensa_cleanup_align_frags): Add special case for branch targets.
	Check for and mark unreachable frags.
	(xtensa_fix_target_frags): Remove use of align_only_targets flag.
	Use RELAX_LOOP_END_BYTES in special case for negatable branch at the
	end of a zero-overhead loop body.
	(frag_can_negate_branch): Handle instructions with multiple slots.
	Use new xtensa-isa.h functions
	(xtensa_mark_narrow_branches, is_narrow_branch_guaranteed_in_range,
	xtensa_mark_zcl_first_insns): New.
	(xtensa_fix_a0_b_retw_frags, xtensa_fix_b_j_loop_end_frags): Error if
	transformations are disabled.
	(next_instrs_are_b_retw): Use new xtensa-isa.h functions.  Handle
	multislot instructions.
	(xtensa_fix_close_loop_end_frags, xtensa_fix_short_loop_frags):
	Likewise.  Also error if transformations are disabled.
	(unrelaxed_frag_max_size): New.
	(unrelaxed_frag_min_insn_count, unrelax_frag_has_b_j): Use new
	xtensa-isa.h functions.
	(xtensa_sanity_check, is_empty_loop, is_local_forward_loop): Use
	xtensa_opcode_is_loop instead of is_loop_opcode.
	(get_text_align_power): Replace as_fatal with assertion.
	(get_text_align_fill_size): Iterate instead of using modulus when
	use_nops is false.
	(get_noop_aligned_address): Assert that this is for a machine-dependent
	RELAX_ALIGN_NEXT_OPCODE frag.  Use next_frag_opcode_is_loop,
	xg_get_single_size, and frag_format_size.
	(get_widen_aligned_address): Rename to ...
	(get_aligned_diff): ... this function.  Add max_diff parameter.
	Remove handling of rs_align/rs_align_code frags.  Use
	next_frag_format_size, get_text_align_power, get_text_align_fill_size,
	next_frag_opcode_is_loop, and xg_get_single_size.  Compute max_diff
	and pass it back to caller.
	(xtensa_relax_frag): Use relax_frag_loop_align.  Add code for new
	RELAX_SLOTS, RELAX_MAYBE_UNREACHABLE, RELAX_MAYBE_DESIRE_ALIGN,
	RELAX_FILL_NOP, and RELAX_UNREACHABLE frag types.  Check relax_seen.
	(relax_frag_text_align): Rename to ...
	(relax_frag_loop_align): ... this function.  Assume loops can only be
	in the first slot of an instruction.
	(relax_frag_add_nop): Use assemble_nop instead of constructing an OR
	instruction.  Remove call to frag_wane.
	(relax_frag_narrow): Rename to ...
	(relax_frag_for_align): ... this function.  Extend to handle
	RELAX_FILL_NOP and RELAX_UNREACHABLE, as well as RELAX_SLOTS with
	RELAX_NARROW for the first slot.
	(find_address_of_next_align_frag, bytes_to_stretch): New.
	(future_alignment_required): Use find_address_of_next_align_frag and
	bytes_to_stretch.  Look ahead to subsequent frags to make smarter
	alignment decisions.
	(relax_frag_immed): Add format, slot, and estimate_only parameters.
	Check if transformations are enabled for b_j_loop_end workaround.
	Use new xtensa-isa.h functions and handle multislot instructions.
	Update call to xg_assembly_relax.
	(md_convert_frag): Handle new RELAX_SLOTS, RELAX_UNREACHABLE,
	RELAX_MAYBE_UNREACHABLE, RELAX_MAYBE_DESIRE_ALIGN, and RELAX_FILL_NOP
	frag types.
	(convert_frag_narrow): Add segP, format and slot parameters.  Call
	convert_frag_immed for branch instructions.  Adjust calls to
	tinsn_from_chars, tinsn_immed_from_frag, and xg_emit_insn_to_buf.  Use
	xg_get_single_size and xg_get_single_format.
	(convert_frag_fill_nop): New.
	(convert_frag_immed): Add format and slot parameters.  Handle multislot
	instructions and use new xtensa-isa.h functions.  Update calls to
	tinsn_immed_from_frag and xg_assembly_relax.  Check if transformations
	enabled for b_j_loop_end workaround.  Use build_nop instead of
	assemble_nop.  Check is_specific_opcode flag.  Check for unreachable
	frags.  Use xg_get_single_size.  Handle O_pltrel.
	(fix_new_exp_in_seg): Remove check for old plt flag.
	(convert_frag_immed_finish_loop): Update calls to tinsn_from_chars and
	xtensa_insnbuf_to_chars.  Call tinsn_immed_from_frag.  Change check
	for loop opcode to an assertion.  Mark all frags up to the end of the
	loop as not transformable.
	(get_last_insn_flags, set_last_insn_flags): Use get_subseg_info.
	(get_subseg_info): New.
	(xtensa_move_literals): Call xtensa_set_frag_assembly_state.  Add null
	check for dest_seg.
	(xtensa_switch_to_literal_fragment): Rewrite to handle absolute
	literals and use xtensa_switch_to_non_abs_literal_fragment otherwise.
	(xtensa_switch_to_non_abs_literal_fragment): New.
	(cache_literal_section): Add is_code parameter and pass it through to
	retrieve_literal_seg.
	(retrieve_literal_seg): Add is_code parameter and use it to set the
	flags on the literal section.  Handle case where head parameter is 0.
	(get_frag_is_no_transform, set_frag_is_specific_opcode,
	set_frag_is_no_transform): New.
	(xtensa_create_property_segments): Add end_property_function parameter
	and pass it through to add_xt_block_frags.  Call bfd_get_section_flags
	and skip SEC_DEBUGGING and !SEC_ALLOC sections.
	(xtensa_create_xproperty_segments, section_has_xproperty): New.
	(add_xt_block_frags): Add end_property_function parameter and call it
	if it is non-zero.  Call xtensa_frag_flags_init.
	(xtensa_frag_flags_is_empty, xtensa_frag_flags_init,
	get_frag_property_flags, frag_flags_to_number,
	xtensa_frag_flags_combinable, xt_block_aligned_size,
	xtensa_xt_block_combine, add_xt_prop_frags,
	init_op_placement_info_table, opcode_fits_format_slot,
	xg_get_single_size, xg_get_single_format): New.
	(istack_push): Inline call to tinsn_copy.
	(tinsn_copy): Delete.
	(tinsn_has_invalid_symbolic_operands): Handle O_hi16 and O_lo16 and
	CONST16 opcodes.  Handle O_big, O_illegal, and O_absent.
	(tinsn_has_complex_operands): Handle O_hi16 and O_lo16.
	(tinsn_to_insnbuf): Use xg_get_single_format and new xtensa-isa.h
	functions.  Handle invisible operands.
	(tinsn_to_slotbuf): New.
	(tinsn_check_arguments): Use new xtensa-isa.h functions.
	(tinsn_from_chars): Add slot parameter.  Rewrite using xg_init_vinsn,
	vinsn_from_chars, and xg_free_vinsn.
	(tinsn_from_insnbuf): New.
	(tinsn_immed_from_frag): Add slot parameter and handle multislot
	instructions.  Handle symbol differences.
	(get_num_stack_text_bytes): Use xg_get_single_size.
	(xg_init_vinsn, xg_clear_vinsn, vinsn_has_specific_opcodes,
	xg_free_vinsn, vinsn_to_insnbuf, vinsn_from_chars, expr_is_register,
	get_expr_register, set_expr_symbol_offset_diff): New.
	* config/tc-xtensa.h (MAX_SLOTS): Define.
	(xtensa_relax_statesE): Move from tc-xtensa.c. Add
	RELAX_CHECK_ALIGN_NEXT_OPCODE, RELAX_MAYBE_DESIRE_ALIGN, RELAX_SLOTS,
	RELAX_FILL_NOP, RELAX_UNREACHABLE, RELAX_MAYBE_UNREACHABLE, and
	RELAX_NONE types.
	(RELAX_IMMED_MAXSTEPS): Move from tc-xtensa.c.
	(xtensa_frag_type struct): Add is_assembly_state_set,
	use_absolute_literals, relax_seen, is_unreachable, is_specific_opcode,
	is_align, is_text_align, alignment, and is_first_loop_insn fields.
	Replace is_generics and is_relax fields by is_no_transform field.
	Delete is_text and is_longcalls fields.  Change text_expansion and
	literal_expansion to arrays of MAX_SLOTS entries.  Add arrays of
	per-slot information: literal_frags, slot_subtypes, slot_symbols,
	slot_sub_symbols, and slot_offsets.  Add fr_prev field.
	(xtensa_fix_data struct): New.
	(xtensa_symfield_type struct): Delete plt field.
	(xtensa_block_info struct): Move definition to tc-xtensa.h.  Add
	forward declaration here.
	(xt_section_type enum): Delete xt_insn_sec.  Add xt_prop_sec.
	(XTENSA_SECTION_RENAME): Undefine.
	(TC_FIX_TYPE, TC_INIT_FIX_DATA, TC_FORCE_RELOCATION, NO_PSEUDO_DOT,
	tc_unrecognized_line, md_do_align, md_elf_section_change_hook,
	HANDLE_ALIGN, TC_LINKRELAX_FIXUP, SUB_SEGMENT_ALIGN): Define.
	(TC_CONS_FIX_NEW, tc_symbol_new_hook): Delete.
	(unit_num_copies_func, opcode_num_units_func,
	opcode_funcUnit_use_unit_func, opcode_funcUnit_use_stage_func): New.
	(resource_table struct): New.
	* config/xtensa-istack.h (MAX_INSN_ARGS): Increase from 6 to 10.
	(TInsn struct): Add keep_wide, loc, fixup, record_fix, subtype,
	literal_space, symbol, sub_symbol, offset, and literal_frag fields.
	(tinsn_copy): Delete prototype.
	(vliw_insn struct): New.
	* config/xtensa-relax.c (insn_pattern_struct): Add options field.
	(widen_spec_list): Add option conditions for density and boolean
	instructions.  Add expansions using CONST16 and conditions for using
	CONST16 vs. L32R.  Use new Xtensa LX RSR/WSR syntax.  Add entries for
	predicted branches.
	(simplify_spec_list): Add option conditions for density instructions.
	Add entry for NOP instruction.
	(append_transition): Add cmp function pointer parameter and use it to
	insert the new entry in order.
	(operand_function_LOW16U, operand_function_HI16U): New.
	(xg_has_userdef_op_fn, xg_apply_userdef_op_fn): Handle
	OP_OPERAND_LOW16U and OP_OPERAND_HI16U.
	(enter_opname, split_string): Use xstrdup instead of strdup.
	(init_insn_pattern): Initialize new options field.
	(clear_req_or_option_list, clear_req_option_list,
	clone_req_or_option_list, clone_req_option_list, parse_option_cond):
	New.
	(parse_insn_pattern): Parse option conditions.
	(transition_applies): New.
	(build_transition): Use new xtensa-isa.h functions.  Fix incorrectly
	swapped last arguments in calls to append_constant_value_condition.
	Call clone_req_option_list.  Add warning about invalid opcode.
	Handle LOW16U and HI16U function names.
	(build_transition_table): Add cmp parameter and use it in calls to
	append_transition.  Use new xtensa-isa.h functions.  Check
	transition_applies before adding entries.
	(xg_build_widen_table, xg_build_simplify_table): Add cmp parameter and
	pass it through to build_transition_table.
	* config/xtensa-relax.h (ReqOrOptionList, ReqOrOption, ReqOptionList,
	ReqOption, transition_cmp_fn): New types.
	(OpType enum): Add OP_OPERAND_LOW16U and OP_OPERAND_HI16U.
	(transition_rule struct): Add options field.
	* doc/as.texinfo (Overview): Update Xtensa options.
	* doc/c-xtensa.texi (Xtensa Options): Delete --[no-]density,
	--[no-]relax, and --[no-]generics options.  Update descriptions of
	--text-section-literals and --[no-]longcalls.  Add
	--[no-]absolute-literals and --[no-]transform.
	(Xtensa Syntax): Add description of syntax for FLIX instructions.
	Remove use of "generic" and "specific" terminology for opcodes.
	(Xtensa Registers): Generalize the syntax description to include
	user-defined register files.
	(Xtensa Automatic Alignment): Update.
	(Xtensa Branch Relaxation): Mention limitation of unconditional jumps.
	(Xtensa Call Relaxation): Linker can now remove most of the overhead.
	(Xtensa Directives): Remove confusing rules about precedence.
	(Density Directive, Relax Directive): Delete.
	(Schedule Directive): New.
	(Generics Directive): Rename to ...
	(Transform Directive): ... this node.
	(Literal Directive): Update for absolute literals.  Missing
	literal_position directive is now an error.
	(Literal Position Directive): Update for absolute literals.
	(Freeregs Directive): Delete.
	(Absolute Literals Directive): New.
	(Frame Directive): Minor editing.
	* Makefile.am (DEPTC_xtensa_elf, DEPOBJ_xtensa_elf, DEP_xtensa_elf):
	Update dependencies.
	* Makefile.in: Regenerate.

gas/testsuite ChangeLog

	* gas/xtensa/all.exp: Adjust expected error message for j_too_far.
	Change entry_align test to expect an error.
	* gas/xtensa/entry_misalign2.s: Use no-transform instead of
	no-generics directives.

include ChangeLog

	* xtensa-config.h (XSHAL_USE_ABSOLUTE_LITERALS,
	XCHAL_HAVE_PREDICTED_BRANCHES, XCHAL_INST_FETCH_WIDTH): New.
	(XCHAL_EXTRA_SA_SIZE, XCHAL_EXTRA_SA_ALIGN): Delete.
	* xtensa-isa-internal.h (ISA_INTERFACE_VERSION): Delete.
	(config_sturct struct): Delete.
	(XTENSA_OPERAND_IS_REGISTER, XTENSA_OPERAND_IS_PCRELATIVE,
	XTENSA_OPERAND_IS_INVISIBLE, XTENSA_OPERAND_IS_UNKNOWN,
	XTENSA_OPCODE_IS_BRANCH, XTENSA_OPCODE_IS_JUMP,
	XTENSA_OPCODE_IS_LOOP, XTENSA_OPCODE_IS_CALL,
	XTENSA_STATE_IS_EXPORTED, XTENSA_INTERFACE_HAS_SIDE_EFFECT): Define.
	(xtensa_format_encode_fn, xtensa_get_slot_fn, xtensa_set_slot_fn): New.
	(xtensa_insn_decode_fn): Rename to ...
	(xtensa_opcode_decode_fn): ... this.
	(xtensa_immed_decode_fn, xtensa_immed_encode_fn, xtensa_do_reloc_fn,
	xtensa_undo_reloc_fn): Update.
	(xtensa_encoding_template_fn): Delete.
	(xtensa_opcode_encode_fn, xtensa_format_decode_fn,
	xtensa_length_decode_fn): New.
	(xtensa_format_internal, xtensa_slot_internal): New types.
	(xtensa_operand_internal): Delete operand_kind, inout, isPCRelative,
	get_field, and set_field fields.  Add name, field_id, regfile,
	num_regs, and flags fields.
	(xtensa_arg_internal): New type.
	(xtensa_iclass_internal): Change operands field to array of
	xtensa_arg_internal.  Add num_stateOperands, stateOperands,
	num_interfaceOperands, and interfaceOperands fields.
	(xtensa_opcode_internal): Delete length, template, and iclass fields.
	Add iclass_id, flags, encode_fns, num_funcUnit_uses, and funcUnit_uses.
	(opname_lookup_entry): Delete.
	(xtensa_regfile_internal, xtensa_interface_internal,
	xtensa_funcUnit_internal, xtensa_state_internal,
	xtensa_sysreg_internal, xtensa_lookup_entry): New.
	(xtensa_isa_internal): Replace opcode_table field with opcodes field.
	Change type of opname_lookup_table.  Delete num_modules,
	module_opcode_base, module_decode_fn, config, and has_density fields.
	Add num_formats, formats, format_decode_fn, length_decode_fn,
	num_slots, slots, num_fields, num_operands, operands, num_iclasses,
	iclasses, num_regfiles, regfiles, num_states, states,
	state_lookup_table, num_sysregs, sysregs, sysreg_lookup_table,
	max_sysreg_num, sysreg_table, num_interfaces, interfaces,
	interface_lookup_table, num_funcUnits, funcUnits and
	funcUnit_lookup_table fields.
	(xtensa_isa_module, xtensa_isa_modules): Delete.
	(xtensa_isa_name_compare): New prototype.
	(xtisa_errno, xtisa_error_msg): New.
	* xtensa-isa.h (XTENSA_ISA_VERSION): Define.
	(xtensa_isa): Change type.
	(xtensa_operand): Delete.
	(xtensa_format, xtensa_regfile, xtensa_state, xtensa_sysreg,
	xtensa_interface, xtensa_funcUnit, xtensa_isa_status,
	xtensa_funcUnit_use): New types.
	(libisa_module_specifier): Delete.
	(xtensa_isa_errno, xtensa_isa_error_msg): New prototypes.
	(xtensa_insnbuf_free, xtensa_insnbuf_to_chars,
	xtensa_insnbuf_from_chars): Update prototypes.
	(xtensa_load_isa, xtensa_extend_isa, xtensa_default_isa,
	xtensa_insn_maxlength, xtensa_num_opcodes, xtensa_decode_insn,
	xtensa_encode_insn, xtensa_insn_length,
	xtensa_insn_length_from_first_byte, xtensa_num_operands,
	xtensa_operand_kind, xtensa_encode_result,
	xtensa_operand_isPCRelative): Delete.
	(xtensa_isa_init, xtensa_operand_inout, xtensa_operand_get_field,
	xtensa_operand_set_field, xtensa_operand_encode,
	xtensa_operand_decode, xtensa_operand_do_reloc,
	xtensa_operand_undo_reloc): Update prototypes.
	(xtensa_isa_maxlength, xtensa_isa_length_from_chars,
	xtensa_isa_num_pipe_stages, xtensa_isa_num_formats,
	xtensa_isa_num_opcodes, xtensa_isa_num_regfiles, xtensa_isa_num_states,
	xtensa_isa_num_sysregs, xtensa_isa_num_interfaces,
	xtensa_isa_num_funcUnits, xtensa_format_name, xtensa_format_lookup,
	xtensa_format_decode, xtensa_format_encode, xtensa_format_length,
	xtensa_format_num_slots, xtensa_format_slot_nop_opcode,
	xtensa_format_get_slot, xtensa_format_set_slot, xtensa_opcode_decode,
	xtensa_opcode_encode, xtensa_opcode_is_branch, xtensa_opcode_is_jump,
	xtensa_opcode_is_loop, xtensa_opcode_is_call,
	xtensa_opcode_num_operands, xtensa_opcode_num_stateOperands,
	xtensa_opcode_num_interfaceOperands, xtensa_opcode_num_funcUnit_uses,
	xtensa_opcode_funcUnit_use, xtensa_operand_name,
	xtensa_operand_is_visible, xtensa_operand_is_register,
	xtensa_operand_regfile, xtensa_operand_num_regs,
	xtensa_operand_is_known_reg, xtensa_operand_is_PCrelative,
	xtensa_stateOperand_state, xtensa_stateOperand_inout,
	xtensa_interfaceOperand_interface, xtensa_regfile_lookup,
	xtensa_regfile_lookup_shortname, xtensa_regfile_name,
	xtensa_regfile_shortname, xtensa_regfile_view_parent,
	xtensa_regfile_num_bits, xtensa_regfile_num_entries,
	xtensa_state_lookup, xtensa_state_name, xtensa_state_num_bits,
	xtensa_state_is_exported, xtensa_sysreg_lookup,
	xtensa_sysreg_lookup_name, xtensa_sysreg_name, xtensa_sysreg_number,
	xtensa_sysreg_is_user, xtensa_interface_lookup, xtensa_interface_name,
	xtensa_interface_num_bits, xtensa_interface_inout,
	xtensa_interface_has_side_effect, xtensa_funcUnit_lookup,
	xtensa_funcUnit_name, xtensa_funcUnit_num_copies): New prototypes.
	* elf/xtensa.h (R_XTENSA_DIFF8, R_XTENSA_DIFF16, R_XTENSA_DIFF32,
	R_XTENSA_SLOT*_OP, R_XTENSA_SLOT*_ALT): New relocations.
	(XTENSA_PROP_SEC_NAME): Define.
	(property_table_entry): Add flags field.
	(XTENSA_PROP_*, GET_XTENSA_PROP_*, SET_XTENSA_PROP_*): Define.

ld ChangeLog

	* ld.texinfo (Xtensa): Describe new linker relaxation to optimize
	assembler-generated longcall sequences.  Describe new --size-opt
	option.
	* emulparams/elf32xtensa.sh (OTHER_SECTIONS): Add .xt.prop section.
	* emultempl/xtensaelf.em (remove_section,
	replace_insn_sec_with_prop_sec, replace_instruction_table_sections,
	elf_xtensa_after_open): New.
	(OPTION_OPT_SIZEOPT, OPTION_LITERAL_MOVEMENT,
	OPTION_NO_LITERAL_MOVEMENT): Define.
	(elf32xtensa_size_opt, elf32xtensa_no_literal_movement): New globals.
	(PARSE_AND_LIST_LONGOPTS): Add size-opt and [no-]literal-movement.
	(PARSE_AND_LIST_OPTIONS): Add --size-opt.
	(PARSE_AND_LIST_ARGS_CASES): Handle OPTION_OPT_SIZEOPT,
	OPTION_LITERAL_MOVEMENT, and OPTION_NO_LITERAL_MOVEMENT.
	(LDEMUL_AFTER_OPEN): Set to elf_xtensa_after_open.
	* scripttempl/elfxtensa.sc: Update with changes from elf.sc.
	* Makefile.am (eelf32xtensa.c): Update dependencies.
	* Makefile.in: Regenerate.

ld/testsuite ChangeLog

	* ld-xtensa/lcall1.s: Use .literal directive.
	* ld-xtensa/lcall2.s: Align function entry.
	* ld-xtensa/coalesce2.s: Likewise.

opcodes ChangeLog

	* xtensa-dis.c (state_names): Delete.
	(fetch_data): Use xtensa_isa_maxlength.
	(print_xtensa_operand): Replace operand parameter with opcode/operand
	pair.  Remove print_sr_name parameter.  Use new xtensa-isa.h functions.
	(print_insn_xtensa): Use new xtensa-isa.h functions.  Handle multislot
	instruction bundles.  Use xmalloc instead of malloc.
This commit is contained in:
Bob Wilson 2004-10-08 00:22:12 +00:00
parent 60cb120f3e
commit b3a88ae94b
5 changed files with 1081 additions and 196 deletions

View File

@ -1,3 +1,104 @@
2004-10-07 Bob Wilson <bob.wilson@acm.org>
* xtensa-config.h (XSHAL_USE_ABSOLUTE_LITERALS,
XCHAL_HAVE_PREDICTED_BRANCHES, XCHAL_INST_FETCH_WIDTH): New.
(XCHAL_EXTRA_SA_SIZE, XCHAL_EXTRA_SA_ALIGN): Delete.
* xtensa-isa-internal.h (ISA_INTERFACE_VERSION): Delete.
(config_sturct struct): Delete.
(XTENSA_OPERAND_IS_REGISTER, XTENSA_OPERAND_IS_PCRELATIVE,
XTENSA_OPERAND_IS_INVISIBLE, XTENSA_OPERAND_IS_UNKNOWN,
XTENSA_OPCODE_IS_BRANCH, XTENSA_OPCODE_IS_JUMP,
XTENSA_OPCODE_IS_LOOP, XTENSA_OPCODE_IS_CALL,
XTENSA_STATE_IS_EXPORTED, XTENSA_INTERFACE_HAS_SIDE_EFFECT): Define.
(xtensa_format_encode_fn, xtensa_get_slot_fn, xtensa_set_slot_fn): New.
(xtensa_insn_decode_fn): Rename to ...
(xtensa_opcode_decode_fn): ... this.
(xtensa_immed_decode_fn, xtensa_immed_encode_fn, xtensa_do_reloc_fn,
xtensa_undo_reloc_fn): Update.
(xtensa_encoding_template_fn): Delete.
(xtensa_opcode_encode_fn, xtensa_format_decode_fn,
xtensa_length_decode_fn): New.
(xtensa_format_internal, xtensa_slot_internal): New types.
(xtensa_operand_internal): Delete operand_kind, inout, isPCRelative,
get_field, and set_field fields. Add name, field_id, regfile,
num_regs, and flags fields.
(xtensa_arg_internal): New type.
(xtensa_iclass_internal): Change operands field to array of
xtensa_arg_internal. Add num_stateOperands, stateOperands,
num_interfaceOperands, and interfaceOperands fields.
(xtensa_opcode_internal): Delete length, template, and iclass fields.
Add iclass_id, flags, encode_fns, num_funcUnit_uses, and funcUnit_uses.
(opname_lookup_entry): Delete.
(xtensa_regfile_internal, xtensa_interface_internal,
xtensa_funcUnit_internal, xtensa_state_internal,
xtensa_sysreg_internal, xtensa_lookup_entry): New.
(xtensa_isa_internal): Replace opcode_table field with opcodes field.
Change type of opname_lookup_table. Delete num_modules,
module_opcode_base, module_decode_fn, config, and has_density fields.
Add num_formats, formats, format_decode_fn, length_decode_fn,
num_slots, slots, num_fields, num_operands, operands, num_iclasses,
iclasses, num_regfiles, regfiles, num_states, states,
state_lookup_table, num_sysregs, sysregs, sysreg_lookup_table,
max_sysreg_num, sysreg_table, num_interfaces, interfaces,
interface_lookup_table, num_funcUnits, funcUnits and
funcUnit_lookup_table fields.
(xtensa_isa_module, xtensa_isa_modules): Delete.
(xtensa_isa_name_compare): New prototype.
(xtisa_errno, xtisa_error_msg): New.
* xtensa-isa.h (XTENSA_ISA_VERSION): Define.
(xtensa_isa): Change type.
(xtensa_operand): Delete.
(xtensa_format, xtensa_regfile, xtensa_state, xtensa_sysreg,
xtensa_interface, xtensa_funcUnit, xtensa_isa_status,
xtensa_funcUnit_use): New types.
(libisa_module_specifier): Delete.
(xtensa_isa_errno, xtensa_isa_error_msg): New prototypes.
(xtensa_insnbuf_free, xtensa_insnbuf_to_chars,
xtensa_insnbuf_from_chars): Update prototypes.
(xtensa_load_isa, xtensa_extend_isa, xtensa_default_isa,
xtensa_insn_maxlength, xtensa_num_opcodes, xtensa_decode_insn,
xtensa_encode_insn, xtensa_insn_length,
xtensa_insn_length_from_first_byte, xtensa_num_operands,
xtensa_operand_kind, xtensa_encode_result,
xtensa_operand_isPCRelative): Delete.
(xtensa_isa_init, xtensa_operand_inout, xtensa_operand_get_field,
xtensa_operand_set_field, xtensa_operand_encode,
xtensa_operand_decode, xtensa_operand_do_reloc,
xtensa_operand_undo_reloc): Update prototypes.
(xtensa_isa_maxlength, xtensa_isa_length_from_chars,
xtensa_isa_num_pipe_stages, xtensa_isa_num_formats,
xtensa_isa_num_opcodes, xtensa_isa_num_regfiles, xtensa_isa_num_states,
xtensa_isa_num_sysregs, xtensa_isa_num_interfaces,
xtensa_isa_num_funcUnits, xtensa_format_name, xtensa_format_lookup,
xtensa_format_decode, xtensa_format_encode, xtensa_format_length,
xtensa_format_num_slots, xtensa_format_slot_nop_opcode,
xtensa_format_get_slot, xtensa_format_set_slot, xtensa_opcode_decode,
xtensa_opcode_encode, xtensa_opcode_is_branch, xtensa_opcode_is_jump,
xtensa_opcode_is_loop, xtensa_opcode_is_call,
xtensa_opcode_num_operands, xtensa_opcode_num_stateOperands,
xtensa_opcode_num_interfaceOperands, xtensa_opcode_num_funcUnit_uses,
xtensa_opcode_funcUnit_use, xtensa_operand_name,
xtensa_operand_is_visible, xtensa_operand_is_register,
xtensa_operand_regfile, xtensa_operand_num_regs,
xtensa_operand_is_known_reg, xtensa_operand_is_PCrelative,
xtensa_stateOperand_state, xtensa_stateOperand_inout,
xtensa_interfaceOperand_interface, xtensa_regfile_lookup,
xtensa_regfile_lookup_shortname, xtensa_regfile_name,
xtensa_regfile_shortname, xtensa_regfile_view_parent,
xtensa_regfile_num_bits, xtensa_regfile_num_entries,
xtensa_state_lookup, xtensa_state_name, xtensa_state_num_bits,
xtensa_state_is_exported, xtensa_sysreg_lookup,
xtensa_sysreg_lookup_name, xtensa_sysreg_name, xtensa_sysreg_number,
xtensa_sysreg_is_user, xtensa_interface_lookup, xtensa_interface_name,
xtensa_interface_num_bits, xtensa_interface_inout,
xtensa_interface_has_side_effect, xtensa_funcUnit_lookup,
xtensa_funcUnit_name, xtensa_funcUnit_num_copies): New prototypes.
* elf/xtensa.h (R_XTENSA_DIFF8, R_XTENSA_DIFF16, R_XTENSA_DIFF32,
R_XTENSA_SLOT*_OP, R_XTENSA_SLOT*_ALT): New relocations.
(XTENSA_PROP_SEC_NAME): Define.
(property_table_entry): Add flags field.
(XTENSA_PROP_*, GET_XTENSA_PROP_*, SET_XTENSA_PROP_*): Define.
2004-10-07 Jeff Baker <jbaker@qnx.com> 2004-10-07 Jeff Baker <jbaker@qnx.com>
* bfdlink.h (bfd_link_info): Add bitfield: warn_shared_textrel. * bfdlink.h (bfd_link_info): Add bitfield: warn_shared_textrel.

View File

@ -1,5 +1,5 @@
/* Xtensa ELF support for BFD. /* Xtensa ELF support for BFD.
Copyright 2003 Free Software Foundation, Inc. Copyright 2003, 2004 Free Software Foundation, Inc.
Contributed by Bob Wilson (bwilson@tensilica.com) at Tensilica. Contributed by Bob Wilson (bwilson@tensilica.com) at Tensilica.
This file is part of BFD, the Binary File Descriptor library. This file is part of BFD, the Binary File Descriptor library.
@ -42,6 +42,39 @@ START_RELOC_NUMBERS (elf_xtensa_reloc_type)
RELOC_NUMBER (R_XTENSA_ASM_SIMPLIFY, 12) RELOC_NUMBER (R_XTENSA_ASM_SIMPLIFY, 12)
RELOC_NUMBER (R_XTENSA_GNU_VTINHERIT, 15) RELOC_NUMBER (R_XTENSA_GNU_VTINHERIT, 15)
RELOC_NUMBER (R_XTENSA_GNU_VTENTRY, 16) RELOC_NUMBER (R_XTENSA_GNU_VTENTRY, 16)
RELOC_NUMBER (R_XTENSA_DIFF8, 17)
RELOC_NUMBER (R_XTENSA_DIFF16, 18)
RELOC_NUMBER (R_XTENSA_DIFF32, 19)
RELOC_NUMBER (R_XTENSA_SLOT0_OP, 20)
RELOC_NUMBER (R_XTENSA_SLOT1_OP, 21)
RELOC_NUMBER (R_XTENSA_SLOT2_OP, 22)
RELOC_NUMBER (R_XTENSA_SLOT3_OP, 23)
RELOC_NUMBER (R_XTENSA_SLOT4_OP, 24)
RELOC_NUMBER (R_XTENSA_SLOT5_OP, 25)
RELOC_NUMBER (R_XTENSA_SLOT6_OP, 26)
RELOC_NUMBER (R_XTENSA_SLOT7_OP, 27)
RELOC_NUMBER (R_XTENSA_SLOT8_OP, 28)
RELOC_NUMBER (R_XTENSA_SLOT9_OP, 29)
RELOC_NUMBER (R_XTENSA_SLOT10_OP, 30)
RELOC_NUMBER (R_XTENSA_SLOT11_OP, 31)
RELOC_NUMBER (R_XTENSA_SLOT12_OP, 32)
RELOC_NUMBER (R_XTENSA_SLOT13_OP, 33)
RELOC_NUMBER (R_XTENSA_SLOT14_OP, 34)
RELOC_NUMBER (R_XTENSA_SLOT0_ALT, 35)
RELOC_NUMBER (R_XTENSA_SLOT1_ALT, 36)
RELOC_NUMBER (R_XTENSA_SLOT2_ALT, 37)
RELOC_NUMBER (R_XTENSA_SLOT3_ALT, 38)
RELOC_NUMBER (R_XTENSA_SLOT4_ALT, 39)
RELOC_NUMBER (R_XTENSA_SLOT5_ALT, 40)
RELOC_NUMBER (R_XTENSA_SLOT6_ALT, 41)
RELOC_NUMBER (R_XTENSA_SLOT7_ALT, 42)
RELOC_NUMBER (R_XTENSA_SLOT8_ALT, 43)
RELOC_NUMBER (R_XTENSA_SLOT9_ALT, 44)
RELOC_NUMBER (R_XTENSA_SLOT10_ALT, 45)
RELOC_NUMBER (R_XTENSA_SLOT11_ALT, 46)
RELOC_NUMBER (R_XTENSA_SLOT12_ALT, 47)
RELOC_NUMBER (R_XTENSA_SLOT13_ALT, 48)
RELOC_NUMBER (R_XTENSA_SLOT14_ALT, 49)
END_RELOC_NUMBERS (R_XTENSA_max) END_RELOC_NUMBERS (R_XTENSA_max)
/* Processor-specific flags for the ELF header e_flags field. */ /* Processor-specific flags for the ELF header e_flags field. */
@ -78,11 +111,88 @@ END_RELOC_NUMBERS (R_XTENSA_max)
#define XTENSA_INSN_SEC_NAME ".xt.insn" #define XTENSA_INSN_SEC_NAME ".xt.insn"
#define XTENSA_LIT_SEC_NAME ".xt.lit" #define XTENSA_LIT_SEC_NAME ".xt.lit"
#define XTENSA_PROP_SEC_NAME ".xt.prop"
typedef struct property_table_entry_t typedef struct property_table_entry_t
{ {
bfd_vma address; bfd_vma address;
bfd_vma size; bfd_vma size;
flagword flags;
} property_table_entry; } property_table_entry;
/* Flags in the property tables to specify whether blocks of memory are
literals, instructions, data, or unreachable. For instructions,
blocks that begin loop targets and branch targets are designated.
Blocks that do not allow density instructions, instruction reordering
or transformation are also specified. Finally, for branch targets,
branch target alignment priority is included. Alignment of the next
block is specified in the current block and the size of the current
block does not include any fill required to align to the next
block. */
#define XTENSA_PROP_LITERAL 0x00000001
#define XTENSA_PROP_INSN 0x00000002
#define XTENSA_PROP_DATA 0x00000004
#define XTENSA_PROP_UNREACHABLE 0x00000008
/* Instruction-only properties at beginning of code. */
#define XTENSA_PROP_INSN_LOOP_TARGET 0x00000010
#define XTENSA_PROP_INSN_BRANCH_TARGET 0x00000020
/* Instruction-only properties about code. */
#define XTENSA_PROP_INSN_NO_DENSITY 0x00000040
#define XTENSA_PROP_INSN_NO_REORDER 0x00000080
#define XTENSA_PROP_INSN_NO_TRANSFORM 0x00000100
/* Branch target alignment information. This transmits information
to the linker optimization about the priority of aligning a
particular block for branch target alignment: None, low priority,
high priority, or required. These only need to be checked in
instruction blocks marked as XTENSA_PROP_INSN_BRANCH_TARGET.
Common usage is:
switch (GET_XTENSA_PROP_BT_ALIGN(flags))
case XTENSA_PROP_BT_ALIGN_NONE:
case XTENSA_PROP_BT_ALIGN_LOW:
case XTENSA_PROP_BT_ALIGN_HIGH:
case XTENSA_PROP_BT_ALIGN_REQUIRE:
*/
#define XTENSA_PROP_BT_ALIGN_MASK 0x00000600
/* No branch target alignment. */
#define XTENSA_PROP_BT_ALIGN_NONE 0x0
/* Low priority branch target alignment. */
#define XTENSA_PROP_BT_ALIGN_LOW 0x1
/* High priority branch target alignment. */
#define XTENSA_PROP_BT_ALIGN_HIGH 0x2
/* Required branch target alignment. */
#define XTENSA_PROP_BT_ALIGN_REQUIRE 0x3
#define GET_XTENSA_PROP_BT_ALIGN(flag) \
(((unsigned)((flag) & (XTENSA_PROP_BT_ALIGN_MASK))) >> 9)
#define SET_XTENSA_PROP_BT_ALIGN(flag, align) \
(((flag) & (~XTENSA_PROP_BT_ALIGN_MASK)) | \
(((align) << 9) & XTENSA_PROP_BT_ALIGN_MASK))
/* Alignment is specified in the block BEFORE the one that needs
alignment. Up to 5 bits. Use GET_XTENSA_PROP_ALIGNMENT(flags) to
get the required alignment specified as a power of 2. Use
SET_XTENSA_PROP_ALIGNMENT(flags, pow2) to set the required
alignment. Be careful of side effects since the SET will evaluate
flags twice. Also, note that the SIZE of a block in the property
table does not include the alignment size, so the alignment fill
must be calculated to determine if two blocks are contiguous.
TEXT_ALIGN is not currently implemented but is a placeholder for a
possible future implementation. */
#define XTENSA_PROP_ALIGN 0x00000800
#define XTENSA_PROP_ALIGNMENT_MASK 0x0001f000
#define GET_XTENSA_PROP_ALIGNMENT(flag) \
(((unsigned)((flag) & (XTENSA_PROP_ALIGNMENT_MASK))) >> 12)
#define SET_XTENSA_PROP_ALIGNMENT(flag, align) \
(((flag) & (~XTENSA_PROP_ALIGNMENT_MASK)) | \
(((align) << 12) & XTENSA_PROP_ALIGNMENT_MASK))
#define XTENSA_PROP_INSN_ABSLIT 0x00020000
#endif /* _ELF_XTENSA_H */ #endif /* _ELF_XTENSA_H */

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@ -1,5 +1,5 @@
/* Xtensa configuration settings. /* Xtensa configuration settings.
Copyright (C) 2001,2002,2003 Free Software Foundation, Inc. Copyright (C) 2001, 2002, 2003, 2004 Free Software Foundation, Inc.
Contributed by Bob Wilson (bwilson@tensilica.com) at Tensilica. Contributed by Bob Wilson (bwilson@tensilica.com) at Tensilica.
This program is free software; you can redistribute it and/or modify This program is free software; you can redistribute it and/or modify
@ -42,6 +42,9 @@
#undef XCHAL_HAVE_L32R #undef XCHAL_HAVE_L32R
#define XCHAL_HAVE_L32R 1 #define XCHAL_HAVE_L32R 1
#undef XSHAL_USE_ABSOLUTE_LITERALS
#define XSHAL_USE_ABSOLUTE_LITERALS 0
#undef XCHAL_HAVE_MAC16 #undef XCHAL_HAVE_MAC16
#define XCHAL_HAVE_MAC16 0 #define XCHAL_HAVE_MAC16 0
@ -87,6 +90,9 @@
#undef XCHAL_HAVE_WINDOWED #undef XCHAL_HAVE_WINDOWED
#define XCHAL_HAVE_WINDOWED 1 #define XCHAL_HAVE_WINDOWED 1
#undef XCHAL_HAVE_PREDICTED_BRANCHES
#define XCHAL_HAVE_PREDICTED_BRANCHES 0
#undef XCHAL_ICACHE_SIZE #undef XCHAL_ICACHE_SIZE
#define XCHAL_ICACHE_SIZE 8192 #define XCHAL_ICACHE_SIZE 8192
@ -130,10 +136,7 @@
#define XCHAL_DEBUGLEVEL 4 #define XCHAL_DEBUGLEVEL 4
#undef XCHAL_EXTRA_SA_SIZE #undef XCHAL_INST_FETCH_WIDTH
#define XCHAL_EXTRA_SA_SIZE 0 #define XCHAL_INST_FETCH_WIDTH 4
#undef XCHAL_EXTRA_SA_ALIGN
#define XCHAL_EXTRA_SA_ALIGN 1
#endif /* !XTENSA_CONFIG_H */ #endif /* !XTENSA_CONFIG_H */

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@ -1,5 +1,5 @@
/* Internal definitions for configurable Xtensa ISA support. /* Internal definitions for configurable Xtensa ISA support.
Copyright 2003 Free Software Foundation, Inc. Copyright 2003, 2004 Free Software Foundation, Inc.
This file is part of BFD, the Binary File Descriptor library. This file is part of BFD, the Binary File Descriptor library.
@ -17,98 +17,215 @@
along with this program; if not, write to the Free Software along with this program; if not, write to the Free Software
Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
/* Use the statically-linked version for the GNU tools. */ #ifndef XTENSA_ISA_INTERNAL_H
#define STATIC_LIBISA 1 #define XTENSA_ISA_INTERNAL_H
#define ISA_INTERFACE_VERSION 3 /* Flags. */
struct config_struct #define XTENSA_OPERAND_IS_REGISTER 0x00000001
{ #define XTENSA_OPERAND_IS_PCRELATIVE 0x00000002
char *param_name; #define XTENSA_OPERAND_IS_INVISIBLE 0x00000004
char *param_value; #define XTENSA_OPERAND_IS_UNKNOWN 0x00000008
};
/* Encode/decode function types for immediate operands. */ #define XTENSA_OPCODE_IS_BRANCH 0x00000001
typedef uint32 (*xtensa_immed_decode_fn) (uint32); #define XTENSA_OPCODE_IS_JUMP 0x00000002
typedef xtensa_encode_result (*xtensa_immed_encode_fn) (uint32 *); #define XTENSA_OPCODE_IS_LOOP 0x00000004
#define XTENSA_OPCODE_IS_CALL 0x00000008
/* Field accessor function types. */ #define XTENSA_STATE_IS_EXPORTED 0x00000001
#define XTENSA_INTERFACE_HAS_SIDE_EFFECT 0x00000001
/* Function pointer typedefs */
typedef void (*xtensa_format_encode_fn) (xtensa_insnbuf);
typedef void (*xtensa_get_slot_fn) (const xtensa_insnbuf, xtensa_insnbuf);
typedef void (*xtensa_set_slot_fn) (xtensa_insnbuf, const xtensa_insnbuf);
typedef int (*xtensa_opcode_decode_fn) (const xtensa_insnbuf);
typedef uint32 (*xtensa_get_field_fn) (const xtensa_insnbuf); typedef uint32 (*xtensa_get_field_fn) (const xtensa_insnbuf);
typedef void (*xtensa_set_field_fn) (xtensa_insnbuf, uint32); typedef void (*xtensa_set_field_fn) (xtensa_insnbuf, uint32);
typedef int (*xtensa_immed_decode_fn) (uint32 *);
typedef int (*xtensa_immed_encode_fn) (uint32 *);
typedef int (*xtensa_do_reloc_fn) (uint32 *, uint32);
typedef int (*xtensa_undo_reloc_fn) (uint32 *, uint32);
typedef void (*xtensa_opcode_encode_fn) (xtensa_insnbuf);
typedef int (*xtensa_format_decode_fn) (const xtensa_insnbuf);
typedef int (*xtensa_length_decode_fn) (const char *);
/* PC-relative relocation function types. */ typedef struct xtensa_format_internal_struct
typedef uint32 (*xtensa_do_reloc_fn) (uint32, uint32); {
typedef uint32 (*xtensa_undo_reloc_fn) (uint32, uint32); const char *name; /* Instruction format name. */
int length; /* Instruction length in bytes. */
/* Instruction decode function type. */ xtensa_format_encode_fn encode_fn;
typedef int (*xtensa_insn_decode_fn) (const xtensa_insnbuf); int num_slots;
int *slot_id; /* Array[num_slots] of slot IDs. */
/* Instruction encoding template function type (each of these functions } xtensa_format_internal;
returns a constant template; they exist only to make it easier for the
TIE compiler to generate endian-independent DLLs). */
typedef xtensa_insnbuf (*xtensa_encoding_template_fn) (void);
typedef struct xtensa_slot_internal_struct
{
const char *name; /* Not necessarily unique. */
const char *format;
int position;
xtensa_get_slot_fn get_fn;
xtensa_set_slot_fn set_fn;
xtensa_get_field_fn *get_field_fns; /* Array[field_id]. */
xtensa_set_field_fn *set_field_fns; /* Array[field_id]. */
xtensa_opcode_decode_fn opcode_decode_fn;
const char *nop_name;
} xtensa_slot_internal;
typedef struct xtensa_operand_internal_struct typedef struct xtensa_operand_internal_struct
{ {
char *operand_kind; /* e.g., "a", "f", "i", "l".... */ const char *name;
char inout; /* '<', '>', or '='. */ int field_id;
char isPCRelative; /* Is this a PC-relative offset? */ xtensa_regfile regfile; /* Register file. */
xtensa_get_field_fn get_field; /* Get encoded value of the field. */ int num_regs; /* Usually 1; 2 for reg pairs, etc. */
xtensa_set_field_fn set_field; /* Set field with an encoded value. */ uint32 flags; /* See XTENSA_OPERAND_* flags. */
xtensa_immed_encode_fn encode; /* Encode the operand value. */ xtensa_immed_encode_fn encode; /* Encode the operand value. */
xtensa_immed_decode_fn decode; /* Decode the value from the field. */ xtensa_immed_decode_fn decode; /* Decode the value from the field. */
xtensa_do_reloc_fn do_reloc; /* Perform a PC-relative relocation. */ xtensa_do_reloc_fn do_reloc; /* Perform a PC-relative reloc. */
xtensa_undo_reloc_fn undo_reloc; /* Undo a PC-relative relocation. */ xtensa_undo_reloc_fn undo_reloc; /* Undo a PC-relative relocation. */
} xtensa_operand_internal; } xtensa_operand_internal;
typedef struct xtensa_arg_internal_struct
{
union {
int operand_id; /* For normal operands. */
xtensa_state state; /* For stateOperands. */
} u;
char inout; /* Direction: 'i', 'o', or 'm'. */
} xtensa_arg_internal;
typedef struct xtensa_iclass_internal_struct typedef struct xtensa_iclass_internal_struct
{ {
int num_operands; /* Size of "operands" array. */ int num_operands; /* Size of "operands" array. */
xtensa_operand_internal **operands; /* Array of operand structures. */ xtensa_arg_internal *operands; /* Array[num_operands]. */
} xtensa_iclass_internal;
int num_stateOperands; /* Size of "stateOperands" array. */
xtensa_arg_internal *stateOperands; /* Array[num_stateOperands]. */
int num_interfaceOperands; /* Size of "interfaceOperands". */
xtensa_interface *interfaceOperands; /* Array[num_interfaceOperands]. */
} xtensa_iclass_internal;
typedef struct xtensa_opcode_internal_struct typedef struct xtensa_opcode_internal_struct
{ {
const char *name; /* Opcode mnemonic. */ const char *name; /* Opcode mnemonic. */
int length; /* Length in bytes of the insn. */ int iclass_id; /* Iclass for this opcode. */
xtensa_encoding_template_fn template; /* Fn returning encoding template. */ uint32 flags; /* See XTENSA_OPCODE_* flags. */
xtensa_iclass_internal *iclass; /* Iclass for this opcode. */ xtensa_opcode_encode_fn *encode_fns; /* Array[slot_id]. */
int num_funcUnit_uses; /* Number of funcUnit_use entries. */
xtensa_funcUnit_use *funcUnit_uses; /* Array[num_funcUnit_uses]. */
} xtensa_opcode_internal; } xtensa_opcode_internal;
typedef struct xtensa_regfile_internal_struct
typedef struct opname_lookup_entry_struct
{ {
const char *key; /* Opcode mnemonic. */ const char *name; /* Full name of the regfile. */
xtensa_opcode opcode; /* Internal opcode number. */ const char *shortname; /* Abbreviated name. */
} opname_lookup_entry; xtensa_regfile parent; /* View parent (or identity). */
int num_bits; /* Width of the registers. */
int num_entries; /* Number of registers. */
} xtensa_regfile_internal;
typedef struct xtensa_interface_internal_struct
{
const char *name; /* Interface name. */
int num_bits; /* Width of the interface. */
uint32 flags; /* See XTENSA_INTERFACE_* flags. */
char inout; /* "i" or "o". */
} xtensa_interface_internal;
typedef struct xtensa_funcUnit_internal_struct
{
const char *name; /* Functional unit name. */
int num_copies; /* Number of instances. */
} xtensa_funcUnit_internal;
typedef struct xtensa_state_internal_struct
{
const char *name; /* State name. */
int num_bits; /* Number of state bits. */
uint32 flags; /* See XTENSA_STATE_* flags. */
} xtensa_state_internal;
typedef struct xtensa_sysreg_internal_struct
{
const char *name; /* Register name. */
int number; /* Register number. */
int is_user; /* Non-zero if a "user register". */
} xtensa_sysreg_internal;
typedef struct xtensa_lookup_entry_struct
{
const char *key;
union
{
xtensa_opcode opcode; /* Internal opcode number. */
xtensa_sysreg sysreg; /* Internal sysreg number. */
xtensa_state state; /* Internal state number. */
xtensa_interface intf; /* Internal interface number. */
xtensa_funcUnit fun; /* Internal funcUnit number. */
} u;
} xtensa_lookup_entry;
typedef struct xtensa_isa_internal_struct typedef struct xtensa_isa_internal_struct
{ {
int is_big_endian; /* Endianness. */ int is_big_endian; /* Endianness. */
int insn_size; /* Maximum length in bytes. */ int insn_size; /* Maximum length in bytes. */
int insnbuf_size; /* Number of insnbuf_words. */ int insnbuf_size; /* Number of insnbuf_words. */
int num_opcodes; /* Total number for all modules. */
xtensa_opcode_internal **opcode_table;/* Indexed by internal opcode #. */ int num_formats;
int num_modules; /* Number of modules (DLLs) loaded. */ xtensa_format_internal *formats;
int *module_opcode_base; /* Starting opcode # for each module. */ xtensa_format_decode_fn format_decode_fn;
xtensa_insn_decode_fn *module_decode_fn; /* Decode fn for each module. */ xtensa_length_decode_fn length_decode_fn;
opname_lookup_entry *opname_lookup_table; /* Lookup table for each module. */
struct config_struct *config; /* Table of configuration parameters. */ int num_slots;
int has_density; /* Is density option available? */ xtensa_slot_internal *slots;
int num_fields;
int num_operands;
xtensa_operand_internal *operands;
int num_iclasses;
xtensa_iclass_internal *iclasses;
int num_opcodes;
xtensa_opcode_internal *opcodes;
xtensa_lookup_entry *opname_lookup_table;
int num_regfiles;
xtensa_regfile_internal *regfiles;
int num_states;
xtensa_state_internal *states;
xtensa_lookup_entry *state_lookup_table;
int num_sysregs;
xtensa_sysreg_internal *sysregs;
xtensa_lookup_entry *sysreg_lookup_table;
/* The current Xtensa ISA only supports 256 of each kind of sysreg so
we can get away with implementing lookups with tables indexed by
the register numbers. If we ever allow larger sysreg numbers, this
may have to be reimplemented. The first entry in the following
arrays corresponds to "special" registers and the second to "user"
registers. */
int max_sysreg_num[2];
xtensa_sysreg *sysreg_table[2];
int num_interfaces;
xtensa_interface_internal *interfaces;
xtensa_lookup_entry *interface_lookup_table;
int num_funcUnits;
xtensa_funcUnit_internal *funcUnits;
xtensa_lookup_entry *funcUnit_lookup_table;
} xtensa_isa_internal; } xtensa_isa_internal;
extern int xtensa_isa_name_compare (const void *, const void *);
typedef struct xtensa_isa_module_struct extern xtensa_isa_status xtisa_errno;
{ extern char xtisa_error_msg[];
int (*get_num_opcodes_fn) (void);
xtensa_opcode_internal **(*get_opcodes_fn) (void);
int (*decode_insn_fn) (const xtensa_insnbuf);
struct config_struct *(*get_config_table_fn) (void);
} xtensa_isa_module;
extern xtensa_isa_module xtensa_isa_modules[];
#endif /* !XTENSA_ISA_INTERNAL_H */

View File

@ -1,5 +1,5 @@
/* Interface definition for configurable Xtensa ISA support. /* Interface definition for configurable Xtensa ISA support.
Copyright 2003 Free Software Foundation, Inc. Copyright 2003, 2004 Free Software Foundation, Inc.
This file is part of BFD, the Binary File Descriptor library. This file is part of BFD, the Binary File Descriptor library.
@ -20,209 +20,763 @@
#ifndef XTENSA_LIBISA_H #ifndef XTENSA_LIBISA_H
#define XTENSA_LIBISA_H #define XTENSA_LIBISA_H
/* Use the statically-linked version for the GNU tools. */
#define STATIC_LIBISA 1
#ifdef __cplusplus #ifdef __cplusplus
extern "C" { extern "C" {
#endif #endif
/* Use the statically-linked version for the GNU tools. */
#define STATIC_LIBISA 1
/* Version number: This is intended to help support code that works with
versions of this library from multiple Xtensa releases. */
#define XTENSA_ISA_VERSION 7000
#ifndef uint32 #ifndef uint32
#define uint32 unsigned int #define uint32 unsigned int
#endif #endif
/* This file defines the interface to the Xtensa ISA library. This library /* This file defines the interface to the Xtensa ISA library. This
contains most of the ISA-specific information for a particular Xtensa library contains most of the ISA-specific information for a
processor. For example, the set of valid instructions, their opcode particular Xtensa processor. For example, the set of valid
encodings and operand fields are all included here. To support Xtensa's instructions, their opcode encodings and operand fields are all
configurability and user-defined instruction extensions (i.e., TIE), the included here.
library is initialized by loading one or more dynamic libraries; only a
small set of interface code is present in the statically-linked portion
of the library.
This interface basically defines four abstract data types. This interface basically defines a number of abstract data types.
. an instruction buffer - for holding the raw instruction bits . an instruction buffer - for holding the raw instruction bits
. ISA info - information about the ISA as a whole . ISA info - information about the ISA as a whole
. opcode info - information about individual instructions . instruction formats - instruction size and slot structure
. operand info - information about specific instruction operands . opcodes - information about individual instructions
. operands - information about register and immediate instruction operands
. stateOperands - information about processor state instruction operands
. interfaceOperands - information about interface instruction operands
. register files - register file information
. processor states - internal processor state information
. system registers - "special registers" and "user registers"
. interfaces - TIE interfaces that are external to the processor
. functional units - TIE shared functions
It would be nice to implement these as classes in C++, but the library is The interface defines a set of functions to access each data type.
implemented in C to match the expectations of the GNU tools. With the exception of the instruction buffer, the internal
Instead, the interface defines a set of functions to access each data representations of the data structures are hidden. All accesses must
type. With the exception of the instruction buffer, the internal be made through the functions defined here. */
representations of the data structures are hidden. All accesses must be
made through the functions defined here. */
typedef void* xtensa_isa; typedef struct xtensa_isa_opaque { int unused; } *xtensa_isa;
typedef void* xtensa_operand;
/* Opcodes are represented here using sequential integers beginning with 0. /* Opcodes, formats, regfiles, states, sysregs, ctypes, and protos are
The specific value used for a particular opcode is only fixed for a represented here using sequential integers beginning with 0. The
particular instantiation of an xtensa_isa structure, so these values specific values are only fixed for a particular instantiation of an
should only be used internally. */ xtensa_isa structure, so these values should only be used
internally. */
typedef int xtensa_opcode; typedef int xtensa_opcode;
typedef int xtensa_format;
typedef int xtensa_regfile;
typedef int xtensa_state;
typedef int xtensa_sysreg;
typedef int xtensa_interface;
typedef int xtensa_funcUnit;
/* Define a unique value for undefined items. */
/* Define a unique value for undefined opcodes ("static const int" doesn't
seem to work for this because EGCS 1.0.3 on i686-Linux without -O won't
allow it to be used as an initializer). */
#define XTENSA_UNDEFINED -1 #define XTENSA_UNDEFINED -1
typedef int libisa_module_specifier; /* Overview of using this interface to decode/encode instructions:
extern xtensa_isa xtensa_isa_init (void); Each Xtensa instruction is associated with a particular instruction
format, where the format defines a fixed number of slots for
operations. The formats for the core Xtensa ISA have only one slot,
but FLIX instructions may have multiple slots. Within each slot,
there is a single opcode and some number of associated operands.
The encoding and decoding functions operate on instruction buffers,
not on the raw bytes of the instructions. The same instruction
buffer data structure is used for both entire instructions and
individual slots in those instructions -- the contents of a slot need
to be extracted from or inserted into the buffer for the instruction
as a whole.
Decoding an instruction involves first finding the format, which
identifies the number of slots, and then decoding each slot
separately. A slot is decoded by finding the opcode and then using
the opcode to determine how many operands there are. For example:
xtensa_insnbuf_from_chars
xtensa_format_decode
for each slot {
xtensa_format_get_slot
xtensa_opcode_decode
for each operand {
xtensa_operand_get_field
xtensa_operand_decode
}
}
Encoding an instruction is roughly the same procedure in reverse:
xtensa_format_encode
for each slot {
xtensa_opcode_encode
for each operand {
xtensa_operand_encode
xtensa_operand_set_field
}
xtensa_format_set_slot
}
xtensa_insnbuf_to_chars
*/
/* Error handling. */
/* Error codes. The code for the most recent error condition can be
retrieved with the "errno" function. For any result other than
xtensa_isa_ok, an error message containing additional information
about the problem can be retrieved using the "error_msg" function.
The error messages are stored in an internal buffer, which should not
should be freed and may be overwritten by subsequent operations. */
typedef enum xtensa_isa_status_enum
{
xtensa_isa_ok = 0,
xtensa_isa_bad_format,
xtensa_isa_bad_slot,
xtensa_isa_bad_opcode,
xtensa_isa_bad_operand,
xtensa_isa_bad_field,
xtensa_isa_bad_iclass,
xtensa_isa_bad_regfile,
xtensa_isa_bad_sysreg,
xtensa_isa_bad_state,
xtensa_isa_bad_interface,
xtensa_isa_bad_funcUnit,
xtensa_isa_wrong_slot,
xtensa_isa_no_field,
xtensa_isa_out_of_memory,
xtensa_isa_buffer_overflow,
xtensa_isa_internal_error,
xtensa_isa_bad_value
} xtensa_isa_status;
extern xtensa_isa_status
xtensa_isa_errno (xtensa_isa isa);
extern char *
xtensa_isa_error_msg (xtensa_isa isa);
/* Instruction buffers. */ /* Instruction buffers. */
typedef uint32 xtensa_insnbuf_word; typedef uint32 xtensa_insnbuf_word;
typedef xtensa_insnbuf_word *xtensa_insnbuf; typedef xtensa_insnbuf_word *xtensa_insnbuf;
/* Get the size in words of the xtensa_insnbuf array. */
extern int xtensa_insnbuf_size (xtensa_isa);
/* Allocate (with malloc) an xtensa_insnbuf of the right size. */ /* Get the size in "insnbuf_words" of the xtensa_insnbuf array. */
extern xtensa_insnbuf xtensa_insnbuf_alloc (xtensa_isa);
/* Release (with free) an xtensa_insnbuf of the right size. */ extern int
extern void xtensa_insnbuf_free (xtensa_insnbuf); xtensa_insnbuf_size (xtensa_isa isa);
/* Inward and outward conversion from memory images (byte streams) to our
internal instruction representation. */
extern void xtensa_insnbuf_to_chars (xtensa_isa, const xtensa_insnbuf,
char *);
extern void xtensa_insnbuf_from_chars (xtensa_isa, xtensa_insnbuf,
const char *);
/* Allocate an xtensa_insnbuf of the right size. */
extern xtensa_insnbuf
xtensa_insnbuf_alloc (xtensa_isa isa);
/* Release an xtensa_insnbuf. */
extern void
xtensa_insnbuf_free (xtensa_isa isa, xtensa_insnbuf buf);
/* Conversion between raw memory (char arrays) and our internal
instruction representation. This is complicated by the Xtensa ISA's
variable instruction lengths. When converting to chars, the buffer
must contain a valid instruction so we know how many bytes to copy;
thus, the "to_chars" function returns the number of bytes copied or
XTENSA_UNDEFINED on error. The "from_chars" function first reads the
minimal number of bytes required to decode the instruction length and
then proceeds to copy the entire instruction into the buffer; if the
memory does not contain a valid instruction, it copies the maximum
number of bytes required for the longest Xtensa instruction. The
"num_chars" argument may be used to limit the number of bytes that
can be read or written. Otherwise, if "num_chars" is zero, the
functions may read or write past the end of the code. */
extern int
xtensa_insnbuf_to_chars (xtensa_isa isa, const xtensa_insnbuf insn,
char *cp, int num_chars);
extern void
xtensa_insnbuf_from_chars (xtensa_isa isa, xtensa_insnbuf insn,
const char *cp, int num_chars);
/* ISA information. */ /* ISA information. */
/* Load the ISA information from a shared library. If successful, this returns /* Initialize the ISA information. */
a value which identifies the ISA for use in subsequent calls to the ISA
library; otherwise, it returns NULL. Multiple ISAs can be loaded to support
heterogeneous multiprocessor systems. */
extern xtensa_isa xtensa_load_isa (libisa_module_specifier);
/* Extend an existing set of ISA information by loading an additional shared extern xtensa_isa
library of ISA information. This is primarily intended for loading TIE xtensa_isa_init (xtensa_isa_status *errno_p, char **error_msg_p);
extensions. If successful, the return value is non-zero. */
extern int xtensa_extend_isa (xtensa_isa, libisa_module_specifier);
/* The default ISA. This variable is set automatically to the ISA most
recently loaded and is provided as a convenience. An exception is the GNU
opcodes library, where there is a fixed interface that does not allow
passing the ISA as a parameter and the ISA must be taken from this global
variable. (Note: Since this variable is just a convenience, it is not
exported when libisa is built as a DLL, due to the hassle of dealing with
declspecs.) */
extern xtensa_isa xtensa_default_isa;
/* Deallocate an xtensa_isa structure. */ /* Deallocate an xtensa_isa structure. */
extern void xtensa_isa_free (xtensa_isa);
extern void
xtensa_isa_free (xtensa_isa isa);
/* Get the maximum instruction size in bytes. */ /* Get the maximum instruction size in bytes. */
extern int xtensa_insn_maxlength (xtensa_isa);
/* Get the total number of opcodes for this processor. */ extern int
extern int xtensa_num_opcodes (xtensa_isa); xtensa_isa_maxlength (xtensa_isa isa);
/* Decode the length in bytes of an instruction in raw memory (not an
insnbuf). This function reads only the minimal number of bytes
required to decode the instruction length. Returns
XTENSA_UNDEFINED on error. */
extern int
xtensa_isa_length_from_chars (xtensa_isa isa, const char *cp);
/* Get the number of stages in the processor's pipeline. The pipeline
stage values returned by other functions in this library will range
from 0 to N-1, where N is the value returned by this function.
Note that the stage numbers used here may not correspond to the
actual processor hardware, e.g., the hardware may have additional
stages before stage 0. Returns XTENSA_UNDEFINED on error. */
extern int
xtensa_isa_num_pipe_stages (xtensa_isa isa);
/* Get the number of various entities that are defined for this processor. */
extern int
xtensa_isa_num_formats (xtensa_isa isa);
extern int
xtensa_isa_num_opcodes (xtensa_isa isa);
extern int
xtensa_isa_num_regfiles (xtensa_isa isa);
extern int
xtensa_isa_num_states (xtensa_isa isa);
extern int
xtensa_isa_num_sysregs (xtensa_isa isa);
extern int
xtensa_isa_num_interfaces (xtensa_isa isa);
extern int
xtensa_isa_num_funcUnits (xtensa_isa isa);
/* Instruction formats. */
/* Get the name of a format. Returns null on error. */
extern const char *
xtensa_format_name (xtensa_isa isa, xtensa_format fmt);
/* Given a format name, return the format number. Returns
XTENSA_UNDEFINED if the name is not a valid format. */
extern xtensa_format
xtensa_format_lookup (xtensa_isa isa, const char *fmtname);
/* Decode the instruction format from a binary instruction buffer.
Returns XTENSA_UNDEFINED if the format is not recognized. */
extern xtensa_format
xtensa_format_decode (xtensa_isa isa, const xtensa_insnbuf insn);
/* Set the instruction format field(s) in a binary instruction buffer.
All the other fields are set to zero. Returns non-zero on error. */
extern int
xtensa_format_encode (xtensa_isa isa, xtensa_format fmt, xtensa_insnbuf insn);
/* Find the length (in bytes) of an instruction. Returns
XTENSA_UNDEFINED on error. */
extern int
xtensa_format_length (xtensa_isa isa, xtensa_format fmt);
/* Get the number of slots in an instruction. Returns XTENSA_UNDEFINED
on error. */
extern int
xtensa_format_num_slots (xtensa_isa isa, xtensa_format fmt);
/* Get the opcode for a no-op in a particular slot.
Returns XTENSA_UNDEFINED on error. */
extern xtensa_opcode
xtensa_format_slot_nop_opcode (xtensa_isa isa, xtensa_format fmt, int slot);
/* Get the bits for a specified slot out of an insnbuf for the
instruction as a whole and put them into an insnbuf for that one
slot, and do the opposite to set a slot. Return non-zero on error. */
extern int
xtensa_format_get_slot (xtensa_isa isa, xtensa_format fmt, int slot,
const xtensa_insnbuf insn, xtensa_insnbuf slotbuf);
extern int
xtensa_format_set_slot (xtensa_isa isa, xtensa_format fmt, int slot,
xtensa_insnbuf insn, const xtensa_insnbuf slotbuf);
/* Opcode information. */
/* Translate a mnemonic name to an opcode. Returns XTENSA_UNDEFINED if /* Translate a mnemonic name to an opcode. Returns XTENSA_UNDEFINED if
the name is not a valid opcode mnemonic. */ the name is not a valid opcode mnemonic. */
extern xtensa_opcode xtensa_opcode_lookup (xtensa_isa, const char *);
/* Decode a binary instruction buffer. Returns the opcode or extern xtensa_opcode
XTENSA_UNDEFINED if the instruction is illegal. */ xtensa_opcode_lookup (xtensa_isa isa, const char *opname);
extern xtensa_opcode xtensa_decode_insn (xtensa_isa, const xtensa_insnbuf);
/* Opcode information. */ /* Decode the opcode for one instruction slot from a binary instruction
buffer. Returns the opcode or XTENSA_UNDEFINED if the opcode is
illegal. */
/* Set the opcode field(s) in a binary instruction buffer. The operand extern xtensa_opcode
fields are set to zero. */ xtensa_opcode_decode (xtensa_isa isa, xtensa_format fmt, int slot,
extern void xtensa_encode_insn (xtensa_isa, xtensa_opcode, xtensa_insnbuf); const xtensa_insnbuf slotbuf);
/* Get the mnemonic name for an opcode. */
extern const char * xtensa_opcode_name (xtensa_isa, xtensa_opcode);
/* Find the length (in bytes) of an instruction. */ /* Set the opcode field(s) for an instruction slot. All other fields
extern int xtensa_insn_length (xtensa_isa, xtensa_opcode); in the slot are set to zero. Returns non-zero if the opcode cannot
be encoded. */
/* Find the length of an instruction by looking only at the first byte. */ extern int
extern int xtensa_insn_length_from_first_byte (xtensa_isa, char); xtensa_opcode_encode (xtensa_isa isa, xtensa_format fmt, int slot,
xtensa_insnbuf slotbuf, xtensa_opcode opc);
/* Find the number of operands for an instruction. */
extern int xtensa_num_operands (xtensa_isa, xtensa_opcode);
/* Get the information about operand number "opnd" of a particular opcode. */ /* Get the mnemonic name for an opcode. Returns null on error. */
extern xtensa_operand xtensa_get_operand (xtensa_isa, xtensa_opcode, int);
extern const char *
xtensa_opcode_name (xtensa_isa isa, xtensa_opcode opc);
/* Check various properties of opcodes. These functions return 0 if
the condition is false, 1 if the condition is true, and
XTENSA_UNDEFINED on error. The instructions are classified as
follows:
branch: conditional branch; may fall through to next instruction (B*)
jump: unconditional branch (J, JX, RET*, RF*)
loop: zero-overhead loop (LOOP*)
call: unconditional call; control returns to next instruction (CALL*)
For the opcodes that affect control flow in some way, the branch
target may be specified by an immediate operand or it may be an
address stored in a register. You can distinguish these by
checking if the instruction has a PC-relative immediate
operand. */
extern int
xtensa_opcode_is_branch (xtensa_isa isa, xtensa_opcode opc);
extern int
xtensa_opcode_is_jump (xtensa_isa isa, xtensa_opcode opc);
extern int
xtensa_opcode_is_loop (xtensa_isa isa, xtensa_opcode opc);
extern int
xtensa_opcode_is_call (xtensa_isa isa, xtensa_opcode opc);
/* Find the number of ordinary operands, state operands, and interface
operands for an instruction. These return XTENSA_UNDEFINED on
error. */
extern int
xtensa_opcode_num_operands (xtensa_isa isa, xtensa_opcode opc);
extern int
xtensa_opcode_num_stateOperands (xtensa_isa isa, xtensa_opcode opc);
extern int
xtensa_opcode_num_interfaceOperands (xtensa_isa isa, xtensa_opcode opc);
/* Get functional unit usage requirements for an opcode. Each "use"
is identified by a <functional unit, pipeline stage> pair. The
"num_funcUnit_uses" function returns the number of these "uses" or
XTENSA_UNDEFINED on error. The "funcUnit_use" function returns
a pointer to a "use" pair or null on error. */
typedef struct xtensa_funcUnit_use_struct
{
xtensa_funcUnit unit;
int stage;
} xtensa_funcUnit_use;
extern int
xtensa_opcode_num_funcUnit_uses (xtensa_isa isa, xtensa_opcode opc);
extern xtensa_funcUnit_use *
xtensa_opcode_funcUnit_use (xtensa_isa isa, xtensa_opcode opc, int u);
/* Operand information. */ /* Operand information. */
/* Find the kind of operand. There are three possibilities: /* Get the name of an operand. Returns null on error. */
1) PC-relative immediates (e.g., "l", "L"). These can be identified with
the xtensa_operand_isPCRelative function.
2) non-PC-relative immediates ("i").
3) register-file short names (e.g., "a", "b", "m" and others defined
via TIE). */
extern char * xtensa_operand_kind (xtensa_operand);
/* Check if an operand is an input ('<'), output ('>'), or inout ('=') extern const char *
xtensa_operand_name (xtensa_isa isa, xtensa_opcode opc, int opnd);
/* Some operands are "invisible", i.e., not explicitly specified in
assembly language. When assembling an instruction, you need not set
the values of invisible operands, since they are either hardwired or
derived from other field values. The values of invisible operands
can be examined in the same way as other operands, but remember that
an invisible operand may get its value from another visible one, so
the entire instruction must be available before examining the
invisible operand values. This function returns 1 if an operand is
visible, 0 if it is invisible, or XTENSA_UNDEFINED on error. Note
that whether an operand is visible is orthogonal to whether it is
"implicit", i.e., whether it is encoded in a field in the
instruction. */
extern int
xtensa_operand_is_visible (xtensa_isa isa, xtensa_opcode opc, int opnd);
/* Check if an operand is an input ('i'), output ('o'), or inout ('m')
operand. Note: The output operand of a conditional assignment operand. Note: The output operand of a conditional assignment
(e.g., movnez) appears here as an inout ('=') even if it is declared (e.g., movnez) appears here as an inout ('m') even if it is declared
in the TIE code as an output ('>'); this allows the compiler to in the TIE code as an output ('o'); this allows the compiler to
properly handle register allocation for conditional assignments. */ properly handle register allocation for conditional assignments.
extern char xtensa_operand_inout (xtensa_operand); Returns 0 on error. */
extern char
xtensa_operand_inout (xtensa_isa isa, xtensa_opcode opc, int opnd);
/* Get and set the raw (encoded) value of the field for the specified /* Get and set the raw (encoded) value of the field for the specified
operand. The "set" function does not check if the value fits in the operand. The "set" function does not check if the value fits in the
field; that is done by the "encode" function below. */ field; that is done by the "encode" function below. Both of these
extern uint32 xtensa_operand_get_field (xtensa_operand, const xtensa_insnbuf); functions return non-zero on error, e.g., if the field is not defined
for the specified slot. */
extern void xtensa_operand_set_field (xtensa_operand, xtensa_insnbuf, uint32); extern int
xtensa_operand_get_field (xtensa_isa isa, xtensa_opcode opc, int opnd,
xtensa_format fmt, int slot,
const xtensa_insnbuf slotbuf, uint32 *valp);
extern int
xtensa_operand_set_field (xtensa_isa isa, xtensa_opcode opc, int opnd,
xtensa_format fmt, int slot,
xtensa_insnbuf slotbuf, uint32 val);
/* Encode and decode operands. The raw bits in the operand field /* Encode and decode operands. The raw bits in the operand field may
may be encoded in a variety of different ways. These functions hide the be encoded in a variety of different ways. These functions hide
details of that encoding. The encode function has a special return type the details of that encoding. The result values are returned through
(xtensa_encode_result) to indicate success or the reason for failure; the the argument pointer. The return value is non-zero on error. */
encoded value is returned through the argument pointer. The decode function
has no possibility of failure and returns the decoded value. */
typedef enum extern int
{ xtensa_operand_encode (xtensa_isa isa, xtensa_opcode opc, int opnd,
xtensa_encode_result_ok, uint32 *valp);
xtensa_encode_result_align,
xtensa_encode_result_not_in_table,
xtensa_encode_result_too_low,
xtensa_encode_result_too_high,
xtensa_encode_result_not_ok,
xtensa_encode_result_max = xtensa_encode_result_not_ok
} xtensa_encode_result;
extern xtensa_encode_result xtensa_operand_encode (xtensa_operand, uint32 *); extern int
xtensa_operand_decode (xtensa_isa isa, xtensa_opcode opc, int opnd,
extern uint32 xtensa_operand_decode (xtensa_operand, uint32); uint32 *valp);
/* For PC-relative offset operands, the interpretation of the offset may vary /* An operand may be either a register operand or an immediate of some
between opcodes, e.g., is it relative to the current PC or that of the next sort (e.g., PC-relative or not). The "is_register" function returns
instruction? The following functions are defined to perform PC-relative 0 if the operand is an immediate, 1 if it is a register, and
relocations and to undo them (as in the disassembler). The first function XTENSA_UNDEFINED on error. The "regfile" function returns the
takes the desired address and the PC of the current instruction and returns regfile for a register operand, or XTENSA_UNDEFINED on error. */
the unencoded value to be stored in the offset field. The second function
takes the unencoded offset value and the current PC and returns the address.
Note that these functions do not replace the encode/decode functions; the
operands must be encoded/decoded separately. */
extern int xtensa_operand_isPCRelative (xtensa_operand); extern int
xtensa_operand_is_register (xtensa_isa isa, xtensa_opcode opc, int opnd);
extern uint32 xtensa_operand_do_reloc (xtensa_operand, uint32, uint32); extern xtensa_regfile
xtensa_operand_regfile (xtensa_isa isa, xtensa_opcode opc, int opnd);
/* Register operands may span multiple consecutive registers, e.g., a
64-bit data type may occupy two 32-bit registers. Only the first
register is encoded in the operand field. This function specifies
the number of consecutive registers occupied by this operand. For
non-register operands, the return value is undefined. Returns
XTENSA_UNDEFINED on error. */
extern int
xtensa_operand_num_regs (xtensa_isa isa, xtensa_opcode opc, int opnd);
/* Some register operands do not completely identify the register being
accessed. For example, the operand value may be added to an internal
state value. By definition, this implies that the corresponding
regfile is not allocatable. Unknown registers should generally be
treated with worst-case assumptions. The function returns 0 if the
register value is unknown, 1 if known, and XTENSA_UNDEFINED on
error. */
extern int
xtensa_operand_is_known_reg (xtensa_isa isa, xtensa_opcode opc, int opnd);
/* Check if an immediate operand is PC-relative. Returns 0 for register
operands and non-PC-relative immediates, 1 for PC-relative
immediates, and XTENSA_UNDEFINED on error. */
extern int
xtensa_operand_is_PCrelative (xtensa_isa isa, xtensa_opcode opc, int opnd);
/* For PC-relative offset operands, the interpretation of the offset may
vary between opcodes, e.g., is it relative to the current PC or that
of the next instruction? The following functions are defined to
perform PC-relative relocations and to undo them (as in the
disassembler). The "do_reloc" function takes the desired address
value and the PC of the current instruction and sets the value to the
corresponding PC-relative offset (which can then be encoded and
stored into the operand field). The "undo_reloc" function takes the
unencoded offset value and the current PC and sets the value to the
appropriate address. The return values are non-zero on error. Note
that these functions do not replace the encode/decode functions; the
operands must be encoded/decoded separately and the encode functions
are responsible for detecting invalid operand values. */
extern int
xtensa_operand_do_reloc (xtensa_isa isa, xtensa_opcode opc, int opnd,
uint32 *valp, uint32 pc);
extern int
xtensa_operand_undo_reloc (xtensa_isa isa, xtensa_opcode opc, int opnd,
uint32 *valp, uint32 pc);
/* State Operands. */
/* Get the state accessed by a state operand. Returns XTENSA_UNDEFINED
on error. */
extern xtensa_state
xtensa_stateOperand_state (xtensa_isa isa, xtensa_opcode opc, int stOp);
/* Check if a state operand is an input ('i'), output ('o'), or inout
('m') operand. Returns 0 on error. */
extern char
xtensa_stateOperand_inout (xtensa_isa isa, xtensa_opcode opc, int stOp);
/* Interface Operands. */
/* Get the external interface accessed by an interface operand.
Returns XTENSA_UNDEFINED on error. */
extern xtensa_interface
xtensa_interfaceOperand_interface (xtensa_isa isa, xtensa_opcode opc,
int ifOp);
/* Register Files. */
/* Regfiles include both "real" regfiles and "views", where a view
allows a group of adjacent registers in a real "parent" regfile to be
viewed as a single register. A regfile view has all the same
properties as its parent except for its (long) name, bit width, number
of entries, and default ctype. You can use the parent function to
distinguish these two classes. */
/* Look up a regfile by either its name or its abbreviated "short name".
Returns XTENSA_UNDEFINED on error. The "lookup_shortname" function
ignores "view" regfiles since they always have the same shortname as
their parents. */
extern xtensa_regfile
xtensa_regfile_lookup (xtensa_isa isa, const char *name);
extern xtensa_regfile
xtensa_regfile_lookup_shortname (xtensa_isa isa, const char *shortname);
/* Get the name or abbreviated "short name" of a regfile.
Returns null on error. */
extern const char *
xtensa_regfile_name (xtensa_isa isa, xtensa_regfile rf);
extern const char *
xtensa_regfile_shortname (xtensa_isa isa, xtensa_regfile rf);
/* Get the parent regfile of a "view" regfile. If the regfile is not a
view, the result is the same as the input parameter. Returns
XTENSA_UNDEFINED on error. */
extern xtensa_regfile
xtensa_regfile_view_parent (xtensa_isa isa, xtensa_regfile rf);
/* Get the bit width of a regfile or regfile view.
Returns XTENSA_UNDEFINED on error. */
extern int
xtensa_regfile_num_bits (xtensa_isa isa, xtensa_regfile rf);
/* Get the number of regfile entries. Returns XTENSA_UNDEFINED on
error. */
extern int
xtensa_regfile_num_entries (xtensa_isa isa, xtensa_regfile rf);
/* Processor States. */
/* Look up a state by name. Returns XTENSA_UNDEFINED on error. */
extern xtensa_state
xtensa_state_lookup (xtensa_isa isa, const char *name);
/* Get the name for a processor state. Returns null on error. */
extern const char *
xtensa_state_name (xtensa_isa isa, xtensa_state st);
/* Get the bit width for a processor state.
Returns XTENSA_UNDEFINED on error. */
extern int
xtensa_state_num_bits (xtensa_isa isa, xtensa_state st);
/* Check if a state is exported from the processor core. Returns 0 if
the condition is false, 1 if the condition is true, and
XTENSA_UNDEFINED on error. */
extern int
xtensa_state_is_exported (xtensa_isa isa, xtensa_state st);
/* Sysregs ("special registers" and "user registers"). */
/* Look up a register by its number and whether it is a "user register"
or a "special register". Returns XTENSA_UNDEFINED if the sysreg does
not exist. */
extern xtensa_sysreg
xtensa_sysreg_lookup (xtensa_isa isa, int num, int is_user);
/* Check if there exists a sysreg with a given name.
If not, this function returns XTENSA_UNDEFINED. */
extern xtensa_sysreg
xtensa_sysreg_lookup_name (xtensa_isa isa, const char *name);
/* Get the name of a sysreg. Returns null on error. */
extern const char *
xtensa_sysreg_name (xtensa_isa isa, xtensa_sysreg sysreg);
/* Get the register number. Returns XTENSA_UNDEFINED on error. */
extern int
xtensa_sysreg_number (xtensa_isa isa, xtensa_sysreg sysreg);
/* Check if a sysreg is a "special register" or a "user register".
Returns 0 for special registers, 1 for user registers and
XTENSA_UNDEFINED on error. */
extern int
xtensa_sysreg_is_user (xtensa_isa isa, xtensa_sysreg sysreg);
/* Interfaces. */
/* Find an interface by name. The return value is XTENSA_UNDEFINED if
the specified interface is not found. */
extern xtensa_interface
xtensa_interface_lookup (xtensa_isa isa, const char *ifname);
/* Get the name of an interface. Returns null on error. */
extern const char *
xtensa_interface_name (xtensa_isa isa, xtensa_interface intf);
/* Get the bit width for an interface.
Returns XTENSA_UNDEFINED on error. */
extern int
xtensa_interface_num_bits (xtensa_isa isa, xtensa_interface intf);
/* Check if an interface is an input ('i') or output ('o') with respect
to the Xtensa processor core. Returns 0 on error. */
extern char
xtensa_interface_inout (xtensa_isa isa, xtensa_interface intf);
/* Check if accessing an interface has potential side effects.
Currently "data" interfaces have side effects and "control"
interfaces do not. Returns 1 if there are side effects, 0 if not,
and XTENSA_UNDEFINED on error. */
extern int
xtensa_interface_has_side_effect (xtensa_isa isa, xtensa_interface intf);
/* Functional Units. */
/* Find a functional unit by name. The return value is XTENSA_UNDEFINED if
the specified unit is not found. */
extern xtensa_funcUnit
xtensa_funcUnit_lookup (xtensa_isa isa, const char *fname);
/* Get the name of a functional unit. Returns null on error. */
extern const char *
xtensa_funcUnit_name (xtensa_isa isa, xtensa_funcUnit fun);
/* Functional units may be replicated. See how many instances of a
particular function unit exist. Returns XTENSA_UNDEFINED on error. */
extern int
xtensa_funcUnit_num_copies (xtensa_isa isa, xtensa_funcUnit fun);
extern uint32 xtensa_operand_undo_reloc (xtensa_operand, uint32, uint32);
#ifdef __cplusplus #ifdef __cplusplus
} }