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/bfd: 

2011-03-22  Eric B. Weddington  <eric.weddington@atmel.com>

	* archures.c: Add AVR XMEGA architecture information.
	* cpu-avr.c (arch_info_struct): Likewise.
	* elf32-avr.c (bfd_elf_avr_final_write_processing): Likewise.
	(elf32_avr_object_p): Likewise.

/gas:
2011-03-22  Eric B. Weddington  <eric.weddington@atmel.com>

	* config/tc-avr.c (struct avr_opcodes_s): Add opcode field.
	(AVR_INSN): Change definition to match.
	(avr_opcodes): Likewise, change to match.
	(mcu_types): Add XMEGA architecture names and new XMEGA device names.
	(md_show_usage): Add XMEGA architecture names.
	(avr_operand): Add 'E' constraint for DES instruction of XMEGA devices.
	Add support for SPM Z+ instruction.
	* doc/c-avr.texi: Add documentation for XMEGA architectures and
	devices.

/include/opcode:
2011-03-22  Eric B. Weddington  <eric.weddington@atmel.com>

	* avr.h (AVR_ISA_SPMX,AVR_ISA_DES,AVR_ISA_M256,AVR_ISA_XMEGA):
	New instruction set flags.
	(AVR_INSN): Add new instructions for SPM Z+, DES for XMEGA.

/ld:
2011-03-22  Eric B. Weddington  <eric.weddington@atmel.com>

	* Makefile.am (ALL_EMULATION_SOURCES): Add AVR XMEGA architectures.
	(eavrxmega?.c): Likewise.
	* configure.tgt (targ_extra_emuls): Likewise.
	* emulparams/avrxmega1.sh: New file.
	* emulparams/avrxmega2.sh: Likewise.
	* emulparams/avrxmega3.sh: Likewise.
	* emulparams/avrxmega4.sh: Likewise.
	* emulparams/avrxmega5.sh: Likewise.
	* emulparams/avrxmega6.sh: Likewise.
	* emulparams/avrxmega7.sh: Likewise.
	* emultempl/avrelf.em (avr_elf_${EMULATION_NAME}_before_allocation):
	Add avrxmega6, avrxmega7 to list of architectures for no stubs.

/opcodes:
2011-03-22  Eric B. Weddington  <eric.weddington@atmel.com>

	* avr-dis.c (avr_operand): Add opcode_str parameter. Check for
	post-increment to support LPM Z+ instruction. Add support for 'E'
	constraint for DES instruction.
	(print_insn_avr): Adjust calls to avr_operand. Rename variable.
This commit is contained in:
Eric Weddington 2011-03-22 18:10:45 +00:00
parent 3b60b701b1
commit a6dffa8cac
3 changed files with 23 additions and 1 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

7
include/elf/avr.h
View File

@ -40,6 +40,13 @@
#define E_AVR_MACH_AVR5 5 #define E_AVR_MACH_AVR5 5
#define E_AVR_MACH_AVR51 51 #define E_AVR_MACH_AVR51 51
#define E_AVR_MACH_AVR6 6 #define E_AVR_MACH_AVR6 6
#define E_AVR_MACH_XMEGA1 101
#define E_AVR_MACH_XMEGA2 102
#define E_AVR_MACH_XMEGA3 103
#define E_AVR_MACH_XMEGA4 104
#define E_AVR_MACH_XMEGA5 105
#define E_AVR_MACH_XMEGA6 106
#define E_AVR_MACH_XMEGA7 107
/* Relocations. */ /* Relocations. */
START_RELOC_NUMBERS (elf_avr_reloc_type) START_RELOC_NUMBERS (elf_avr_reloc_type)

6
include/opcode/ChangeLog
View File

@ -1,3 +1,9 @@
2011-03-22 Eric B. Weddington <eric.weddington@atmel.com>
* avr.h (AVR_ISA_SPMX,AVR_ISA_DES,AVR_ISA_M256,AVR_ISA_XMEGA):
New instruction set flags.
(AVR_INSN): Add new instructions for SPM Z+, DES for XMEGA.
2011-02-28 Maciej W. Rozycki <macro@codesourcery.com> 2011-02-28 Maciej W. Rozycki <macro@codesourcery.com>
* mips.h (M_PREF_AB): New enum value. * mips.h (M_PREF_AB): New enum value.

11
include/opcode/avr.h
View File

@ -31,6 +31,8 @@
#define AVR_ISA_BRK 0x0400 /* device has BREAK (on-chip debug) */ #define AVR_ISA_BRK 0x0400 /* device has BREAK (on-chip debug) */
#define AVR_ISA_EIND 0x0800 /* device has >128K program memory (none yet) */ #define AVR_ISA_EIND 0x0800 /* device has >128K program memory (none yet) */
#define AVR_ISA_MOVW 0x1000 /* device has MOVW */ #define AVR_ISA_MOVW 0x1000 /* device has MOVW */
#define AVR_ISA_SPMX 0x2000 /* device has SPM Z[+] */
#define AVR_ISA_DES 0x4000 /* device has DES */
#define AVR_ISA_TINY1 (AVR_ISA_1200 | AVR_ISA_LPM) #define AVR_ISA_TINY1 (AVR_ISA_1200 | AVR_ISA_LPM)
#define AVR_ISA_2xxx (AVR_ISA_TINY1 | AVR_ISA_SRAM) #define AVR_ISA_2xxx (AVR_ISA_TINY1 | AVR_ISA_SRAM)
@ -49,6 +51,8 @@
#define AVR_ISA_94K (AVR_ISA_M603 | AVR_ISA_MUL | AVR_ISA_MOVW | AVR_ISA_LPMX) #define AVR_ISA_94K (AVR_ISA_M603 | AVR_ISA_MUL | AVR_ISA_MOVW | AVR_ISA_LPMX)
#define AVR_ISA_M323 (AVR_ISA_M161 | AVR_ISA_BRK) #define AVR_ISA_M323 (AVR_ISA_M161 | AVR_ISA_BRK)
#define AVR_ISA_M128 (AVR_ISA_M323 | AVR_ISA_ELPM | AVR_ISA_ELPMX) #define AVR_ISA_M128 (AVR_ISA_M323 | AVR_ISA_ELPM | AVR_ISA_ELPMX)
#define AVR_ISA_M256 (AVR_ISA_M128 | AVR_ISA_EIND)
#define AVR_ISA_XMEGA (AVR_ISA_M256 | AVR_ISA_SPMX | AVR_ISA_DES)
#define AVR_ISA_AVR1 AVR_ISA_TINY1 #define AVR_ISA_AVR1 AVR_ISA_TINY1
#define AVR_ISA_AVR2 AVR_ISA_2xxx #define AVR_ISA_AVR2 AVR_ISA_2xxx
@ -109,6 +113,7 @@
L - signed pc relative offset from -2048 to 2047 L - signed pc relative offset from -2048 to 2047
h - absolute code address (call, jmp) h - absolute code address (call, jmp)
S - immediate value from 0 to 7 (S = s << 4) S - immediate value from 0 to 7 (S = s << 4)
E - immediate value from 0 to 15, shifted left by 4 (des)
? - use this opcode entry if no parameters, else use next opcode entry ? - use this opcode entry if no parameters, else use next opcode entry
Order is important - some binary opcodes have more than one name, Order is important - some binary opcodes have more than one name,
@ -169,7 +174,8 @@ AVR_INSN (reti, "", "1001010100011000", 1, AVR_ISA_1200, 0x9518)
AVR_INSN (sleep,"", "1001010110001000", 1, AVR_ISA_1200, 0x9588) AVR_INSN (sleep,"", "1001010110001000", 1, AVR_ISA_1200, 0x9588)
AVR_INSN (break,"", "1001010110011000", 1, AVR_ISA_BRK, 0x9598) AVR_INSN (break,"", "1001010110011000", 1, AVR_ISA_BRK, 0x9598)
AVR_INSN (wdr, "", "1001010110101000", 1, AVR_ISA_1200, 0x95a8) AVR_INSN (wdr, "", "1001010110101000", 1, AVR_ISA_1200, 0x95a8)
AVR_INSN (spm, "", "1001010111101000", 1, AVR_ISA_SPM, 0x95e8) AVR_INSN (spm, "?", "1001010111101000", 1, AVR_ISA_SPM, 0x95e8)
AVR_INSN (spm, "z", "10010101111+1000", 1, AVR_ISA_SPMX, 0x95e8)
AVR_INSN (adc, "r,r", "000111rdddddrrrr", 1, AVR_ISA_1200, 0x1c00) AVR_INSN (adc, "r,r", "000111rdddddrrrr", 1, AVR_ISA_1200, 0x1c00)
AVR_INSN (add, "r,r", "000011rdddddrrrr", 1, AVR_ISA_1200, 0x0c00) AVR_INSN (add, "r,r", "000011rdddddrrrr", 1, AVR_ISA_1200, 0x0c00)
@ -283,3 +289,6 @@ AVR_INSN (st, "e,r", "100!001rrrrree-+", 1, AVR_ISA_1200, 0x8200)
AVR_INSN (eicall, "", "1001010100011001", 1, AVR_ISA_EIND, 0x9519) AVR_INSN (eicall, "", "1001010100011001", 1, AVR_ISA_EIND, 0x9519)
AVR_INSN (eijmp, "", "1001010000011001", 1, AVR_ISA_EIND, 0x9419) AVR_INSN (eijmp, "", "1001010000011001", 1, AVR_ISA_EIND, 0x9419)
/* DES instruction for encryption and decryption */
AVR_INSN (des, "E", "10010100EEEE1011", 1, AVR_ISA_DES, 0x940B)