gdb/insight for ARCompact (from Richard Stuckey)
This commit is contained in:
parent
29d73b431a
commit
a6cfdbb3e4
249
MANIFEST
249
MANIFEST
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@ -1,249 +0,0 @@
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By codito
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added files:
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gas/testsuite/gas/arc/general_a700.d
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gas/testsuite/gas/arc/dsp1.d
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gas/testsuite/gas/arc/general_a700.s
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gas/testsuite/gas/arc/dsp1.s
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gas/testsuite/gas/arc/ld_arc700.s
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gas/testsuite/gas/arc/sub_s.d
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gas/testsuite/gas/arc/lsl_s.d
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gas/testsuite/gas/arc/gen_simd.d
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gas/testsuite/gas/arc/sub_s.s
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gas/testsuite/gas/arc/lsl_s.s
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gas/testsuite/gas/arc/prefetch.d
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gas/testsuite/gas/arc/gen_simd.s
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gas/testsuite/gas/arc/reloctest.d
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gas/testsuite/gas/arc/arc700.exp
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gas/testsuite/gas/arc/dsp2.d
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gas/testsuite/gas/arc/prefetch.s
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gas/testsuite/gas/arc/reloctest.s
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gas/testsuite/gas/arc/dsp2.s
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gas/testsuite/gas/arc/mpy_a700.d
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gas/testsuite/gas/arc/ex_arc700.s
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gas/testsuite/gas/arc/mpy_a700.s
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gas/config/extlib
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gas/config/extlib/configure
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gas/config/extlib/Makefile.in
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gas/config/extlib/arcsimd.s
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gas/config/extlib/configure.in
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gas/config/extlib/arcextlib.s
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include/elf/ChangeLog.codito
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libgloss/arc/syscall.h (delivered as linux/include/asm-arcnommu/unistd.h)
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ld/emultempl/arclinux.em
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ld/configdoc.texi
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ld/scripttempl/elfarc.sc
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ld/scripttempl/arclinux.sc
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ld/emulparams/arclinux.sh
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md5.sum
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opcodes/ChangeLog.codito
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opcodes/arcompact-dis.c
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changed files:
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bfd/archures.c (merged)
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bfd/bfd-in2.h (merged/regenerated)
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bfd/config.bfd
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bfd/configure.in
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bfd/cpu-arc.c (merged)
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bfd/elf32-arc.c
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bfd/reloc.c
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bfd/cpu-arc.c
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Makefile.in
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gas/configure.tgt (patch was originally in configure.in)
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gas/doc/c-arc.texi
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gas/doc/as.texinfo
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gas/configure.in
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gas/testsuite/gas/arc/swi.d
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gas/testsuite/gas/arc/sbc.d
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gas/testsuite/gas/arc/sleep.d
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gas/testsuite/gas/arc/brk.d
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gas/testsuite/gas/arc/swi.s
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gas/testsuite/gas/arc/rrc.d
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gas/testsuite/gas/arc/bic.d
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gas/testsuite/gas/arc/extb.d
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gas/testsuite/gas/arc/arc.exp
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gas/testsuite/gas/arc/asl.d
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gas/testsuite/gas/arc/asr.d
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gas/testsuite/gas/arc/sexw.d
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gas/testsuite/gas/arc/adc.d
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gas/testsuite/gas/arc/lsr.d
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gas/testsuite/gas/arc/mov.d
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gas/testsuite/gas/arc/ror.d
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gas/testsuite/gas/arc/and.d
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gas/testsuite/gas/arc/xor.d
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gas/testsuite/gas/arc/rlc.d
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gas/testsuite/gas/arc/or.d
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gas/testsuite/gas/arc/sexb.d
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gas/testsuite/gas/arc/jl.d
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gas/testsuite/gas/arc/extw.d
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gas/testsuite/gas/arc/add.d
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gas/testsuite/gas/arc/sub.d
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gas/struc-symbol.h
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gas/config/tc-arc.c
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gas/config/tc-arc.h
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gas/Makefile.am
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include/dis-asm.h
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include/elf/arc.h
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include/elf/common.h (adapted)
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include/opcode/arc.h
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ld/configure.in
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ld/emulparams/arcelf.sh
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ld/configure.tgt
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ld/Makefile.am
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binutils/configure.in
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binutils/testsuite/binutils-all/objdump.exp
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binutils/readelf.c
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opcodes/configure.in
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opcodes/arc-dis.c
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opcodes/arc-dis.h
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opcodes/arc-opc.c
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opcodes/Makefile.am
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opcodes/arc-ext.c
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opcodes/arc-ext.h
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gdb/doc/Makefile.in
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gdb/doc/gdb.texinfo
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gdb/remote.c
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gdb/testsuite/gdb.base/float.exp
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gdb/testsuite/lib/gdbserver-support.exp
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gdb/testsuite/gdb.asm/asm-source.exp
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gdb/dwarf2read.c
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gdb/dwarf2-frame.c
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gdb/configure.tgt
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gdb/version.in
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gdb/gdbserver/Makefile.in
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gdb/gdbserver/configure.srv
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gdb/gdbserver/proc-service.c
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gdb/gdbserver/remote-utils.c
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gdb/Makefile.in
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By ARC employees:
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added files:
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cgen/cpu/ARCompact.cpu
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cgen/cpu/arc.opc
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cgen/cpu/arc.cpu
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cpu/arc.opc
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cpu/sh-sim.cpu
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cpu/arc.cpu
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cpu/ARCompact.cpu
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gas/ChangeLog.ARC
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gdb/config/arc/arc.mt
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include/gdb/target-io/arc.h
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ld/ChangeLog.ARC
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opcodes/arc-opc.h
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opcodes/arc-opinst.c
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opcodes/arc-desc.c
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opcodes/arc-desc.h
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opcodes/arc-ibld.c
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opcodes/arc-asm.c
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sim/arc/ChangeLog
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sim/arc/configure.ac
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sim/arc/mloop5.in
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sim/arc/mloop6.in
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sim/arc/mloop7.in
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sim/arc/arc-sim.h
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sim/arc/Makefile.in
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sim/arc/tconfig.in
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sim/arc/sim-main.h
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sim/arc/devices.c
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sim/arc/sim-if.c
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sim/arc/arc5.c
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sim/arc/arc6.c
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sim/arc/arc7.c
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sim/arc/config.in
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sim/arc/configure
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sim/arc/arch.h
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sim/arc/arch.c
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sim/arc/decode5.h
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sim/arc/decode6.h
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sim/arc/decode7.h
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sim/arc/decode5.c
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sim/arc/decode6.c
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sim/arc/decode7.c
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sim/arc/sem5-switch.c
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sim/arc/sem6-switch.c
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sim/arc/sem7-switch.c
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sim/arc/sem5.c
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sim/arc/sem6.c
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sim/arc/sem7.c
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sim/arc/cpu5.h
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sim/arc/cpu6.h
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sim/arc/cpu7.h
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sim/arc/cpuall.h
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sim/arc/cpu5.c
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sim/arc/cpu6.c
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sim/arc/cpu7.c
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sim/arc/model5.c
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sim/arc/model6.c
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sim/arc/model7.c
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sim/arc/traps.c
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sim/common/ChangeLog.ARC
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newlib/ChangeLog.ARC
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newlib/libc/sys/arc/sys/fcntl.h
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replaced files:
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opcodes/arc-dis.c
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opcodes/arc-opc.c
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changed files:
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bfd/configure
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bfd/elf32-arc.c
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bfd/libbfd.h
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bfd/bfd-in2.h
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cgen/ChangeLog
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cgen/read.scm
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cgen/sim-cpu.scm
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cgen/utils-sim.scm
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cgen/cpu/ip2k.opc
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cgen/cpu/sparc.opc
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cgen/cpu/xc16x.opc
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cgen/cpu/fr30.opc
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cgen/cpu/mep.opc
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cgen/cpu/m32r.opc
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cgen/cpu/i960.opc
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cgen/cpu/sh.opc
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cgen/cpu/iq2000.opc
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cgen/cpu/openrisc.opc
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cgen/cpu/xstormy16.opc
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cgen/opc-itab.scm
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cpu/ChangeLog
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gas/config/tc-arc.c
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gas/config/tc-arc.h
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gas/configure
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gas/Makefile.in
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gas/doc/c-arc.texi
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gas/as.c
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gas/symbols.c
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gas/symbols.h
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gdb/ChangeLog
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gdb/configure.tgt
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include/ChangeLog
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include/dis-asm.h
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include/gdb/callback.h
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include/gdb/ChangeLog
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include/opcode/arc.h
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include/opcode/cgen.h
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ld/ChangeLog
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ld/scripttempl/arclinux.sc
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ld/scripttempl/elfarc.sc
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ld/emulparams/arclinux.sh
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ld/Makefile.am
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ld/Makefile.in
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libgloss/ChangeLog
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opcodes/arc-dis.h
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opcodes/arc-dis.c
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opcodes/arc-ext.h
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opcodes/arc-ext.c
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opcodes/arc-opc.c
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opcodes/ChangeLog
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opcodes/configure
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opcodes/configure.in
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opcodes/Makefile.am
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opcodes/Makefile.in
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opcodes/cgen-dis.c
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sim/ChangeLog
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sim/configure.ac
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sim/configure
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sim/common/callback.c
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sim/common/cgen-trace.c
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sim/common/ChangeLog
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sim/common/gennltvals.sh
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sim/common/gentvals.sh
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sim/common/nltvals.def
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sim/common/sim-utils.c
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sim/common/syscall.c
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@ -354,7 +354,6 @@ AR_FOR_TARGET=@AR_FOR_TARGET@
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AS_FOR_TARGET=@AS_FOR_TARGET@
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CC_FOR_TARGET=$(STAGE_CC_WRAPPER) @CC_FOR_TARGET@ $(FLAGS_FOR_TARGET)
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# If GCC_FOR_TARGET is not overriden on the command line, then this
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# variable is passed down to the gcc Makefile, where it is used to
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# build libgcc2.a. We define it here so that it can itself be
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@ -0,0 +1,146 @@
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Building gdb
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============
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You can build ARC GDB in two possible ways: one for debugging linux applications,
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and one for debugging programs directly on the CPU using either the built-in simulator,
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or the xISS (a fast instruction set simulator), or a JTAG connection to a hardware target.
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arc-linux-uclibc-gdb
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--------------------
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You will need to build GDB as well as gdbserver.
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For building GDB, do
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$ ./configure --target=arc-linux-uclibc --prefix=/install/path
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$ make
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$ make install
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(Where /install/path is a path to a directory where you want to install GDB.)
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For building gdbserver:
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You will need the arc-linux-uclibc-gcc toolchain. It should be in your path.
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$ cd gdbserver
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$ source ./build_gdbserver.sh
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$ ./configure --host=i386-redhat-linux-gnu --target=arc-linux-uclibc --prefix=/install/path
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$ make
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$ make install
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If you do not have the build_gdbserver.sh script, you will need these variables set in your
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environment:
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CFLAGS="-mA7 -static -O0"
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LDFLAGS="-mA7"
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CC=arc-linux-uclibc-gcc
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You will find a gdbserver in your install path.
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Copy it to an NFS share that is accessible from the board.
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Please use the script at <SOURCE-DIR>/insight/src/build_gdbserver.sh for reference.
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arc-elf32-gdb
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-------------
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Do
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$ ./configure --target=arc-elf32 --prefix=/install/path \
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--with-expat [ --with-libexpat-prefix=/expat/install/path ] \
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[ --with-xiss --with-xiss-prefix=/xISS/install/path ]
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$ make
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$ make install
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(Where /install/path is a path to a directory where you want to install GDB.)
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You will need to have the expat library (available from http://www.libexpat.org) installed on your machine.
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The `configure' script will search for this library in several standard locations; if it is installed in an
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unusual path, you can use the `--with-libexpat-prefix' option to specify its location.
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If you have the xISS (ARC Fast Instruction Set Simulator) installed, you may optionally build gdb to be able
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to use it directly, by specifying the --with-xiss and --with-xiss-prefix options. In this case, the xISS
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installation must have been built with the option "--enable-mdb" specified to the 'configure' script in
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order that the required header files are located in the /xISS/install/path/include directory.
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Running gdb
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===========
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XISS
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----
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If you have built arc-elf32-gdb to be able to use the xISS directly, you will need to set the environment
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variable XISS_HOME to identify the /xISS/install/path directory in order to be able to use the gdb
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'target arcxiss' command.
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XISS instruction address trace file
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-----------------------------------
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arc-elf32-gdb may be used in conjection with the xISS to trace instruction execution; it may create a file
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containing the address of each instruction executed, in the order in which they were executed. This file
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contains the data in a compressed encoding which results in a saving of about 80% of the uncompressed data
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size. See the ARC gdb 'Getting Started' manual for more information.
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Auxiliary registers XML file
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----------------------------
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When using gdb, you will need to provide it with a file which describes the auxiliary registers of the target
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(e.g. ARCAngel 4, simulator) upon which you are debugging.
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By default, gdb will look for a file named 'arc-registers.xml'; it will look first in your current working
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directory, and then in your home directory. Alternatively, a file may be specified by means of the
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'arc-reg-read-file' command.
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It is also possible to add new descriptions using the 'arc-reg-read-extra-file' command, thus allowing
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processor variants to be described by sets of common files and variant-specific files.
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Files containing descriptions for the ARC700, ARC600 and A5 variants of the ARC processor architecture are
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provided at
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gdb/features/arc700-cpu.xml
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gdb/features/arc600-cpu.xml
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gdb/features/arc-a5-cpu.xml
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It is suggested that you copy the appropriate file for your target architecture to your home or working directory,
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and rename it to 'arc-registers.xml'.
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It is simple to define a new target description; the XML schema for the description is defined in the
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file
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gdb/features/arc-registers.dtd
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In essence, a target description consists of a set of register descriptions. Each register description has
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these attributes:
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name : the register name (case-insensitive); may be 'unused'
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description : an (optional) textual description of the register's function
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number : the number of the register in the auxiliary register set (e.g. 0x0A for STATUS32)
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mask : a 32-bit mask which defines which bits of the register are valid (0xFFFFFFFF by default)
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access : the register's read/write access: R/O, R/W or W/O (R/W by default)
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Each register description may also have a set of field descriptions. Each field description has
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these attributes:
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name : the field name (case-insensitive); may be 'reserved'
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description : an (optional) textual description of the field's function
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onwrite : the (optional) value (for a reserved field) which must be supplied on a write operation
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offset : the offset in bits of the field from the least significant bit (0) of the register
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size : the size of the field in bits
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access : the field's read/write access: R/O, R/W or W/O (the register's access by default)
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Each field description may also have a set of field meanings. Each field meaning has these attributes:
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value : a value that the field may contain
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description : a textual explanation of the meaning of the field when it contains that value
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There may also be a set of Build Configuration Registers (BCRs). The descriptions of these registers do
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not have an access attribute; and, although a BCR may have a number of fields (which do not have access
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or onwrite attributes), these fields do not have field meanings.
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It is also possible to include definitions of Extension Core Registers: the descriptions of these have
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merely the register number (which must be between 32 and 59 inclusive), and mask and access attributes.
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@ -210,7 +210,6 @@ typedef struct disassemble_info
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typedef int (*disassembler_ftype) (bfd_vma, disassemble_info *);
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extern int print_insn_alpha (bfd_vma, disassemble_info *);
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extern int print_insn_arc (bfd_vma, disassemble_info *);
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extern int print_insn_avr (bfd_vma, disassemble_info *);
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extern int print_insn_bfin (bfd_vma, disassemble_info *);
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extern int print_insn_big_arm (bfd_vma, disassemble_info *);
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@ -284,7 +283,7 @@ extern int print_insn_z80 (bfd_vma, disassemble_info *);
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extern int print_insn_z8001 (bfd_vma, disassemble_info *);
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extern int print_insn_z8002 (bfd_vma, disassemble_info *);
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extern disassembler_ftype arc_get_disassembler (bfd *);
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extern disassembler_ftype arc_get_disassembler (void *);
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extern disassembler_ftype cris_get_disassembler (bfd *);
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extern void print_i386_disassembler_options (FILE *);
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@ -757,9 +757,7 @@ enum dwarf_call_frame_info
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/* GNU extensions. */
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DW_CFA_GNU_window_save = 0x2d,
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DW_CFA_GNU_args_size = 0x2e,
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DW_CFA_GNU_negative_offset_extended = 0x2f,
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/* Metaware High C compiler extensions. */
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DW_CFA_MWARC_info = 0x34
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DW_CFA_GNU_negative_offset_extended = 0x2f
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};
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#define DW_CIE_ID 0xffffffff
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@ -320,14 +320,6 @@ int cb_is_stdin PARAMS ((host_callback *, int));
|
|||
int cb_is_stdout PARAMS ((host_callback *, int));
|
||||
int cb_is_stderr PARAMS ((host_callback *, int));
|
||||
|
||||
/* Utility of cb_syscall to fetch a path name.
|
||||
The buffer is malloc'd and the address is stored in BUFP.
|
||||
The result is that of get_string, but prepended with
|
||||
simulator_sysroot if the string starts with '/'.
|
||||
If an error occurs, no buffer is left malloc'd. */
|
||||
#define TADDR unsigned long
|
||||
int get_path PARAMS ((host_callback *, CB_SYSCALL *, TADDR, char **));
|
||||
|
||||
/* Perform a system call. */
|
||||
CB_RC cb_syscall PARAMS ((host_callback *, CB_SYSCALL *));
|
||||
|
||||
|
|
|
@ -174,8 +174,8 @@ struct arc_operand_value {
|
|||
|
||||
struct arc_ext_operand_value {
|
||||
struct arc_ext_operand_value *next;
|
||||
struct arc_operand_value operand;
|
||||
};
|
||||
struct arc_operand_value operand;
|
||||
} *arc_ext_operands;
|
||||
|
||||
/* List of extension condition codes, core registers and auxiliary registers.
|
||||
Calls to gas/config/tc-arc.c:arc_extoper built up this list. */
|
||||
|
@ -357,14 +357,24 @@ struct arc_operand {
|
|||
const struct arc_operand_value **opval, int *invalid);
|
||||
};
|
||||
|
||||
enum
|
||||
enum
|
||||
{
|
||||
BR_exec_when_no_jump,
|
||||
BR_exec_always,
|
||||
BR_exec_when_jump
|
||||
};
|
||||
enum ARC_Debugger_OperandType
|
||||
{
|
||||
ARC_UNDEFINED,
|
||||
ARC_LIMM,
|
||||
ARC_SHIMM,
|
||||
ARC_REGISTER,
|
||||
ARCOMPACT_REGISTER /* Valid only for the
|
||||
registers allowed in
|
||||
16 bit mode */
|
||||
};
|
||||
|
||||
enum Flow
|
||||
enum Flow
|
||||
{
|
||||
noflow,
|
||||
direct_jump,
|
||||
|
@ -377,7 +387,7 @@ enum Flow
|
|||
enum { no_reg = 99 };
|
||||
enum { allOperandsSize = 256 };
|
||||
|
||||
struct arcDisState
|
||||
struct arcDisState
|
||||
{
|
||||
void *_this;
|
||||
int instructionLen;
|
||||
|
@ -386,7 +396,7 @@ struct arcDisState
|
|||
const char *(*auxRegName)(void*, int);
|
||||
const char *(*condCodeName)(void*, int);
|
||||
const char *(*instName)(void*, int, int, int*);
|
||||
|
||||
|
||||
unsigned char* instruction;
|
||||
unsigned index;
|
||||
const char *comm[6]; /* instr name, cond, NOP, 3 operands */
|
||||
|
@ -462,8 +472,6 @@ extern const struct arc_operand arc_operands_a4[];
|
|||
extern const struct arc_operand arc_operands_ac[];
|
||||
extern const struct arc_operand *arc_operands;
|
||||
extern int arc_operand_count;
|
||||
extern /*const*/ struct arc_opcode arc_opcodes[];
|
||||
extern const int arc_opcodes_count;
|
||||
extern const struct arc_operand_value arc_suffixes_a4[];
|
||||
extern const struct arc_operand_value arc_suffixes_ac[];
|
||||
extern const struct arc_operand_value *arc_suffixes;
|
||||
|
|
Loading…
Reference in New Issue