gdb/insight for ARCompact (from Richard Stuckey)

This commit is contained in:
Joern Rennecke 2009-09-11 04:45:52 +00:00
parent 29d73b431a
commit a6cfdbb3e4
7 changed files with 164 additions and 271 deletions

249
MANIFEST
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@ -1,249 +0,0 @@
By codito
added files:
gas/testsuite/gas/arc/general_a700.d
gas/testsuite/gas/arc/dsp1.d
gas/testsuite/gas/arc/general_a700.s
gas/testsuite/gas/arc/dsp1.s
gas/testsuite/gas/arc/ld_arc700.s
gas/testsuite/gas/arc/sub_s.d
gas/testsuite/gas/arc/lsl_s.d
gas/testsuite/gas/arc/gen_simd.d
gas/testsuite/gas/arc/sub_s.s
gas/testsuite/gas/arc/lsl_s.s
gas/testsuite/gas/arc/prefetch.d
gas/testsuite/gas/arc/gen_simd.s
gas/testsuite/gas/arc/reloctest.d
gas/testsuite/gas/arc/arc700.exp
gas/testsuite/gas/arc/dsp2.d
gas/testsuite/gas/arc/prefetch.s
gas/testsuite/gas/arc/reloctest.s
gas/testsuite/gas/arc/dsp2.s
gas/testsuite/gas/arc/mpy_a700.d
gas/testsuite/gas/arc/ex_arc700.s
gas/testsuite/gas/arc/mpy_a700.s
gas/config/extlib
gas/config/extlib/configure
gas/config/extlib/Makefile.in
gas/config/extlib/arcsimd.s
gas/config/extlib/configure.in
gas/config/extlib/arcextlib.s
include/elf/ChangeLog.codito
libgloss/arc/syscall.h (delivered as linux/include/asm-arcnommu/unistd.h)
ld/emultempl/arclinux.em
ld/configdoc.texi
ld/scripttempl/elfarc.sc
ld/scripttempl/arclinux.sc
ld/emulparams/arclinux.sh
md5.sum
opcodes/ChangeLog.codito
opcodes/arcompact-dis.c
changed files:
bfd/archures.c (merged)
bfd/bfd-in2.h (merged/regenerated)
bfd/config.bfd
bfd/configure.in
bfd/cpu-arc.c (merged)
bfd/elf32-arc.c
bfd/reloc.c
bfd/cpu-arc.c
Makefile.in
gas/configure.tgt (patch was originally in configure.in)
gas/doc/c-arc.texi
gas/doc/as.texinfo
gas/configure.in
gas/testsuite/gas/arc/swi.d
gas/testsuite/gas/arc/sbc.d
gas/testsuite/gas/arc/sleep.d
gas/testsuite/gas/arc/brk.d
gas/testsuite/gas/arc/swi.s
gas/testsuite/gas/arc/rrc.d
gas/testsuite/gas/arc/bic.d
gas/testsuite/gas/arc/extb.d
gas/testsuite/gas/arc/arc.exp
gas/testsuite/gas/arc/asl.d
gas/testsuite/gas/arc/asr.d
gas/testsuite/gas/arc/sexw.d
gas/testsuite/gas/arc/adc.d
gas/testsuite/gas/arc/lsr.d
gas/testsuite/gas/arc/mov.d
gas/testsuite/gas/arc/ror.d
gas/testsuite/gas/arc/and.d
gas/testsuite/gas/arc/xor.d
gas/testsuite/gas/arc/rlc.d
gas/testsuite/gas/arc/or.d
gas/testsuite/gas/arc/sexb.d
gas/testsuite/gas/arc/jl.d
gas/testsuite/gas/arc/extw.d
gas/testsuite/gas/arc/add.d
gas/testsuite/gas/arc/sub.d
gas/struc-symbol.h
gas/config/tc-arc.c
gas/config/tc-arc.h
gas/Makefile.am
include/dis-asm.h
include/elf/arc.h
include/elf/common.h (adapted)
include/opcode/arc.h
ld/configure.in
ld/emulparams/arcelf.sh
ld/configure.tgt
ld/Makefile.am
binutils/configure.in
binutils/testsuite/binutils-all/objdump.exp
binutils/readelf.c
opcodes/configure.in
opcodes/arc-dis.c
opcodes/arc-dis.h
opcodes/arc-opc.c
opcodes/Makefile.am
opcodes/arc-ext.c
opcodes/arc-ext.h
gdb/doc/Makefile.in
gdb/doc/gdb.texinfo
gdb/remote.c
gdb/testsuite/gdb.base/float.exp
gdb/testsuite/lib/gdbserver-support.exp
gdb/testsuite/gdb.asm/asm-source.exp
gdb/dwarf2read.c
gdb/dwarf2-frame.c
gdb/configure.tgt
gdb/version.in
gdb/gdbserver/Makefile.in
gdb/gdbserver/configure.srv
gdb/gdbserver/proc-service.c
gdb/gdbserver/remote-utils.c
gdb/Makefile.in
By ARC employees:
added files:
cgen/cpu/ARCompact.cpu
cgen/cpu/arc.opc
cgen/cpu/arc.cpu
cpu/arc.opc
cpu/sh-sim.cpu
cpu/arc.cpu
cpu/ARCompact.cpu
gas/ChangeLog.ARC
gdb/config/arc/arc.mt
include/gdb/target-io/arc.h
ld/ChangeLog.ARC
opcodes/arc-opc.h
opcodes/arc-opinst.c
opcodes/arc-desc.c
opcodes/arc-desc.h
opcodes/arc-ibld.c
opcodes/arc-asm.c
sim/arc/ChangeLog
sim/arc/configure.ac
sim/arc/mloop5.in
sim/arc/mloop6.in
sim/arc/mloop7.in
sim/arc/arc-sim.h
sim/arc/Makefile.in
sim/arc/tconfig.in
sim/arc/sim-main.h
sim/arc/devices.c
sim/arc/sim-if.c
sim/arc/arc5.c
sim/arc/arc6.c
sim/arc/arc7.c
sim/arc/config.in
sim/arc/configure
sim/arc/arch.h
sim/arc/arch.c
sim/arc/decode5.h
sim/arc/decode6.h
sim/arc/decode7.h
sim/arc/decode5.c
sim/arc/decode6.c
sim/arc/decode7.c
sim/arc/sem5-switch.c
sim/arc/sem6-switch.c
sim/arc/sem7-switch.c
sim/arc/sem5.c
sim/arc/sem6.c
sim/arc/sem7.c
sim/arc/cpu5.h
sim/arc/cpu6.h
sim/arc/cpu7.h
sim/arc/cpuall.h
sim/arc/cpu5.c
sim/arc/cpu6.c
sim/arc/cpu7.c
sim/arc/model5.c
sim/arc/model6.c
sim/arc/model7.c
sim/arc/traps.c
sim/common/ChangeLog.ARC
newlib/ChangeLog.ARC
newlib/libc/sys/arc/sys/fcntl.h
replaced files:
opcodes/arc-dis.c
opcodes/arc-opc.c
changed files:
bfd/configure
bfd/elf32-arc.c
bfd/libbfd.h
bfd/bfd-in2.h
cgen/ChangeLog
cgen/read.scm
cgen/sim-cpu.scm
cgen/utils-sim.scm
cgen/cpu/ip2k.opc
cgen/cpu/sparc.opc
cgen/cpu/xc16x.opc
cgen/cpu/fr30.opc
cgen/cpu/mep.opc
cgen/cpu/m32r.opc
cgen/cpu/i960.opc
cgen/cpu/sh.opc
cgen/cpu/iq2000.opc
cgen/cpu/openrisc.opc
cgen/cpu/xstormy16.opc
cgen/opc-itab.scm
cpu/ChangeLog
gas/config/tc-arc.c
gas/config/tc-arc.h
gas/configure
gas/Makefile.in
gas/doc/c-arc.texi
gas/as.c
gas/symbols.c
gas/symbols.h
gdb/ChangeLog
gdb/configure.tgt
include/ChangeLog
include/dis-asm.h
include/gdb/callback.h
include/gdb/ChangeLog
include/opcode/arc.h
include/opcode/cgen.h
ld/ChangeLog
ld/scripttempl/arclinux.sc
ld/scripttempl/elfarc.sc
ld/emulparams/arclinux.sh
ld/Makefile.am
ld/Makefile.in
libgloss/ChangeLog
opcodes/arc-dis.h
opcodes/arc-dis.c
opcodes/arc-ext.h
opcodes/arc-ext.c
opcodes/arc-opc.c
opcodes/ChangeLog
opcodes/configure
opcodes/configure.in
opcodes/Makefile.am
opcodes/Makefile.in
opcodes/cgen-dis.c
sim/ChangeLog
sim/configure.ac
sim/configure
sim/common/callback.c
sim/common/cgen-trace.c
sim/common/ChangeLog
sim/common/gennltvals.sh
sim/common/gentvals.sh
sim/common/nltvals.def
sim/common/sim-utils.c
sim/common/syscall.c

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@ -354,7 +354,6 @@ AR_FOR_TARGET=@AR_FOR_TARGET@
AS_FOR_TARGET=@AS_FOR_TARGET@
CC_FOR_TARGET=$(STAGE_CC_WRAPPER) @CC_FOR_TARGET@ $(FLAGS_FOR_TARGET)
# If GCC_FOR_TARGET is not overriden on the command line, then this
# variable is passed down to the gcc Makefile, where it is used to
# build libgcc2.a. We define it here so that it can itself be

146
README.arcgdb Executable file
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@ -0,0 +1,146 @@
Building gdb
============
You can build ARC GDB in two possible ways: one for debugging linux applications,
and one for debugging programs directly on the CPU using either the built-in simulator,
or the xISS (a fast instruction set simulator), or a JTAG connection to a hardware target.
arc-linux-uclibc-gdb
--------------------
You will need to build GDB as well as gdbserver.
For building GDB, do
$ ./configure --target=arc-linux-uclibc --prefix=/install/path
$ make
$ make install
(Where /install/path is a path to a directory where you want to install GDB.)
For building gdbserver:
You will need the arc-linux-uclibc-gcc toolchain. It should be in your path.
$ cd gdbserver
$ source ./build_gdbserver.sh
$ ./configure --host=i386-redhat-linux-gnu --target=arc-linux-uclibc --prefix=/install/path
$ make
$ make install
If you do not have the build_gdbserver.sh script, you will need these variables set in your
environment:
CFLAGS="-mA7 -static -O0"
LDFLAGS="-mA7"
CC=arc-linux-uclibc-gcc
You will find a gdbserver in your install path.
Copy it to an NFS share that is accessible from the board.
Please use the script at <SOURCE-DIR>/insight/src/build_gdbserver.sh for reference.
arc-elf32-gdb
-------------
Do
$ ./configure --target=arc-elf32 --prefix=/install/path \
--with-expat [ --with-libexpat-prefix=/expat/install/path ] \
[ --with-xiss --with-xiss-prefix=/xISS/install/path ]
$ make
$ make install
(Where /install/path is a path to a directory where you want to install GDB.)
You will need to have the expat library (available from http://www.libexpat.org) installed on your machine.
The `configure' script will search for this library in several standard locations; if it is installed in an
unusual path, you can use the `--with-libexpat-prefix' option to specify its location.
If you have the xISS (ARC Fast Instruction Set Simulator) installed, you may optionally build gdb to be able
to use it directly, by specifying the --with-xiss and --with-xiss-prefix options. In this case, the xISS
installation must have been built with the option "--enable-mdb" specified to the 'configure' script in
order that the required header files are located in the /xISS/install/path/include directory.
Running gdb
===========
XISS
----
If you have built arc-elf32-gdb to be able to use the xISS directly, you will need to set the environment
variable XISS_HOME to identify the /xISS/install/path directory in order to be able to use the gdb
'target arcxiss' command.
XISS instruction address trace file
-----------------------------------
arc-elf32-gdb may be used in conjection with the xISS to trace instruction execution; it may create a file
containing the address of each instruction executed, in the order in which they were executed. This file
contains the data in a compressed encoding which results in a saving of about 80% of the uncompressed data
size. See the ARC gdb 'Getting Started' manual for more information.
Auxiliary registers XML file
----------------------------
When using gdb, you will need to provide it with a file which describes the auxiliary registers of the target
(e.g. ARCAngel 4, simulator) upon which you are debugging.
By default, gdb will look for a file named 'arc-registers.xml'; it will look first in your current working
directory, and then in your home directory. Alternatively, a file may be specified by means of the
'arc-reg-read-file' command.
It is also possible to add new descriptions using the 'arc-reg-read-extra-file' command, thus allowing
processor variants to be described by sets of common files and variant-specific files.
Files containing descriptions for the ARC700, ARC600 and A5 variants of the ARC processor architecture are
provided at
gdb/features/arc700-cpu.xml
gdb/features/arc600-cpu.xml
gdb/features/arc-a5-cpu.xml
It is suggested that you copy the appropriate file for your target architecture to your home or working directory,
and rename it to 'arc-registers.xml'.
It is simple to define a new target description; the XML schema for the description is defined in the
file
gdb/features/arc-registers.dtd
In essence, a target description consists of a set of register descriptions. Each register description has
these attributes:
name : the register name (case-insensitive); may be 'unused'
description : an (optional) textual description of the register's function
number : the number of the register in the auxiliary register set (e.g. 0x0A for STATUS32)
mask : a 32-bit mask which defines which bits of the register are valid (0xFFFFFFFF by default)
access : the register's read/write access: R/O, R/W or W/O (R/W by default)
Each register description may also have a set of field descriptions. Each field description has
these attributes:
name : the field name (case-insensitive); may be 'reserved'
description : an (optional) textual description of the field's function
onwrite : the (optional) value (for a reserved field) which must be supplied on a write operation
offset : the offset in bits of the field from the least significant bit (0) of the register
size : the size of the field in bits
access : the field's read/write access: R/O, R/W or W/O (the register's access by default)
Each field description may also have a set of field meanings. Each field meaning has these attributes:
value : a value that the field may contain
description : a textual explanation of the meaning of the field when it contains that value
There may also be a set of Build Configuration Registers (BCRs). The descriptions of these registers do
not have an access attribute; and, although a BCR may have a number of fields (which do not have access
or onwrite attributes), these fields do not have field meanings.
It is also possible to include definitions of Extension Core Registers: the descriptions of these have
merely the register number (which must be between 32 and 59 inclusive), and mask and access attributes.

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@ -210,7 +210,6 @@ typedef struct disassemble_info
typedef int (*disassembler_ftype) (bfd_vma, disassemble_info *);
extern int print_insn_alpha (bfd_vma, disassemble_info *);
extern int print_insn_arc (bfd_vma, disassemble_info *);
extern int print_insn_avr (bfd_vma, disassemble_info *);
extern int print_insn_bfin (bfd_vma, disassemble_info *);
extern int print_insn_big_arm (bfd_vma, disassemble_info *);
@ -284,7 +283,7 @@ extern int print_insn_z80 (bfd_vma, disassemble_info *);
extern int print_insn_z8001 (bfd_vma, disassemble_info *);
extern int print_insn_z8002 (bfd_vma, disassemble_info *);
extern disassembler_ftype arc_get_disassembler (bfd *);
extern disassembler_ftype arc_get_disassembler (void *);
extern disassembler_ftype cris_get_disassembler (bfd *);
extern void print_i386_disassembler_options (FILE *);

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@ -757,9 +757,7 @@ enum dwarf_call_frame_info
/* GNU extensions. */
DW_CFA_GNU_window_save = 0x2d,
DW_CFA_GNU_args_size = 0x2e,
DW_CFA_GNU_negative_offset_extended = 0x2f,
/* Metaware High C compiler extensions. */
DW_CFA_MWARC_info = 0x34
DW_CFA_GNU_negative_offset_extended = 0x2f
};
#define DW_CIE_ID 0xffffffff

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@ -320,14 +320,6 @@ int cb_is_stdin PARAMS ((host_callback *, int));
int cb_is_stdout PARAMS ((host_callback *, int));
int cb_is_stderr PARAMS ((host_callback *, int));
/* Utility of cb_syscall to fetch a path name.
The buffer is malloc'd and the address is stored in BUFP.
The result is that of get_string, but prepended with
simulator_sysroot if the string starts with '/'.
If an error occurs, no buffer is left malloc'd. */
#define TADDR unsigned long
int get_path PARAMS ((host_callback *, CB_SYSCALL *, TADDR, char **));
/* Perform a system call. */
CB_RC cb_syscall PARAMS ((host_callback *, CB_SYSCALL *));

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@ -174,8 +174,8 @@ struct arc_operand_value {
struct arc_ext_operand_value {
struct arc_ext_operand_value *next;
struct arc_operand_value operand;
};
struct arc_operand_value operand;
} *arc_ext_operands;
/* List of extension condition codes, core registers and auxiliary registers.
Calls to gas/config/tc-arc.c:arc_extoper built up this list. */
@ -357,14 +357,24 @@ struct arc_operand {
const struct arc_operand_value **opval, int *invalid);
};
enum
enum
{
BR_exec_when_no_jump,
BR_exec_always,
BR_exec_when_jump
};
enum ARC_Debugger_OperandType
{
ARC_UNDEFINED,
ARC_LIMM,
ARC_SHIMM,
ARC_REGISTER,
ARCOMPACT_REGISTER /* Valid only for the
registers allowed in
16 bit mode */
};
enum Flow
enum Flow
{
noflow,
direct_jump,
@ -377,7 +387,7 @@ enum Flow
enum { no_reg = 99 };
enum { allOperandsSize = 256 };
struct arcDisState
struct arcDisState
{
void *_this;
int instructionLen;
@ -386,7 +396,7 @@ struct arcDisState
const char *(*auxRegName)(void*, int);
const char *(*condCodeName)(void*, int);
const char *(*instName)(void*, int, int, int*);
unsigned char* instruction;
unsigned index;
const char *comm[6]; /* instr name, cond, NOP, 3 operands */
@ -462,8 +472,6 @@ extern const struct arc_operand arc_operands_a4[];
extern const struct arc_operand arc_operands_ac[];
extern const struct arc_operand *arc_operands;
extern int arc_operand_count;
extern /*const*/ struct arc_opcode arc_opcodes[];
extern const int arc_opcodes_count;
extern const struct arc_operand_value arc_suffixes_a4[];
extern const struct arc_operand_value arc_suffixes_ac[];
extern const struct arc_operand_value *arc_suffixes;