This commit was manufactured by cvs2svn to create branch

'cagney_regbuf-20020515-branch'.

Sprout from jimb-macro-020506-branch 2002-05-05 18:58:18 UTC cvs2svn 'This commit was manufactured by cvs2svn to create branch 'jimb-'
Cherrypick from master 2002-06-12 21:19:42 UTC Andrew Cagney <cagney@gnu.org> 'Add the file include/gdb/sim-arm.h defining an enum that specifies the':
    include/elf/dlx.h
    include/elf/vax.h
    include/gdb/callback.h
    include/gdb/remote-sim.h
    include/gdb/signals.h
    include/gdb/sim-arm.h
    include/gdb/sim-d10v.h
    include/gdb/sim-sh.h
    include/opcode/dlx.h
Cherrypick from master 2002-05-10 22:53:56 UTC Elena Zannoni <ezannoni@redhat.com> '2002-05-10  Elena Zannoni  <ezannoni@redhat.com>':
    ChangeLog
    Makefile.in
    include/elf/ChangeLog
    include/elf/common.h
    include/gdb/ChangeLog
This commit is contained in:
cvs2svn 2002-06-12 21:19:43 +00:00
parent 2226614012
commit a5ef022674
14 changed files with 1326 additions and 12 deletions

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@ -1,3 +1,11 @@
2002-05-07 Jeff Johnston <jjohnstn@redhat.com>
* COPYING.LIBGLOSS: New file.
2002-05-07 Federico G. Schwindt <fgsch@olimpo.com.br>
* Makefile.in: Honour DESTDIR.
2002-05-05 Alexandre Oliva <aoliva@redhat.com>
* configure.in (noconfigdirs): Don't disable libgcj on

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@ -1826,8 +1826,8 @@ install-sid: install-tcl install-tk
### other supporting targets
MAKEDIRS= \
$(prefix) \
$(exec_prefix)
$(DESTDIR)$(prefix) \
$(DESTDIR)$(exec_prefix)
.PHONY: installdirs
installdirs: mkinstalldirs
$(SHELL) $(srcdir)/mkinstalldirs $(MAKEDIRS)

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@ -1,3 +1,12 @@
2002-05-08 Jason Thorpe <thorpej@wasabisystems.com>
* common.h (NT_GNU_ABI_TAG): Define.
(GNU_ABI_TAG_LINUX): Define.
(GNU_ABI_TAG_HURD): Define.
(GNU_ABI_TAG_SOLARIS): Define.
(NT_NETBSD_IDENT): Define.
(NT_FREEBSD_ABI_TAG): Define.
2002-04-24 Elena Zannoni <ezannoni@redhat.com>
* dwarf2.h: Add DW_AT_GNU_vector.

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@ -358,6 +358,21 @@ Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
#define NT_VERSION 1 /* Contains a version string. */
#define NT_ARCH 2 /* Contains an architecture string. */
/* Values for GNU .note.ABI-tag notes. Note name is "GNU". */
#define NT_GNU_ABI_TAG 1
#define GNU_ABI_TAG_LINUX 0
#define GNU_ABI_TAG_HURD 1
#define GNU_ABI_TAG_SOLARIS 2
/* Values for NetBSD .note.netbsd.ident notes. Note name is "NetBSD". */
#define NT_NETBSD_IDENT 1
/* Values for FreeBSD .note.ABI-tag notes. Note name is "FreeBSD". */
#define NT_FREEBSD_ABI_TAG 1
/* These three macros disassemble and assemble a symbol table st_info field,
which contains the symbol binding and symbol type. The STB_ and STT_
defines identify the binding and type. */

53
include/elf/dlx.h Normal file
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/* DLX support for BFD.
Copyright 2002 Free Software Foundation, Inc.
This file is part of BFD, the Binary File Descriptor library.
This program is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 2 of the License, or
(at your option) any later version.
This program is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with this program; if not, write to the Free Software Foundation,
Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
#ifndef _ELF_DLX_H
#define _ELF_DLX_H
#include "elf/reloc-macros.h"
#if 0
START_RELOC_NUMBERS (elf_dlx_reloc_type)
RELOC_NUMBER (R_DLX_NONE, 0)
RELOC_NUMBER (R_DLX_RELOC_16, 1)
RELOC_NUMBER (R_DLX_RELOC_26, 2)
RELOC_NUMBER (R_DLX_RELOC_32, 3)
RELOC_NUMBER (R_DLX_GNU_VTINHERIT, 4)
RELOC_NUMBER (R_DLX_GNU_VTENTRY, 5)
RELOC_NUMBER (R_DLX_RELOC_16_HI, 6)
RELOC_NUMBER (R_DLX_RELOC_16_LO, 7)
RELOC_NUMBER (R_DLX_RELOC_16_PCREL, 8)
RELOC_NUMBER (R_DLX_RELOC_26_PCREL, 9)
END_RELOC_NUMBERS (R_DLX_max)
#else
START_RELOC_NUMBERS (elf_dlx_reloc_type)
RELOC_NUMBER (R_DLX_NONE, 0)
RELOC_NUMBER (R_DLX_RELOC_8, 1)
RELOC_NUMBER (R_DLX_RELOC_16, 2)
RELOC_NUMBER (R_DLX_RELOC_32, 3)
RELOC_NUMBER (R_DLX_GNU_VTINHERIT, 4)
RELOC_NUMBER (R_DLX_GNU_VTENTRY, 5)
RELOC_NUMBER (R_DLX_RELOC_16_HI, 6)
RELOC_NUMBER (R_DLX_RELOC_16_LO, 7)
RELOC_NUMBER (R_DLX_RELOC_16_PCREL, 8)
RELOC_NUMBER (R_DLX_RELOC_26_PCREL, 9)
END_RELOC_NUMBERS (R_DLX_max)
#endif /* 0 */
#endif /* _ELF_DLX_H */

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include/elf/vax.h Normal file
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/* VAX ELF support for BFD.
Copyright (C) 2002 Free Software Foundation, Inc.
Contributed by Matt Thomas <matt@3am-software.com>.
This file is part of BFD, the Binary File Descriptor library.
This program is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 2 of the License, or
(at your option) any later version.
This program is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with this program; if not, write to the Free Software Foundation,
Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
#ifndef _ELF_VAX_H
#define _ELF_VAX_H
#include "elf/reloc-macros.h"
/* Relocation types. */
START_RELOC_NUMBERS (elf_vax_reloc_type)
RELOC_NUMBER (R_VAX_NONE, 0) /* No reloc */
RELOC_NUMBER (R_VAX_32, 1) /* Direct 32 bit */
RELOC_NUMBER (R_VAX_16, 2) /* Direct 16 bit */
RELOC_NUMBER (R_VAX_8, 3) /* Direct 8 bit */
RELOC_NUMBER (R_VAX_PC32, 4) /* PC relative 32 bit */
RELOC_NUMBER (R_VAX_PC16, 5) /* PC relative 16 bit */
RELOC_NUMBER (R_VAX_PC8, 6) /* PC relative 8 bit */
RELOC_NUMBER (R_VAX_GOT32, 7) /* 32 bit PC relative GOT entry */
RELOC_NUMBER (R_VAX_PLT32, 13) /* 32 bit PC relative PLT address */
RELOC_NUMBER (R_VAX_COPY, 19) /* Copy symbol at runtime */
RELOC_NUMBER (R_VAX_GLOB_DAT, 20) /* Create GOT entry */
RELOC_NUMBER (R_VAX_JMP_SLOT, 21) /* Create PLT entry */
RELOC_NUMBER (R_VAX_RELATIVE, 22) /* Adjust by program base */
/* These are GNU extensions to enable C++ vtable garbage collection. */
RELOC_NUMBER (R_VAX_GNU_VTINHERIT, 23)
RELOC_NUMBER (R_VAX_GNU_VTENTRY, 24)
END_RELOC_NUMBERS (R_VAX_max)
/* Processor specific flags for the ELF header e_flags field. */
#define EF_NONPIC 0x0001 /* Object contains non-PIC code */
#define EF_DFLOAT 0x0100 /* Object contains D-Float insn. */
#define EF_GFLOAT 0x0200 /* Object contains G-Float insn. */
#endif

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@ -1,3 +1,13 @@
2002-05-10 Elena Zannoni <ezannoni@redhat.com>
* sim-sh.h: New file, for sh gdb<->sim interface.
2002-05-09 Daniel Jacobowitz <drow@mvista.com>
* signals.h: Update comments.
(enum target_signal): Remove conditional compilation around
Mach-specific signals. Move them to after TARGET_SIGNAL_DEFAULT.
2002-03-10 Daniel Jacobowitz <drow@mvista.com>
* signals.h: New file, from gdb/defs.h.

270
include/gdb/callback.h Normal file
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/* Remote target system call callback support.
Copyright 1997 Free Software Foundation, Inc.
Contributed by Cygnus Solutions.
This file is part of GDB.
This program is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 2 of the License, or
(at your option) any later version.
This program is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with this program; if not, write to the Free Software
Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
/* This interface isn't intended to be specific to any particular kind
of remote (hardware, simulator, whatever). As such, support for it
(e.g. sim/common/callback.c) should *not* live in the simulator source
tree, nor should it live in the gdb source tree. */
/* There are various ways to handle system calls:
1) Have a simulator intercept the appropriate trap instruction and
directly perform the system call on behalf of the target program.
This is the typical way of handling system calls for embedded targets.
[Handling system calls for embedded targets isn't that much of an
oxymoron as running compiler testsuites make use of the capability.]
This method of system call handling is done when STATE_ENVIRONMENT
is ENVIRONMENT_USER.
2) Have a simulator emulate the hardware as much as possible.
If the program running on the real hardware communicates with some sort
of target manager, one would want to be able to run this program on the
simulator as well.
This method of system call handling is done when STATE_ENVIRONMENT
is ENVIRONMENT_OPERATING.
*/
#ifndef CALLBACK_H
#define CALLBACK_H
/* ??? The reason why we check for va_start here should be documented. */
#ifndef va_start
#include <ansidecl.h>
#ifdef ANSI_PROTOTYPES
#include <stdarg.h>
#else
#include <varargs.h>
#endif
#endif
/* Mapping of host/target values. */
/* ??? For debugging purposes, one might want to add a string of the
name of the symbol. */
typedef struct {
int host_val;
int target_val;
} CB_TARGET_DEFS_MAP;
#define MAX_CALLBACK_FDS 10
/* Forward decl for stat/fstat. */
struct stat;
typedef struct host_callback_struct host_callback;
struct host_callback_struct
{
int (*close) PARAMS ((host_callback *,int));
int (*get_errno) PARAMS ((host_callback *));
int (*isatty) PARAMS ((host_callback *, int));
int (*lseek) PARAMS ((host_callback *, int, long , int));
int (*open) PARAMS ((host_callback *, const char*, int mode));
int (*read) PARAMS ((host_callback *,int, char *, int));
int (*read_stdin) PARAMS (( host_callback *, char *, int));
int (*rename) PARAMS ((host_callback *, const char *, const char *));
int (*system) PARAMS ((host_callback *, const char *));
long (*time) PARAMS ((host_callback *, long *));
int (*unlink) PARAMS ((host_callback *, const char *));
int (*write) PARAMS ((host_callback *,int, const char *, int));
int (*write_stdout) PARAMS ((host_callback *, const char *, int));
void (*flush_stdout) PARAMS ((host_callback *));
int (*write_stderr) PARAMS ((host_callback *, const char *, int));
void (*flush_stderr) PARAMS ((host_callback *));
int (*stat) PARAMS ((host_callback *, const char *, struct stat *));
int (*fstat) PARAMS ((host_callback *, int, struct stat *));
/* When present, call to the client to give it the oportunity to
poll any io devices for a request to quit (indicated by a nonzero
return value). */
int (*poll_quit) PARAMS ((host_callback *));
/* Used when the target has gone away, so we can close open
handles and free memory etc etc. */
int (*shutdown) PARAMS ((host_callback *));
int (*init) PARAMS ((host_callback *));
/* depreciated, use vprintf_filtered - Talk to the user on a console. */
void (*printf_filtered) PARAMS ((host_callback *, const char *, ...));
/* Talk to the user on a console. */
void (*vprintf_filtered) PARAMS ((host_callback *, const char *, va_list));
/* Same as vprintf_filtered but to stderr. */
void (*evprintf_filtered) PARAMS ((host_callback *, const char *, va_list));
/* Print an error message and "exit".
In the case of gdb "exiting" means doing a longjmp back to the main
command loop. */
void (*error) PARAMS ((host_callback *, const char *, ...));
int last_errno; /* host format */
int fdmap[MAX_CALLBACK_FDS];
char fdopen[MAX_CALLBACK_FDS];
char alwaysopen[MAX_CALLBACK_FDS];
/* System call numbers. */
CB_TARGET_DEFS_MAP *syscall_map;
/* Errno values. */
CB_TARGET_DEFS_MAP *errno_map;
/* Flags to the open system call. */
CB_TARGET_DEFS_MAP *open_map;
/* Signal numbers. */
CB_TARGET_DEFS_MAP *signal_map;
/* Layout of `stat' struct.
The format is a series of "name,length" pairs separated by colons.
Empty space is indicated with a `name' of "space".
All padding must be explicitly mentioned.
Lengths are in bytes. If this needs to be extended to bits,
use "name.bits".
Example: "st_dev,4:st_ino,4:st_mode,4:..." */
const char *stat_map;
/* Marker for those wanting to do sanity checks.
This should remain the last member of this struct to help catch
miscompilation errors. */
#define HOST_CALLBACK_MAGIC 4705 /* teds constant */
int magic;
};
extern host_callback default_callback;
/* Canonical versions of system call numbers.
It's not intended to willy-nilly throw every system call ever heard
of in here. Only include those that have an important use.
??? One can certainly start a discussion over the ones that are currently
here, but that will always be true. */
/* These are used by the ANSI C support of libc. */
#define CB_SYS_exit 1
#define CB_SYS_open 2
#define CB_SYS_close 3
#define CB_SYS_read 4
#define CB_SYS_write 5
#define CB_SYS_lseek 6
#define CB_SYS_unlink 7
#define CB_SYS_getpid 8
#define CB_SYS_kill 9
#define CB_SYS_fstat 10
/*#define CB_SYS_sbrk 11 - not currently a system call, but reserved. */
/* ARGV support. */
#define CB_SYS_argvlen 12
#define CB_SYS_argv 13
/* These are extras added for one reason or another. */
#define CB_SYS_chdir 14
#define CB_SYS_stat 15
#define CB_SYS_chmod 16
#define CB_SYS_utime 17
#define CB_SYS_time 18
/* Struct use to pass and return information necessary to perform a
system call. */
/* FIXME: Need to consider target word size. */
typedef struct cb_syscall {
/* The target's value of what system call to perform. */
int func;
/* The arguments to the syscall. */
long arg1, arg2, arg3, arg4;
/* The result. */
long result;
/* Some system calls have two results. */
long result2;
/* The target's errno value, or 0 if success.
This is converted to the target's value with host_to_target_errno. */
int errcode;
/* Working space to be used by memory read/write callbacks. */
PTR p1;
PTR p2;
long x1,x2;
/* Callbacks for reading/writing memory (e.g. for read/write syscalls).
??? long or unsigned long might be better to use for the `count'
argument here. We mimic sim_{read,write} for now. Be careful to
test any changes with -Wall -Werror, mixed signed comparisons
will get you. */
int (*read_mem) PARAMS ((host_callback * /*cb*/, struct cb_syscall * /*sc*/,
unsigned long /*taddr*/, char * /*buf*/,
int /*bytes*/));
int (*write_mem) PARAMS ((host_callback * /*cb*/, struct cb_syscall * /*sc*/,
unsigned long /*taddr*/, const char * /*buf*/,
int /*bytes*/));
/* For sanity checking, should be last entry. */
int magic;
} CB_SYSCALL;
/* Magic number sanity checker. */
#define CB_SYSCALL_MAGIC 0x12344321
/* Macro to initialize CB_SYSCALL. Called first, before filling in
any fields. */
#define CB_SYSCALL_INIT(sc) \
do { \
memset ((sc), 0, sizeof (*(sc))); \
(sc)->magic = CB_SYSCALL_MAGIC; \
} while (0)
/* Return codes for various interface routines. */
typedef enum {
CB_RC_OK = 0,
/* generic error */
CB_RC_ERR,
/* either file not found or no read access */
CB_RC_ACCESS,
CB_RC_NO_MEM
} CB_RC;
/* Read in target values for system call numbers, errno values, signals. */
CB_RC cb_read_target_syscall_maps PARAMS ((host_callback *, const char *));
/* Translate target to host syscall function numbers. */
int cb_target_to_host_syscall PARAMS ((host_callback *, int));
/* Translate host to target errno value. */
int cb_host_to_target_errno PARAMS ((host_callback *, int));
/* Translate target to host open flags. */
int cb_target_to_host_open PARAMS ((host_callback *, int));
/* Translate target signal number to host. */
int cb_target_to_host_signal PARAMS ((host_callback *, int));
/* Translate host signal number to target. */
int cb_host_to_target_signal PARAMS ((host_callback *, int));
/* Translate host stat struct to target.
If stat struct ptr is NULL, just compute target stat struct size.
Result is size of target stat struct or 0 if error. */
int cb_host_to_target_stat PARAMS ((host_callback *, const struct stat *, PTR));
/* Perform a system call. */
CB_RC cb_syscall PARAMS ((host_callback *, CB_SYSCALL *));
#endif

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/* This file defines the interface between the simulator and gdb.
Copyright 1993, 1994, 1996, 1997, 1998, 2000
Free Software Foundation, Inc.
This file is part of GDB.
This program is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 2 of the License, or
(at your option) any later version.
This program is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with this program; if not, write to the Free Software
Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
#if !defined (REMOTE_SIM_H)
#define REMOTE_SIM_H 1
#ifdef __cplusplus
extern "C" {
#endif
/* This file is used when building stand-alone simulators, so isolate this
file from gdb. */
/* Pick up CORE_ADDR_TYPE if defined (from gdb), otherwise use same value as
gdb does (unsigned int - from defs.h). */
#ifndef CORE_ADDR_TYPE
typedef unsigned int SIM_ADDR;
#else
typedef CORE_ADDR_TYPE SIM_ADDR;
#endif
/* Semi-opaque type used as result of sim_open and passed back to all
other routines. "desc" is short for "descriptor".
It is up to each simulator to define `sim_state'. */
typedef struct sim_state *SIM_DESC;
/* Values for `kind' arg to sim_open. */
typedef enum {
SIM_OPEN_STANDALONE, /* simulator used standalone (run.c) */
SIM_OPEN_DEBUG /* simulator used by debugger (gdb) */
} SIM_OPEN_KIND;
/* Return codes from various functions. */
typedef enum {
SIM_RC_FAIL = 0,
SIM_RC_OK = 1,
SIM_RC_UNKNOWN_BREAKPOINT = 2,
SIM_RC_INSUFFICIENT_RESOURCES = 3,
SIM_RC_DUPLICATE_BREAKPOINT = 4
} SIM_RC;
/* The bfd struct, as an opaque type. */
struct _bfd;
/* Main simulator entry points. */
/* Create a fully initialized simulator instance.
(This function is called when the simulator is selected from the
gdb command line.)
KIND specifies how the simulator shall be used. Currently there
are only two kinds: stand-alone and debug.
CALLBACK specifies a standard host callback (defined in callback.h).
ABFD, when non NULL, designates a target program. The program is
not loaded.
ARGV is a standard ARGV pointer such as that passed from the
command line. The syntax of the argument list is is assumed to be
``SIM-PROG { SIM-OPTION } [ TARGET-PROGRAM { TARGET-OPTION } ]''.
The trailing TARGET-PROGRAM and args are only valid for a
stand-alone simulator.
On success, the result is a non NULL descriptor that shall be
passed to the other sim_foo functions. While the simulator
configuration can be parameterized by (in decreasing precedence)
ARGV's SIM-OPTION, ARGV's TARGET-PROGRAM and the ABFD argument, the
successful creation of the simulator shall not dependent on the
presence of any of these arguments/options.
Hardware simulator: The created simulator shall be sufficiently
initialized to handle, with out restrictions any client requests
(including memory reads/writes, register fetch/stores and a
resume).
Process simulator: that process is not created until a call to
sim_create_inferior. FIXME: What should the state of the simulator
be? */
SIM_DESC sim_open PARAMS ((SIM_OPEN_KIND kind, struct host_callback_struct *callback, struct _bfd *abfd, char **argv));
/* Destory a simulator instance.
QUITTING is non-zero if we cannot hang on errors.
This may involve freeing target memory and closing any open files
and mmap'd areas. You cannot assume sim_kill has already been
called. */
void sim_close PARAMS ((SIM_DESC sd, int quitting));
/* Load program PROG into the simulators memory.
If ABFD is non-NULL, the bfd for the file has already been opened.
The result is a return code indicating success.
Hardware simulator: Normally, each program section is written into
memory according to that sections LMA using physical (direct)
addressing. The exception being systems, such as PPC/CHRP, which
support more complicated program loaders. A call to this function
should not effect the state of the processor registers. Multiple
calls to this function are permitted and have an accumulative
effect.
Process simulator: Calls to this function may be ignored.
FIXME: Most hardware simulators load the image at the VMA using
virtual addressing.
FIXME: For some hardware targets, before a loaded program can be
executed, it requires the manipulation of VM registers and tables.
Such manipulation should probably (?) occure in
sim_create_inferior. */
SIM_RC sim_load PARAMS ((SIM_DESC sd, char *prog, struct _bfd *abfd, int from_tty));
/* Prepare to run the simulated program.
ABFD, if not NULL, provides initial processor state information.
ARGV and ENV, if non NULL, are NULL terminated lists of pointers.
Hardware simulator: This function shall initialize the processor
registers to a known value. The program counter and possibly stack
pointer shall be set using information obtained from ABFD (or
hardware reset defaults). ARGV and ENV, dependant on the target
ABI, may be written to memory.
Process simulator: After a call to this function, a new process
instance shall exist. The TEXT, DATA, BSS and stack regions shall
all be initialized, ARGV and ENV shall be written to process
address space (according to the applicable ABI) and the program
counter and stack pointer set accordingly. */
SIM_RC sim_create_inferior PARAMS ((SIM_DESC sd, struct _bfd *abfd, char **argv, char **env));
/* Fetch LENGTH bytes of the simulated program's memory. Start fetch
at virtual address MEM and store in BUF. Result is number of bytes
read, or zero if error. */
int sim_read PARAMS ((SIM_DESC sd, SIM_ADDR mem, unsigned char *buf, int length));
/* Store LENGTH bytes from BUF into the simulated program's
memory. Store bytes starting at virtual address MEM. Result is
number of bytes write, or zero if error. */
int sim_write PARAMS ((SIM_DESC sd, SIM_ADDR mem, unsigned char *buf, int length));
/* Fetch register REGNO storing its raw (target endian) value in the
LENGTH byte buffer BUF. Return the actual size of the register or
zero if REGNO is not applicable.
Legacy implementations ignore LENGTH and always return -1.
If LENGTH does not match the size of REGNO no data is transfered
(the actual register size is still returned). */
int sim_fetch_register PARAMS ((SIM_DESC sd, int regno, unsigned char *buf, int length));
/* Store register REGNO from the raw (target endian) value in BUF.
Return the actual size of the register or zero if REGNO is not
applicable.
Legacy implementations ignore LENGTH and always return -1.
If LENGTH does not match the size of REGNO no data is transfered
(the actual register size is still returned). */
int sim_store_register PARAMS ((SIM_DESC sd, int regno, unsigned char *buf, int length));
/* Print whatever statistics the simulator has collected.
VERBOSE is currently unused and must always be zero. */
void sim_info PARAMS ((SIM_DESC sd, int verbose));
/* Run (or resume) the simulated program.
STEP, when non-zero indicates that only a single simulator cycle
should be emulated.
SIGGNAL, if non-zero is a (HOST) SIGRC value indicating the type of
event (hardware interrupt, signal) to be delivered to the simulated
program.
Hardware simulator: If the SIGRC value returned by
sim_stop_reason() is passed back to the simulator via SIGGNAL then
the hardware simulator shall correctly deliver the hardware event
indicated by that signal. If a value of zero is passed in then the
simulation will continue as if there were no outstanding signal.
The effect of any other SIGGNAL value is is implementation
dependant.
Process simulator: If SIGRC is non-zero then the corresponding
signal is delivered to the simulated program and execution is then
continued. A zero SIGRC value indicates that the program should
continue as normal. */
void sim_resume PARAMS ((SIM_DESC sd, int step, int siggnal));
/* Asynchronous request to stop the simulation.
A nonzero return indicates that the simulator is able to handle
the request */
int sim_stop PARAMS ((SIM_DESC sd));
/* Fetch the REASON why the program stopped.
SIM_EXITED: The program has terminated. SIGRC indicates the target
dependant exit status.
SIM_STOPPED: The program has stopped. SIGRC uses the host's signal
numbering as a way of identifying the reaon: program interrupted by
user via a sim_stop request (SIGINT); a breakpoint instruction
(SIGTRAP); a completed single step (SIGTRAP); an internal error
condition (SIGABRT); an illegal instruction (SIGILL); Access to an
undefined memory region (SIGSEGV); Mis-aligned memory access
(SIGBUS). For some signals information in addition to the signal
number may be retained by the simulator (e.g. offending address),
that information is not directly accessable via this interface.
SIM_SIGNALLED: The program has been terminated by a signal. The
simulator has encountered target code that causes the the program
to exit with signal SIGRC.
SIM_RUNNING, SIM_POLLING: The return of one of these values
indicates a problem internal to the simulator. */
enum sim_stop { sim_running, sim_polling, sim_exited, sim_stopped, sim_signalled };
void sim_stop_reason PARAMS ((SIM_DESC sd, enum sim_stop *reason, int *sigrc));
/* Passthru for other commands that the simulator might support.
Simulators should be prepared to deal with any combination of NULL
or empty CMD. */
void sim_do_command PARAMS ((SIM_DESC sd, char *cmd));
/* Call these functions to set and clear breakpoints at ADDR. */
SIM_RC sim_set_breakpoint PARAMS ((SIM_DESC sd, SIM_ADDR addr));
SIM_RC sim_clear_breakpoint PARAMS ((SIM_DESC sd, SIM_ADDR addr));
SIM_RC sim_clear_all_breakpoints PARAMS ((SIM_DESC sd));
/* These functions are used to enable and disable breakpoints. */
SIM_RC sim_enable_breakpoint PARAMS ((SIM_DESC sd, SIM_ADDR addr));
SIM_RC sim_disable_breakpoint PARAMS ((SIM_DESC sd, SIM_ADDR addr));
SIM_RC sim_enable_all_breakpoints PARAMS ((SIM_DESC sd));
SIM_RC sim_disable_all_breakpoints PARAMS ((SIM_DESC sd));
/* Provide simulator with a default (global) host_callback_struct.
THIS PROCEDURE IS DEPRECIATED.
GDB and NRUN do not use this interface.
This procedure does not take a SIM_DESC argument as it is
used before sim_open. */
void sim_set_callbacks PARAMS ((struct host_callback_struct *));
/* Set the size of the simulator memory array.
THIS PROCEDURE IS DEPRECIATED.
GDB and NRUN do not use this interface.
This procedure does not take a SIM_DESC argument as it is
used before sim_open. */
void sim_size PARAMS ((int i));
/* Single-step simulator with tracing enabled.
THIS PROCEDURE IS DEPRECIATED.
THIS PROCEDURE IS EVEN MORE DEPRECATED THAN SIM_SET_TRACE
GDB and NRUN do not use this interface.
This procedure returns: ``0'' indicating that the simulator should
be continued using sim_trace() calls; ``1'' indicating that the
simulation has finished. */
int sim_trace PARAMS ((SIM_DESC sd));
/* Enable tracing.
THIS PROCEDURE IS DEPRECIATED.
GDB and NRUN do not use this interface.
This procedure returns: ``0'' indicating that the simulator should
be continued using sim_trace() calls; ``1'' indicating that the
simulation has finished. */
void sim_set_trace PARAMS ((void));
/* Configure the size of the profile buffer.
THIS PROCEDURE IS DEPRECIATED.
GDB and NRUN do not use this interface.
This procedure does not take a SIM_DESC argument as it is
used before sim_open. */
void sim_set_profile_size PARAMS ((int n));
/* Kill the running program.
THIS PROCEDURE IS DEPRECIATED.
GDB and NRUN do not use this interface.
This procedure will be replaced as part of the introduction of
multi-cpu simulators. */
void sim_kill PARAMS ((SIM_DESC sd));
#ifdef __cplusplus
}
#endif
#endif /* !defined (REMOTE_SIM_H) */

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@ -32,7 +32,8 @@
Since these numbers have actually made it out into other software
(stubs, etc.), you mustn't disturb the assigned numbering. If you
need to add new signals here, add them to the end of the explicitly
numbered signals.
numbered signals, at the comment marker. Add them unconditionally,
not within any #if or #ifdef.
This is based strongly on Unix/POSIX signals for several reasons:
(1) This set of signals represents a widely-accepted attempt to
@ -208,15 +209,6 @@ enum target_signal
TARGET_SIGNAL_REALTIME_126,
TARGET_SIGNAL_REALTIME_127,
#if defined(MACH) || defined(__MACH__)
/* Mach exceptions */
TARGET_EXC_BAD_ACCESS,
TARGET_EXC_BAD_INSTRUCTION,
TARGET_EXC_ARITHMETIC,
TARGET_EXC_EMULATION,
TARGET_EXC_SOFTWARE,
TARGET_EXC_BREAKPOINT,
#endif
TARGET_SIGNAL_INFO,
/* Some signal we don't know about. */
@ -226,6 +218,18 @@ enum target_signal
(for passing to proceed and so on). */
TARGET_SIGNAL_DEFAULT,
/* Mach exceptions. In versions of GDB before 5.2, these were just before
TARGET_SIGNAL_INFO if you were compiling on a Mach host (and missing
otherwise). */
TARGET_EXC_BAD_ACCESS,
TARGET_EXC_BAD_INSTRUCTION,
TARGET_EXC_ARITHMETIC,
TARGET_EXC_EMULATION,
TARGET_EXC_SOFTWARE,
TARGET_EXC_BREAKPOINT,
/* If you are adding a new signal, add it just above this comment. */
/* Last and unused enum value, for sizing arrays, etc. */
TARGET_SIGNAL_LAST
};

65
include/gdb/sim-arm.h Normal file
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@ -0,0 +1,65 @@
/* This file defines the interface between the Arm simulator and GDB.
Copyright 2002 Free Software Foundation, Inc.
Contributed by Red Hat.
This file is part of GDB.
This program is free software; you can redistribute it and/or
modify it under the terms of the GNU General Public License as
published by the Free Software Foundation; either version 2 of the
License, or (at your option) any later version.
This program is distributed in the hope that it will be useful, but
WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
General Public License for more details.
You should have received a copy of the GNU General Public License
along with this program; if not, write to the Free Software
Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
02111-1307, USA. */
#if !defined (SIM_ARM_H)
#define SIM_ARM_H
#ifdef __cplusplus
extern "C" { // }
#endif
enum sim_arm_regnum
{
SIM_ARM_R0_REGNUM,
SIM_ARM_R1_REGNUM,
SIM_ARM_R2_REGNUM,
SIM_ARM_R3_REGNUM,
SIM_ARM_R4_REGNUM,
SIM_ARM_R5_REGNUM,
SIM_ARM_R6_REGNUM,
SIM_ARM_R7_REGNUM,
SIM_ARM_R8_REGNUM,
SIM_ARM_R9_REGNUM,
SIM_ARM_R10_REGNUM,
SIM_ARM_R11_REGNUM,
SIM_ARM_R12_REGNUM,
SIM_ARM_R13_REGNUM,
SIM_ARM_R14_REGNUM,
SIM_ARM_R15_REGNUM, /* PC */
SIM_ARM_FP0_REGNUM,
SIM_ARM_FP1_REGNUM,
SIM_ARM_FP2_REGNUM,
SIM_ARM_FP3_REGNUM,
SIM_ARM_FP4_REGNUM,
SIM_ARM_FP5_REGNUM,
SIM_ARM_FP6_REGNUM,
SIM_ARM_FP7_REGNUM,
SIM_ARM_FPS_REGNUM,
SIM_ARM_PS_REGNUM
};
#ifdef __cplusplus
}
#endif
#endif

139
include/gdb/sim-d10v.h Normal file
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@ -0,0 +1,139 @@
/* This file defines the interface between the d10v simulator and gdb.
Copyright 1999, 2002 Free Software Foundation, Inc.
This file is part of GDB.
This program is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 2 of the License, or
(at your option) any later version.
This program is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with this program; if not, write to the Free Software
Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
#if !defined (SIM_D10V_H)
#define SIM_D10V_H
#ifdef __cplusplus
extern "C" { // }
#endif
/* GDB interprets addresses as:
0x00xxxxxx: Physical unified memory segment (Unified memory)
0x01xxxxxx: Physical instruction memory segment (On-chip insn memory)
0x02xxxxxx: Physical data memory segment (On-chip data memory)
0x10xxxxxx: Logical data address segment (DMAP translated memory)
0x11xxxxxx: Logical instruction address segment (IMAP translated memory)
The remote d10v board interprets addresses as:
0x00xxxxxx: Physical unified memory segment (Unified memory)
0x01xxxxxx: Physical instruction memory segment (On-chip insn memory)
0x02xxxxxx: Physical data memory segment (On-chip data memory)
The following translate a virtual DMAP/IMAP offset into a physical
memory segment assigning the translated address to PHYS. Since a
memory access may cross a page boundrary the number of bytes for
which the translation is applicable (or 0 for an invalid virtual
offset) is returned. */
enum
{
SIM_D10V_MEMORY_UNIFIED = 0x00000000,
SIM_D10V_MEMORY_INSN = 0x01000000,
SIM_D10V_MEMORY_DATA = 0x02000000,
SIM_D10V_MEMORY_DMAP = 0x10000000,
SIM_D10V_MEMORY_IMAP = 0x11000000
};
extern unsigned long sim_d10v_translate_dmap_addr
(unsigned long offset,
int nr_bytes,
unsigned long *phys,
unsigned long (*dmap_register) (int reg_nr));
extern unsigned long sim_d10v_translate_imap_addr
(unsigned long offset,
int nr_bytes,
unsigned long *phys,
unsigned long (*imap_register) (int reg_nr));
extern unsigned long sim_d10v_translate_addr
(unsigned long vaddr,
int nr_bytes,
unsigned long *phys,
unsigned long (*dmap_register) (int reg_nr),
unsigned long (*imap_register) (int reg_nr));
/* The simulator makes use of the following register information. */
enum sim_d10v_regs
{
SIM_D10V_R0_REGNUM,
SIM_D10V_R1_REGNUM,
SIM_D10V_R2_REGNUM,
SIM_D10V_R3_REGNUM,
SIM_D10V_R4_REGNUM,
SIM_D10V_R5_REGNUM,
SIM_D10V_R6_REGNUM,
SIM_D10V_R7_REGNUM,
SIM_D10V_R8_REGNUM,
SIM_D10V_R9_REGNUM,
SIM_D10V_R10_REGNUM,
SIM_D10V_R11_REGNUM,
SIM_D10V_R12_REGNUM,
SIM_D10V_R13_REGNUM,
SIM_D10V_R14_REGNUM,
SIM_D10V_R15_REGNUM,
SIM_D10V_CR0_REGNUM,
SIM_D10V_CR1_REGNUM,
SIM_D10V_CR2_REGNUM,
SIM_D10V_CR3_REGNUM,
SIM_D10V_CR4_REGNUM,
SIM_D10V_CR5_REGNUM,
SIM_D10V_CR6_REGNUM,
SIM_D10V_CR7_REGNUM,
SIM_D10V_CR8_REGNUM,
SIM_D10V_CR9_REGNUM,
SIM_D10V_CR10_REGNUM,
SIM_D10V_CR11_REGNUM,
SIM_D10V_CR12_REGNUM,
SIM_D10V_CR13_REGNUM,
SIM_D10V_CR14_REGNUM,
SIM_D10V_CR15_REGNUM,
SIM_D10V_A0_REGNUM,
SIM_D10V_A1_REGNUM,
SIM_D10V_SPI_REGNUM,
SIM_D10V_SPU_REGNUM,
SIM_D10V_IMAP0_REGNUM,
SIM_D10V_IMAP1_REGNUM,
SIM_D10V_DMAP0_REGNUM,
SIM_D10V_DMAP1_REGNUM,
SIM_D10V_DMAP2_REGNUM,
SIM_D10V_DMAP3_REGNUM,
SIM_D10V_TS2_DMAP_REGNUM
};
enum
{
SIM_D10V_NR_R_REGS = 16,
SIM_D10V_NR_A_REGS = 2,
SIM_D10V_NR_IMAP_REGS = 2,
SIM_D10V_NR_DMAP_REGS = 4,
SIM_D10V_NR_CR_REGS = 16
};
#ifdef __cplusplus
}
#endif
#endif

54
include/gdb/sim-sh.h Normal file
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@ -0,0 +1,54 @@
/* This file defines the interface between the sh simulator and gdb.
Copyright (C) 2002 Free Software Foundation, Inc.
This file is part of GDB.
This program is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 2 of the License, or
(at your option) any later version.
This program is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with this program; if not, write to the Free Software
Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
#if !defined (SIM_SH_H)
#define SIM_SH_H
#ifdef __cplusplus
extern "C" { // }
#endif
/* The simulator makes use of the following register information. */
enum
{
SIM_SH64_R0_REGNUM = 0,
SIM_SH64_SP_REGNUM = 15,
SIM_SH64_PC_REGNUM = 64,
SIM_SH64_SR_REGNUM = 65,
SIM_SH64_SSR_REGNUM = 66,
SIM_SH64_SPC_REGNUM = 67,
SIM_SH64_TR0_REGNUM = 68,
SIM_SH64_FPCSR_REGNUM = 76,
SIM_SH64_FR0_REGNUM = 77
};
enum
{
SIM_SH64_NR_REGS = 141, /* total number of architectural registers */
SIM_SH64_NR_R_REGS = 64, /* number of general registers */
SIM_SH64_NR_TR_REGS = 8, /* number of target registers */
SIM_SH64_NR_FP_REGS = 64 /* number of floating point registers */
};
#ifdef __cplusplus
}
#endif
#endif

282
include/opcode/dlx.h Normal file
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@ -0,0 +1,282 @@
/* Table of opcodes for the DLX microprocess.
Copyright 2002 Free Software Foundation, Inc.
This file is part of GDB and GAS.
This program is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 2 of the License, or
(at your option) any later version.
This program is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with this program; if not, write to the Free Software
Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
Initially created by Kuang Hwa Lin, 2002. */
/* Following are the function codes for the Special OP (ALU). */
#define ALUOP 0x00000000
#define SPECIALOP 0x00000000
#define NOPF 0x00000000
#define SLLF 0x00000004
#define SRLF 0x00000006
#define SRAF 0x00000007
#define SEQUF 0x00000010
#define SNEUF 0x00000011
#define SLTUF 0x00000012
#define SGTUF 0x00000013
#define SLEUF 0x00000014
#define SGEUF 0x00000015
#define ADDF 0x00000020
#define ADDUF 0x00000021
#define SUBF 0x00000022
#define SUBUF 0x00000023
#define ANDF 0x00000024
#define ORF 0x00000025
#define XORF 0x00000026
#define SEQF 0x00000028
#define SNEF 0x00000029
#define SLTF 0x0000002A
#define SGTF 0x0000002B
#define SLEF 0x0000002C
#define SGEF 0x0000002D
/* Following special functions was not mentioned in the
Hennessy's book but was implemented in the RTL. */
#define MVTSF 0x00000030
#define MVFSF 0x00000031
#define BSWAPF 0x00000032
#define LUTF 0x00000033
/* Following special functions was mentioned in the
Hennessy's book but was not implemented in the RTL. */
#define MULTF 0x00000005
#define MULTUF 0x00000006
#define DIVF 0x00000007
#define DIVUF 0x00000008
/* Following are the rest of the OPcodes:
JOP = (0x002 << 26), JALOP = (0x003 << 26), BEQOP = (0x004 << 26), BNEOP = (0x005 << 26)
ADDIOP = (0x008 << 26), ADDUIOP= (0x009 << 26), SUBIOP = (0x00A << 26), SUBUIOP= (0x00B << 26)
ANDIOP = (0x00C << 26), ORIOP = (0x00D << 26), XORIOP = (0x00E << 26), LHIOP = (0x00F << 26)
RFEOP = (0x010 << 26), TRAPOP = (0x011 << 26), JROP = (0x012 << 26), JALROP = (0x013 << 26)
BREAKOP= (0x014 << 26)
SEQIOP = (0x018 << 26), SNEIOP = (0x019 << 26), SLTIOP = (0x01A << 26), SGTIOP = (0x01B << 26)
SLEIOP = (0x01C << 26), SGEIOP = (0x01D << 26)
LBOP = (0x020 << 26), LHOP = (0x021 << 26), LWOP = (0x023 << 26), LBUOP = (0x024 << 26)
LHUOP = (0x025 << 26), SBOP = (0x028 << 26), SHOP = (0x029 << 26), SWOP = (0x02B << 26)
LSBUOP = (0x026 << 26), LSHU = (0x027 << 26), LSW = (0x02C << 26),
SEQUIOP= (0x030 << 26), SNEUIOP= (0x031 << 26), SLTUIOP= (0x032 << 26), SGTUIOP= (0x033 << 26)
SLEUIOP= (0x034 << 26), SGEUIOP= (0x035 << 26)
SLLIOP = (0x036 << 26), SRLIOP = (0x037 << 26), SRAIOP = (0x038 << 26). */
#define JOP 0x08000000
#define JALOP 0x0c000000
#define BEQOP 0x10000000
#define BNEOP 0x14000000
#define ADDIOP 0x20000000
#define ADDUIOP 0x24000000
#define SUBIOP 0x28000000
#define SUBUIOP 0x2c000000
#define ANDIOP 0x30000000
#define ORIOP 0x34000000
#define XORIOP 0x38000000
#define LHIOP 0x3c000000
#define RFEOP 0x40000000
#define TRAPOP 0x44000000
#define JROP 0x48000000
#define JALROP 0x4c000000
#define BREAKOP 0x50000000
#define SEQIOP 0x60000000
#define SNEIOP 0x64000000
#define SLTIOP 0x68000000
#define SGTIOP 0x6c000000
#define SLEIOP 0x70000000
#define SGEIOP 0x74000000
#define LBOP 0x80000000
#define LHOP 0x84000000
#define LWOP 0x8c000000
#define LBUOP 0x90000000
#define LHUOP 0x94000000
#define LDSTBU
#define LDSTHU
#define SBOP 0xa0000000
#define SHOP 0xa4000000
#define SWOP 0xac000000
#define LDST
#define SEQUIOP 0xc0000000
#define SNEUIOP 0xc4000000
#define SLTUIOP 0xc8000000
#define SGTUIOP 0xcc000000
#define SLEUIOP 0xd0000000
#define SGEUIOP 0xd4000000
#define SLLIOP 0xd8000000
#define SRLIOP 0xdc000000
#define SRAIOP 0xe0000000
/* Following 3 ops was added to provide the MP atonmic operation. */
#define LSBUOP 0x98000000
#define LSHUOP 0x9c000000
#define LSWOP 0xb0000000
/* Following opcode was defined in the Hennessy's book as
"normal" opcode but was implemented in the RTL as special
functions. */
#if 0
#define MVTSOP 0x50000000
#define MVFSOP 0x54000000
#endif
struct dlx_opcode
{
/* Name of the instruction. */
char *name;
/* Opcode word. */
unsigned long opcode;
/* A string of characters which describe the operands.
Valid characters are:
, Itself. The character appears in the assembly code.
a rs1 The register number is in bits 21-25 of the instruction.
b rs2/rd The register number is in bits 16-20 of the instruction.
c rd. The register number is in bits 11-15 of the instruction.
f FUNC bits 0-10 of the instruction.
i An immediate operand is in bits 0-16 of the instruction. 0 extended
I An immediate operand is in bits 0-16 of the instruction. sign extended
d An 16 bit PC relative displacement.
D An immediate operand is in bits 0-25 of the instruction.
N No opperands needed, for nops.
P it can be a register or a 16 bit operand. */
char *args;
};
static const struct dlx_opcode dlx_opcodes[] =
{
/* Arithmetic and Logic R-TYPE instructions. */
{ "nop", (ALUOP|NOPF), "N" }, /* NOP */
{ "add", (ALUOP|ADDF), "c,a,b" }, /* Add */
{ "addu", (ALUOP|ADDUF), "c,a,b" }, /* Add Unsigned */
{ "sub", (ALUOP|SUBF), "c,a,b" }, /* SUB */
{ "subu", (ALUOP|SUBUF), "c,a,b" }, /* Sub Unsigned */
{ "mult", (ALUOP|MULTF), "c,a,b" }, /* MULTIPLY */
{ "multu", (ALUOP|MULTUF), "c,a,b" }, /* MULTIPLY Unsigned */
{ "div", (ALUOP|DIVF), "c,a,b" }, /* DIVIDE */
{ "divu", (ALUOP|DIVUF), "c,a,b" }, /* DIVIDE Unsigned */
{ "and", (ALUOP|ANDF), "c,a,b" }, /* AND */
{ "or", (ALUOP|ORF), "c,a,b" }, /* OR */
{ "xor", (ALUOP|XORF), "c,a,b" }, /* Exclusive OR */
{ "sll", (ALUOP|SLLF), "c,a,b" }, /* SHIFT LEFT LOGICAL */
{ "sra", (ALUOP|SRAF), "c,a,b" }, /* SHIFT RIGHT ARITHMETIC */
{ "srl", (ALUOP|SRLF), "c,a,b" }, /* SHIFT RIGHT LOGICAL */
{ "seq", (ALUOP|SEQF), "c,a,b" }, /* Set if equal */
{ "sne", (ALUOP|SNEF), "c,a,b" }, /* Set if not equal */
{ "slt", (ALUOP|SLTF), "c,a,b" }, /* Set if less */
{ "sgt", (ALUOP|SGTF), "c,a,b" }, /* Set if greater */
{ "sle", (ALUOP|SLEF), "c,a,b" }, /* Set if less or equal */
{ "sge", (ALUOP|SGEF), "c,a,b" }, /* Set if greater or equal */
{ "sequ", (ALUOP|SEQUF), "c,a,b" }, /* Set if equal unsigned */
{ "sneu", (ALUOP|SNEUF), "c,a,b" }, /* Set if not equal unsigned */
{ "sltu", (ALUOP|SLTUF), "c,a,b" }, /* Set if less unsigned */
{ "sgtu", (ALUOP|SGTUF), "c,a,b" }, /* Set if greater unsigned */
{ "sleu", (ALUOP|SLEUF), "c,a,b" }, /* Set if less or equal unsigned*/
{ "sgeu", (ALUOP|SGEUF), "c,a,b" }, /* Set if greater or equal */
{ "mvts", (ALUOP|MVTSF), "c,a" }, /* Move to special register */
{ "mvfs", (ALUOP|MVFSF), "c,a" }, /* Move from special register */
{ "bswap", (ALUOP|BSWAPF), "c,a,b" }, /* ??? Was not documented */
{ "lut", (ALUOP|LUTF), "c,a,b" }, /* ????? same as above */
/* Arithmetic and Logical Immediate I-TYPE instructions. */
{ "addi", ADDIOP, "b,a,I" }, /* Add Immediate */
{ "addui", ADDUIOP, "b,a,i" }, /* Add Usigned Immediate */
{ "subi", SUBIOP, "b,a,I" }, /* Sub Immediate */
{ "subui", SUBUIOP, "b,a,i" }, /* Sub Unsigned Immedated */
{ "andi", ANDIOP, "b,a,i" }, /* AND Immediate */
{ "ori", ORIOP, "b,a,i" }, /* OR Immediate */
{ "xori", XORIOP, "b,a,i" }, /* Exclusive OR Immediate */
{ "slli", SLLIOP, "b,a,i" }, /* SHIFT LEFT LOCICAL Immediate */
{ "srai", SRAIOP, "b,a,i" }, /* SHIFT RIGHT ARITH. Immediate */
{ "srli", SRLIOP, "b,a,i" }, /* SHIFT RIGHT LOGICAL Immediate*/
{ "seqi", SEQIOP, "b,a,i" }, /* Set if equal */
{ "snei", SNEIOP, "b,a,i" }, /* Set if not equal */
{ "slti", SLTIOP, "b,a,i" }, /* Set if less */
{ "sgti", SGTIOP, "b,a,i" }, /* Set if greater */
{ "slei", SLEIOP, "b,a,i" }, /* Set if less or equal */
{ "sgei", SGEIOP, "b,a,i" }, /* Set if greater or equal */
{ "sequi", SEQUIOP, "b,a,i" }, /* Set if equal */
{ "sneui", SNEUIOP, "b,a,i" }, /* Set if not equal */
{ "sltui", SLTUIOP, "b,a,i" }, /* Set if less */
{ "sgtui", SGTUIOP, "b,a,i" }, /* Set if greater */
{ "sleui", SLEUIOP, "b,a,i" }, /* Set if less or equal */
{ "sgeui", SGEUIOP, "b,a,i" }, /* Set if greater or equal */
/* Macros for I type instructions. */
{ "mov", ADDIOP, "b,P" }, /* a move macro */
{ "movu", ADDUIOP, "b,P" }, /* a move macro, unsigned */
#if 0
/* Move special. */
{ "mvts", MVTSOP, "b,a" }, /* Move From Integer to Special */
{ "mvfs", MVFSOP, "b,a" }, /* Move From Special to Integer */
#endif
/* Load high Immediate I-TYPE instruction. */
{ "lhi", LHIOP, "b,i" }, /* Load High Immediate */
{ "lui", LHIOP, "b,i" }, /* Load High Immediate */
{ "sethi", LHIOP, "b,i" }, /* Load High Immediate */
/* LOAD/STORE BYTE 8 bits I-TYPE. */
{ "lb", LBOP, "b,a,I" }, /* Load Byte */
{ "lbu", LBUOP, "b,a,I" }, /* Load Byte Unsigned */
{ "ldstbu", LSBUOP, "b,a,I" }, /* Load store Byte Unsigned */
{ "sb", SBOP, "b,a,I" }, /* Store Byte */
/* LOAD/STORE HALFWORD 16 bits. */
{ "lh", LHOP, "b,a,I" }, /* Load Halfword */
{ "lhu", LHUOP, "b,a,I" }, /* Load Halfword Unsigned */
{ "ldsthu", LSHUOP, "b,a,I" }, /* Load Store Halfword Unsigned */
{ "sh", SHOP, "b,a,I" }, /* Store Halfword */
/* LOAD/STORE WORD 32 bits. */
{ "lw", LWOP, "b,a,I" }, /* Load Word */
{ "sw", SWOP, "b,a,I" }, /* Store Word */
{ "ldstw", LSWOP, "b,a,I" }, /* Load Store Word */
/* Branch PC-relative, 16 bits offset. */
{ "beqz", BEQOP, "a,d" }, /* Branch if a == 0 */
{ "bnez", BNEOP, "a,d" }, /* Branch if a != 0 */
{ "beq", BEQOP, "a,d" }, /* Branch if a == 0 */
{ "bne", BNEOP, "a,d" }, /* Branch if a != 0 */
/* Jumps Trap and RFE J-TYPE. */
{ "j", JOP, "D" }, /* Jump, PC-relative 26 bits */
{ "jal", JALOP, "D" }, /* JAL, PC-relative 26 bits */
{ "break", BREAKOP, "D" }, /* break to OS */
{ "trap" , TRAPOP, "D" }, /* TRAP to OS */
{ "rfe", RFEOP, "N" }, /* Return From Exception */
/* Macros. */
{ "call", JOP, "D" }, /* Jump, PC-relative 26 bits */
/* Jumps Trap and RFE I-TYPE. */
{ "jr", JROP, "a" }, /* Jump Register, Abs (32 bits) */
{ "jalr", JALROP, "a" }, /* JALR, Abs (32 bits) */
/* Macros. */
{ "retr", JROP, "a" }, /* Jump Register, Abs (32 bits) */
{ "", 0x0, "" } /* Dummy entry, not included in NUM_OPCODES.
This lets code examine entry i + 1 without
checking if we've run off the end of the table. */
};
const unsigned int num_dlx_opcodes = (((sizeof dlx_opcodes) / (sizeof dlx_opcodes[0])) - 1);