Add support for the M32R2 processor.

This commit is contained in:
Nick Clifton 2003-12-03 17:38:48 +00:00
parent 145b4dc249
commit a562b2239a
2 changed files with 37 additions and 14 deletions

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@ -1,3 +1,7 @@
2003-12-03 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
* elf/m32r.h: Add new machine type m32r2 and instruction modes.
2003-11-06 Alan Modra <amodra@bigpond.net.au> 2003-11-06 Alan Modra <amodra@bigpond.net.au>
* ppc.h (R_PPC_RELAX32PC): Define. * ppc.h (R_PPC_RELAX32PC): Define.

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@ -1,21 +1,21 @@
/* M32R ELF support for BFD. /* M32R ELF support for BFD.
Copyright 1996, 1997, 1998, 1999, 2000 Free Software Foundation, Inc. Copyright 1996, 1997, 1998, 1999, 2000, 2003 Free Software Foundation, Inc.
This file is part of BFD, the Binary File Descriptor library. This file is part of BFD, the Binary File Descriptor library.
This program is free software; you can redistribute it and/or modify This program is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 2 of the License, or the Free Software Foundation; either version 2 of the License, or
(at your option) any later version. (at your option) any later version.
This program is distributed in the hope that it will be useful, This program is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details. GNU General Public License for more details.
You should have received a copy of the GNU General Public License You should have received a copy of the GNU General Public License
along with this program; if not, write to the Free Software Foundation, Inc., along with this program; if not, write to the Free Software Foundation, Inc.,
59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
#ifndef _ELF_M32R_H #ifndef _ELF_M32R_H
#define _ELF_M32R_H #define _ELF_M32R_H
@ -62,6 +62,25 @@ END_RELOC_NUMBERS (R_M32R_max)
/* m32r code. */ /* m32r code. */
#define E_M32R_ARCH 0x00000000 #define E_M32R_ARCH 0x00000000
/* m32rx code. */ /* m32rx code. */
#define E_M32RX_ARCH 0x10000000 #define E_M32RX_ARCH 0x10000000
/* m32r2 code. */
#define E_M32R2_ARCH 0x20000000
/* 12 bit m32r new instructions field. */
#define EF_M32R_INST 0x0FFF0000
/* Parallel instructions. */
#define E_M32R_HAS_PARALLEL 0x00010000
/* Hidden instructions for m32rx:
jc, jnc, macwhi-a, macwlo-a, mulwhi-a, mulwlo-a, sth+, shb+, sat, pcmpbz,
sc, snc. */
#define E_M32R_HAS_HIDDEN_INST 0x00020000
/* New bit instructions:
clrpsw, setpsw, bset, bclr, btst. */
#define E_M32R_HAS_BIT_INST 0x00040000
/* Floating point instructions. */
#define E_M32R_HAS_FLOAT_INST 0x00080000
/* 4 bit m32r ignore to check field. */
#define EF_M32R_IGNORE 0x0000000F
#endif #endif