Optimize epilogue sequence for architectures with POP interworking.
ARMv5 and above supports arm/thumb interworking using POP, so we can improve the exit sequence in this case.
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@ -26,6 +26,8 @@
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* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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*/
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#include "acle-compat.h"
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.thumb
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.thumb
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.syntax unified
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.syntax unified
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.global __aeabi_memmove
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.global __aeabi_memmove
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@ -49,9 +51,13 @@ __aeabi_memmove:
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subs r3, r3, #1
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subs r3, r3, #1
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bcs 1b
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bcs 1b
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2:
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2:
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#if __ARM_ARCH >= 5
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pop {r4, pc}
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#else
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pop {r4}
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pop {r4}
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pop {r1}
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pop {r1}
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bx r1
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bx r1
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#endif
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3:
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3:
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movs r3, #0
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movs r3, #0
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cmp r2, #0
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cmp r2, #0
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@ -26,6 +26,8 @@
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* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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*/
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#include "acle-compat.h"
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.thumb
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.thumb
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.syntax unified
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.syntax unified
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.global __aeabi_memset
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.global __aeabi_memset
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@ -110,9 +112,13 @@ __aeabi_memset:
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cmp r4, r3
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cmp r4, r3
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bne 8b
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bne 8b
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9:
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9:
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#if __ARM_ARCH >= 5
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pop {r4, r5, r6, pc}
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#else
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pop {r4, r5, r6}
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pop {r4, r5, r6}
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pop {r1}
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pop {r1}
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bx r1
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bx r1
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#endif
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10:
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10:
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movs r3, r0
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movs r3, r0
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movs r4, r1
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movs r4, r1
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