mirror of
git://sourceware.org/git/newlib-cygwin.git
synced 2025-01-31 11:30:56 +08:00
2007-01-04 Kazu Hirata <kazu@codesourcery.com>
Merge from newlib-csl-20060320-branch:
2006-12-22 Nathan Sidwell <nathan@codesourcery.com>
libgloss/
* m68k/Makefile.in (CF_ISRS): Remove now shared routines.
* m68k/cf-crt0.S (__reset): Define here.
* m68k/cf-isrs.c: Share some ISRS. Add aliases for each IRQ slot.
* m68k/cf-isv.S: Move to .interrupt_vector section. Make each
slot a unique routine.
* m68k/cf.sc: Adjust for .interrupt_vector section.
libgloss/
* m68k/Makefile.in (m5273c3): Rename to ...
(m5272c3): ... here to fix typo.
(m5249c3): New.
(CF_BOARDS): Add it.
This commit is contained in:
Jeff Johnston
parent
0a9e977f62
commit
9d507d4d4b
@ -1,3 +1,22 @@
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2007-01-04 Kazu Hirata <kazu@codesourcery.com>
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Merge from newlib-csl-20060320-branch:
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2006-12-22 Nathan Sidwell <nathan@codesourcery.com>
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libgloss/
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* m68k/Makefile.in (CF_ISRS): Remove now shared routines.
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* m68k/cf-crt0.S (__reset): Define here.
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* m68k/cf-isrs.c: Share some ISRS. Add aliases for each IRQ slot.
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* m68k/cf-isv.S: Move to .interrupt_vector section. Make each
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slot a unique routine.
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* m68k/cf.sc: Adjust for .interrupt_vector section.
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libgloss/
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* m68k/Makefile.in (m5273c3): Rename to ...
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(m5272c3): ... here to fix typo.
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(m5249c3): New.
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(CF_BOARDS): Add it.
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2006-01-03 Kazu Hirata <kazu@codesourcery.com>
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2006-01-03 Kazu Hirata <kazu@codesourcery.com>
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* arm/Makefile (RDPMON_OBJS): Add _exit.o and _kill.o.
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* arm/Makefile (RDPMON_OBJS): Add _exit.o and _kill.o.
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@ -123,28 +123,25 @@ CF_CRT0S= cf-hosted-crt0.o cf-unhosted-crt0.o
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CF_BSP= libcf.a
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CF_BSP= libcf.a
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CF_OBJS= cf-isv.o cf-crt1.o cf-hosted.o getpid.o kill.o cf-sbrk.o \
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CF_OBJS= cf-isv.o cf-crt1.o cf-hosted.o getpid.o kill.o cf-sbrk.o \
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cf-exit.o $(patsubst %,cf-%.o,${CF_ISRS})
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cf-exit.o $(patsubst %,cf-%.o,${CF_ISRS})
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CF_ISRS= other_interrupt reset access_error address_error \
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CF_ISRS= other_interrupt access_error address_error \
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illegal_instruction divide_by_zero privilege_violation \
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illegal_instruction divide_by_zero privilege_violation \
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trace unimplemented_line_a_opcode unimplemented_line_f_opcode \
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trace unimplemented_opcode breakpoint_debug_interrupt \
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non_pc_breakpoint_debug_interrupt pc_breakpoint_debug_interrupt \
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format_error spurious_interrupt fp_interrupt \
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format_error spurious_interrupt fp_branch_unordered \
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unsupported_instruction trap_interrupt
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fp_inexact_result fp_divide_by_zero fp_underflow fp_operand_error \
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fp_overflow fp_input_not_a_number fp_input_denormalized_number \
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unsupported_instruction \
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$(addprefix trap,0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15)
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# RAM ROM
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# RAM ROM
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m5208evb := 1024M 16M 0M 2M
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m5208evb := 1024M 16M 0M 2M
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m5213evb := 512M 32K 0M 256K
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m5213evb := 512M 32K 0M 256K
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m52235evb := 512M 32K 0M 256K
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m52235evb := 512M 32K 0M 256K
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m5235evb := 0M 16M 0xFFE00000 2M
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m5235evb := 0M 16M 0xFFE00000 2M
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m5273c3 := 0M 4M 0xFFE00000 2M
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m5249c3 := 0M 4M 0xFFE00000 2M
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m5272c3 := 0M 4M 0xFFE00000 2M
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m5275evb := 0M 16M 0xFFE00000 2M
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m5275evb := 0M 16M 0xFFE00000 2M
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m5282evb := 0M 16M 0xFFE00000 2M
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m5282evb := 0M 16M 0xFFE00000 2M
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m5329evb := 1024M 32M 0M 2M
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m5329evb := 1024M 32M 0M 2M
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m5485evb := 0M 64M 1024M 16M
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m5485evb := 0M 64M 1024M 16M
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CF_BOARDS := m5208evb m5213evb m52235evb m5235evb m5272c3 m5275evb \
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CF_BOARDS := m5208evb m5213evb m52235evb m5235evb m5249c3 m5272c3 m5275evb \
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m5282evb m5329evb m5485evb
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m5282evb m5329evb m5485evb
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CF_RAM_SCRIPTS := $(patsubst %,%-ram.ld,$(CF_BOARDS))
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CF_RAM_SCRIPTS := $(patsubst %,%-ram.ld,$(CF_BOARDS))
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CF_ROM_SCRIPTS := $(patsubst %,%-rom.ld,$(CF_BOARDS))
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CF_ROM_SCRIPTS := $(patsubst %,%-rom.ld,$(CF_BOARDS))
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@ -20,6 +20,17 @@
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.extern __heap_end
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.extern __heap_end
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.weak __heap_end
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.weak __heap_end
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.extern __start1
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.extern __start1
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/* __reset should cause a HALT in a hosted executable and
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fall into __start for an unhosted executable. The user is
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free to override this with their own declaration. */
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.globl __reset
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.weak __reset
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__reset:
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#if HOSTED
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HALT
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#endif
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.globl __start
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.globl __start
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__start:
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__start:
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/* Initialize stack */
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/* Initialize stack */
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@ -42,3 +53,4 @@ __start:
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move.l d1,sp@-
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move.l d1,sp@-
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move.l fp,sp@- /* Dummy return address */
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move.l fp,sp@- /* Dummy return address */
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jmp __start1
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jmp __start1
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@ -33,157 +33,131 @@ void __attribute__((interrupt_handler)) NAME (void) \
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struct eat_trailing_semicolon
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struct eat_trailing_semicolon
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#if defined (L_other_interrupt)
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#if defined (L_other_interrupt)
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ISR_DEFINE (__other_interrupt);
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static ISR_DEFINE (__other_interrupt);
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#endif
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#define ALIAS __other_interrupt
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#define PREFIX interrupt
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#if defined (L_reset)
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#define ALIASES A(6) A(7) \
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ISR_DEFINE (__reset);
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A(15) A(16) A(17) A(18) A(19) A(20) A(21) A(22) A(23) \
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A(25) A(26) A(27) A(28) A(29) A(30) A(31) \
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A(56) A(57) A(58) A(59) A(60) A(62) A(63) \
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A(64) A(65) A(66) A(67) A(68) A(69) A(70) A(71) \
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A(72) A(73) A(74) A(75) A(76) A(77) A(78) A(79) \
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A(80) A(81) A(82) A(83) A(84) A(85) A(86) A(87) \
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A(88) A(89) A(90) A(91) A(92) A(93) A(94) A(95) \
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A(96) A(97) A(98) A(99) A(100) A(101) A(102) A(103) \
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A(104) A(105) A(106) A(107) A(108) A(109) A(110) A(111) \
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A(112) A(113) A(114) A(115) A(116) A(117) A(118) A(119) \
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A(120) A(121) A(122) A(123) A(124) A(125) A(126) A(127) \
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A(128) A(129) A(130) A(131) A(132) A(133) A(134) A(135) \
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A(136) A(137) A(138) A(139) A(140) A(141) A(142) A(143) \
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A(144) A(145) A(146) A(147) A(148) A(149) A(150) A(151) \
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A(152) A(153) A(154) A(155) A(156) A(157) A(158) A(159) \
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A(160) A(161) A(162) A(163) A(164) A(165) A(166) A(167) \
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A(168) A(169) A(170) A(171) A(172) A(173) A(174) A(175) \
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A(176) A(177) A(178) A(179) A(180) A(181) A(182) A(183) \
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A(184) A(185) A(186) A(187) A(188) A(189) A(190) A(191) \
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A(192) A(193) A(194) A(195) A(196) A(197) A(198) A(199) \
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A(200) A(201) A(202) A(203) A(204) A(205) A(206) A(207) \
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A(208) A(209) A(210) A(211) A(212) A(213) A(214) A(215) \
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A(216) A(217) A(218) A(219) A(220) A(221) A(222) A(223) \
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A(224) A(225) A(226) A(227) A(228) A(229) A(230) A(231) \
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A(232) A(233) A(234) A(235) A(236) A(237) A(238) A(239) \
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A(240) A(241) A(242) A(243) A(244) A(245) A(246) A(247) \
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A(248) A(249) A(250) A(251) A(252) A(253) A(254) A(255)
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#endif
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#endif
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#if defined (L_access_error)
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#if defined (L_access_error)
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ISR_DEFINE (__access_error);
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ISR_DEFINE (__access_error);
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#define DEFINED __access_error
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#endif
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#endif
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#if defined (L_address_error)
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#if defined (L_address_error)
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ISR_DEFINE (__address_error);
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ISR_DEFINE (__address_error);
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#define DEFINED __address_error
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#endif
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#endif
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#if defined (L_illegal_instruction)
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#if defined (L_illegal_instruction)
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ISR_DEFINE (__illegal_instruction);
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ISR_DEFINE (__illegal_instruction);
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#define DEFINED __illegal_instruction
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#endif
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#endif
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#if defined (L_divide_by_zero)
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#if defined (L_divide_by_zero)
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ISR_DEFINE (__divide_by_zero);
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ISR_DEFINE (__divide_by_zero);
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#define DEFINED __divide_by_zero
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#endif
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#endif
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#if defined (L_privilege_violation)
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#if defined (L_privilege_violation)
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ISR_DEFINE (__privilege_violation);
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ISR_DEFINE (__privilege_violation);
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#define DEFINED __privilege_violation
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#endif
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#endif
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#if defined (L_trace)
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#if defined (L_trace)
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ISR_DEFINE (__trace);
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ISR_DEFINE (__trace);
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#define DEFINED __trace
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#endif
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#endif
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#if defined (L_unimplemented_line_a_opcode)
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#if defined (L_unimplemented_opcode)
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ISR_DEFINE (__unimplemented_line_a_opcode);
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static ISR_DEFINE (__unimplemented_opcode);
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#define ALIAS __unimplemented_opcode
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#define PREFIX unimplemented_
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#define SUFFIX _opcode
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#define ALIASES A(line_a) A(line_f)
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#endif
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#endif
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#if defined (L_unimplemented_line_f_opcode)
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#if defined (L_breakpoint_debug_interrupt)
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ISR_DEFINE (__unimplemented_line_f_opcode);
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static ISR_DEFINE (__breakpoint_debug_interrupt);
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#endif
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#define ALIAS __breakpoint_debug_interrupt
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#define SUFFIX _breakpoint_debug_interrupt
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#if defined (L_non_pc_breakpoint_debug_interrupt)
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#define ALIASES A(non_pc) A(pc)
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ISR_DEFINE (__non_pc_breakpoint_debug_interrupt);
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#endif
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#if defined (L_pc_breakpoint_debug_interrupt)
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ISR_DEFINE (__pc_breakpoint_debug_interrupt);
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#endif
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#endif
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#if defined (L_format_error)
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#if defined (L_format_error)
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ISR_DEFINE (__format_error);
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ISR_DEFINE (__format_error);
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#define DEFINED __format_error
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#endif
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#endif
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#if defined (L_spurious_interrupt)
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#if defined (L_spurious_interrupt)
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ISR_DEFINE (__spurious_interrupt);
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ISR_DEFINE (__spurious_interrupt);
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#define DEFINED __spurious_interrupt
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#endif
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#endif
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#if defined (L_trap0)
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#if defined (L_trap_interrupt)
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ISR_DEFINE (__trap0);
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static ISR_DEFINE (__trap_interrupt);
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#define ALIAS __trap_interrupt
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#define PREFIX trap
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|
#define ALIASES A(0) A(1) A(2) A(3) A(4) A(5) A(6) A(7) \
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A(8) A(9) A(10) A(11) A(12) A(13) A(14) A(15)
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#endif
|
#endif
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#if defined (L_trap1)
|
#if defined (L_fp_interrupt)
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ISR_DEFINE (__trap1);
|
static ISR_DEFINE (__fp_interrupt);
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#endif
|
#define ALIAS __fp_interrupt
|
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|
#define PREFIX fp_
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#if defined (L_trap2)
|
#define ALIASES A(branch_unordered) A(inexact_result) A(divide_by_zero) \
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ISR_DEFINE (__trap2);
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A(underflow) A(operand_error) A(overflow) A(input_not_a_number) \
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#endif
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A(input_denormalized_number)
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#if defined (L_trap3)
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ISR_DEFINE (__trap3);
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||||||
#endif
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#if defined (L_trap4)
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ISR_DEFINE (__trap4);
|
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||||||
#endif
|
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||||||
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#if defined (L_trap5)
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||||||
ISR_DEFINE (__trap5);
|
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||||||
#endif
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||||||
|
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#if defined (L_trap6)
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||||||
ISR_DEFINE (__trap6);
|
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||||||
#endif
|
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||||||
|
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||||||
#if defined (L_trap7)
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ISR_DEFINE (__trap7);
|
|
||||||
#endif
|
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||||||
|
|
||||||
#if defined (L_trap8)
|
|
||||||
ISR_DEFINE (__trap8);
|
|
||||||
#endif
|
|
||||||
|
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||||||
#if defined (L_trap9)
|
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||||||
ISR_DEFINE (__trap9);
|
|
||||||
#endif
|
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||||||
|
|
||||||
#if defined (L_trap10)
|
|
||||||
ISR_DEFINE (__trap10);
|
|
||||||
#endif
|
|
||||||
|
|
||||||
#if defined (L_trap11)
|
|
||||||
ISR_DEFINE (__trap11);
|
|
||||||
#endif
|
|
||||||
|
|
||||||
#if defined (L_trap12)
|
|
||||||
ISR_DEFINE (__trap12);
|
|
||||||
#endif
|
|
||||||
|
|
||||||
#if defined (L_trap13)
|
|
||||||
ISR_DEFINE (__trap13);
|
|
||||||
#endif
|
|
||||||
|
|
||||||
#if defined (L_trap14)
|
|
||||||
ISR_DEFINE (__trap14);
|
|
||||||
#endif
|
|
||||||
|
|
||||||
#if defined (L_trap15)
|
|
||||||
ISR_DEFINE (__trap15);
|
|
||||||
#endif
|
|
||||||
|
|
||||||
#if defined (L_fp_branch_unordered)
|
|
||||||
ISR_DEFINE (__fp_branch_unordered);
|
|
||||||
#endif
|
|
||||||
|
|
||||||
#if defined (L_fp_inexact_result)
|
|
||||||
ISR_DEFINE (__fp_inexact_result);
|
|
||||||
#endif
|
|
||||||
|
|
||||||
#if defined (L_fp_divide_by_zero)
|
|
||||||
ISR_DEFINE (__fp_divide_by_zero);
|
|
||||||
#endif
|
|
||||||
|
|
||||||
#if defined (L_fp_underflow)
|
|
||||||
ISR_DEFINE (__fp_underflow);
|
|
||||||
#endif
|
|
||||||
|
|
||||||
#if defined (L_fp_operand_error)
|
|
||||||
ISR_DEFINE (__fp_operand_error);
|
|
||||||
#endif
|
|
||||||
|
|
||||||
#if defined (L_fp_overflow)
|
|
||||||
ISR_DEFINE (__fp_overflow);
|
|
||||||
#endif
|
|
||||||
|
|
||||||
#if defined (L_fp_input_not_a_number)
|
|
||||||
ISR_DEFINE (__fp_input_not_a_number);
|
|
||||||
#endif
|
|
||||||
|
|
||||||
#if defined (L_fp_input_denormalized_number)
|
|
||||||
ISR_DEFINE (__fp_input_denormalized_number);
|
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
#if defined (L_unsupported_instruction)
|
#if defined (L_unsupported_instruction)
|
||||||
ISR_DEFINE (__unsupported_instruction);
|
ISR_DEFINE (__unsupported_instruction);
|
||||||
|
#define DEFINED __unsupported_instruction
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
|
#if defined(ALIAS)
|
||||||
|
#ifndef PREFIX
|
||||||
|
#define PREFIX
|
||||||
|
#endif
|
||||||
|
#ifndef SUFFIX
|
||||||
|
#define SUFFIX
|
||||||
|
#endif
|
||||||
|
#define STRING_(a) #a
|
||||||
|
#define STRING(a) STRING_(a)
|
||||||
|
#define PASTE4_(a,b,c,d) a##b##c##d
|
||||||
|
#define PASTE4(a,b,c,d) PASTE4_(a,b,c,d)
|
||||||
|
#define A(N) \
|
||||||
|
void __attribute__((weak, alias(STRING(ALIAS)))) PASTE4(__,PREFIX,N,SUFFIX) (void);
|
||||||
|
ALIASES
|
||||||
|
#elif !defined(DEFINED)
|
||||||
|
#error "No interrupt routine requested"
|
||||||
|
#endif
|
||||||
|
|
||||||
|
|||||||
@ -13,63 +13,108 @@
|
|||||||
* they apply.
|
* they apply.
|
||||||
*/
|
*/
|
||||||
|
|
||||||
.text
|
.macro SLOT,n,prefix=,suffix=
|
||||||
|
.long __\prefix\n\suffix
|
||||||
|
.endm
|
||||||
|
|
||||||
|
.macro ISR n
|
||||||
|
SLOT \n,interrupt,
|
||||||
|
.endm
|
||||||
|
|
||||||
|
.macro TRAP n
|
||||||
|
SLOT \n,trap,
|
||||||
|
.endm
|
||||||
|
|
||||||
|
.macro FP n
|
||||||
|
SLOT \n,fp_,
|
||||||
|
.endm
|
||||||
|
|
||||||
|
.macro UNIMP_OPCODE n
|
||||||
|
SLOT \n,unimplemented_,_opcode
|
||||||
|
.endm
|
||||||
|
|
||||||
|
.macro BREAKPOINT_DEBUG n
|
||||||
|
SLOT \n,,_breakpoint_debug_interrupt
|
||||||
|
.endm
|
||||||
|
|
||||||
|
.section .interrupt_vector,"a"
|
||||||
|
|
||||||
.globl __interrupt_vector
|
.globl __interrupt_vector
|
||||||
__interrupt_vector:
|
__interrupt_vector:
|
||||||
|
|
||||||
.long __stack /* 0 */
|
.long __stack /* 0 */
|
||||||
.long __reset /* 1 */
|
.long __reset /* 1 */
|
||||||
.long __access_error /* 2 */
|
.long __access_error /* 2 */
|
||||||
.long __address_error /* 3 */
|
.long __address_error /* 3 */
|
||||||
.long __illegal_instruction /* 4 */
|
.long __illegal_instruction /* 4 */
|
||||||
.long __divide_by_zero /* 5 */
|
.long __divide_by_zero /* 5 */
|
||||||
.long __other_interrupt /* 6 */
|
ISR 6
|
||||||
.long __other_interrupt /* 7 */
|
ISR 7
|
||||||
.long __privilege_violation /* 8 */
|
.long __privilege_violation /* 8 */
|
||||||
.long __trace /* 9 */
|
.long __trace /* 9 */
|
||||||
.long __unimplemented_line_a_opcode /* 10 */
|
UNIMP_OPCODE line_a /* 10 */
|
||||||
.long __unimplemented_line_f_opcode /* 11 */
|
UNIMP_OPCODE line_f /* 11 */
|
||||||
.long __non_pc_breakpoint_debug_interrupt /* 12 */
|
BREAKPOINT_DEBUG non_pc /* 12 */
|
||||||
.long __pc_breakpoint_debug_interrupt /* 13 */
|
BREAKPOINT_DEBUG pc /* 13 */
|
||||||
.long __format_error /* 14 */
|
.long __format_error /* 14 */
|
||||||
.rept 24 - 15
|
.irp N,15,16,17,18,19,20,21,22,23
|
||||||
.long __other_interrupt /* [15,24) */
|
ISR \N /* [15,24) */
|
||||||
.endr
|
.endr
|
||||||
.long __spurious_interrupt /* 24 */
|
.long __spurious_interrupt /* 24 */
|
||||||
.rept 32 - 25
|
.irp N,25,26,27,28,29,30,31
|
||||||
.long __other_interrupt /* [25,32) */
|
ISR \N /* [25,32) */
|
||||||
.endr
|
.endr
|
||||||
.long __trap0 /* 32 */
|
.irp N,0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15
|
||||||
.long __trap1 /* 33 */
|
TRAP \N /* [32,48) */
|
||||||
.long __trap2 /* 34 */
|
.endr
|
||||||
.long __trap3 /* 35 */
|
FP branch_unordered /* 48 */
|
||||||
.long __trap4 /* 36 */
|
FP inexact_result /* 49 */
|
||||||
.long __trap5 /* 37 */
|
FP divide_by_zero /* 50 */
|
||||||
.long __trap6 /* 38 */
|
FP underflow /* 51 */
|
||||||
.long __trap7 /* 39 */
|
FP operand_error /* 52 */
|
||||||
.long __trap8 /* 40 */
|
FP overflow /* 53 */
|
||||||
.long __trap9 /* 41 */
|
FP input_not_a_number /* 54 */
|
||||||
.long __trap10 /* 42 */
|
FP input_denormalized_number /* 55 */
|
||||||
.long __trap11 /* 43 */
|
.irp N,56,57,58,59,60
|
||||||
.long __trap12 /* 44 */
|
ISR \N /* [56,61) */
|
||||||
.long __trap13 /* 45 */
|
|
||||||
.long __trap14 /* 46 */
|
|
||||||
.long __trap15 /* 47 */
|
|
||||||
.long __fp_branch_unordered /* 48 */
|
|
||||||
.long __fp_inexact_result /* 49 */
|
|
||||||
.long __fp_divide_by_zero /* 50 */
|
|
||||||
.long __fp_underflow /* 51 */
|
|
||||||
.long __fp_operand_error /* 52 */
|
|
||||||
.long __fp_overflow /* 53 */
|
|
||||||
.long __fp_input_not_a_number /* 54 */
|
|
||||||
.long __fp_input_denormalized_number /* 55 */
|
|
||||||
.rept 61 - 56
|
|
||||||
.long __other_interrupt /* [56,61) */
|
|
||||||
.endr
|
.endr
|
||||||
.long __unsupported_instruction /* 61 */
|
.long __unsupported_instruction /* 61 */
|
||||||
.rept 64 - 62
|
.irp N,62,63
|
||||||
.long __other_interrupt /* [62,64) */
|
ISR \N /* [62,64) */
|
||||||
.endr
|
.endr
|
||||||
.rept 256-64
|
.irp N,64,65,66,67,68,69,70,71,72,73,74,75,76,77,78,79
|
||||||
.long __other_interrupt /* [64,256) */
|
ISR \N /* [64,80) */
|
||||||
|
.endr
|
||||||
|
.irp N,80,81,82,83,84,85,86,87,88,89,90,91,92,93,94,95
|
||||||
|
ISR \N /* [80,96) */
|
||||||
|
.endr
|
||||||
|
.irp N,96,97,98,99,100,101,102,103,104,105,106,107,108,109,110,111
|
||||||
|
ISR \N /* [96,112) */
|
||||||
|
.endr
|
||||||
|
.irp N,112,113,114,115,116,117,118,119,120,121,122,123,124,125,126,127
|
||||||
|
ISR \N /* [112,128) */
|
||||||
|
.endr
|
||||||
|
.irp N,128,129,130,131,132,133,134,135,136,137,138,139,140,141,142,143
|
||||||
|
ISR \N /* [128,144) */
|
||||||
|
.endr
|
||||||
|
.irp N,144,145,146,147,148,149,150,151,152,153,154,155,156,157,158,159
|
||||||
|
ISR \N /* [144,160) */
|
||||||
|
.endr
|
||||||
|
.irp N,160,161,162,163,164,165,166,167,168,169,170,171,172,173,174,175
|
||||||
|
ISR \N /* [160,176) */
|
||||||
|
.endr
|
||||||
|
.irp N,176,177,178,179,180,181,182,183,184,185,186,187,188,189,190,191
|
||||||
|
ISR \N /* [176,192) */
|
||||||
|
.endr
|
||||||
|
.irp N,192,193,194,195,196,197,198,199,200,201,202,203,204,205,206,207
|
||||||
|
ISR \N /* [192,208) */
|
||||||
|
.endr
|
||||||
|
.irp N,208,209,210,211,212,213,214,215,216,217,218,219,220,221,222,223
|
||||||
|
ISR \N /* [208,224) */
|
||||||
|
.endr
|
||||||
|
.irp N,224,225,226,227,228,229,230,231,232,233,234,235,236,237,238,239
|
||||||
|
ISR \N /* [224,240) */
|
||||||
|
.endr
|
||||||
|
.irp N,240,241,242,243,244,245,246,247,248,249,250,251,252,253,254,255
|
||||||
|
ISR \N /* [240,256) */
|
||||||
.endr
|
.endr
|
||||||
|
|||||||
@ -29,7 +29,8 @@ SECTIONS
|
|||||||
.text :
|
.text :
|
||||||
{
|
{
|
||||||
CREATE_OBJECT_SYMBOLS
|
CREATE_OBJECT_SYMBOLS
|
||||||
KEEP (*cf-isv.o(.text))
|
*(.interrupt_vector)
|
||||||
|
|
||||||
cf-${IO}-crt0.o(.text)
|
cf-${IO}-crt0.o(.text)
|
||||||
*(.text .text.*)
|
*(.text .text.*)
|
||||||
*(.gnu.linkonce.t.*)
|
*(.gnu.linkonce.t.*)
|
||||||
|
|||||||
Loading…
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Reference in New Issue
Block a user