* hppa.h (pa_opcodes): Change condition args to use '?' prefix.
This commit is contained in:
Jeff Law
parent
0274eb115d
commit
978c8e91e3
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@ -1,3 +1,7 @@
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Thu Aug 5 16:56:07 1999 Jerry Quinn <jquinn@nortelnetworks.com>
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* hppa.h (pa_opcodes): Change condition args to use '?' prefix.
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1999-08-04 Alan Modra <alan@spri.levels.unisa.edu.au>
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* i386.h (i386_optab): Add DefaultSize modifier to all insns
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@ -57,8 +57,9 @@ struct pa_opcode
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particular opcode in order for an instruction to be an instance
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of that opcode.
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The args component is a string containing one character
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for each operand of the instruction.
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The args component is a string containing one character for each operand of
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the instruction. Characters used as a prefix allow any second character to
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be used without conflicting with the main operand characters.
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Bit positions in this description follow HP usage of lsb = 31,
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"at" is lsb of field.
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@ -69,9 +70,9 @@ struct pa_opcode
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In the args field, the following characters are unused:
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' "#$% *+- ./ :; '
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' [\] '
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' { } '
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' !"#$%& *+- ./ :;< > @'
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' M U [\] '
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'a d {|}~'
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Here are all the characters:
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@ -90,13 +91,6 @@ Kinds of operands:
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c indexed load completer.
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C short load and store completer.
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Y Store Bytes Short completer
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< non-negated compare/subtract conditions.
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a compare/subtract conditions
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d non-negated add conditions
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& logical instruction conditions
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U unit instruction conditions
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> shift/extract/deposit conditions.
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~ bvb,bb conditions
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V 5 bit immediate value at 31
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i 11 bit immediate value at 31
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j 14 bit immediate value at 31
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@ -107,6 +101,27 @@ Kinds of operands:
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W 17 bit branch displacement (PC relative)
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z 17 bit branch displacement (just a number, not an address)
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Condition operands all have '?' as the prefix:
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?f Floating point compare conditions (encoded as 5 bits at 31)
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?a add conditions
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?d non-negated add branch conditions
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?@ add branch conditions followed by nullify
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?s compare/subtract conditions
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?t non-negated compare conditions
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?n compare conditions followed by nullify
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?l logical conditions
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?b branch on bit conditions
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?x shift/extract/deposit conditions
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?y shift/extract/deposit conditions followed by nullify for conditional
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branches
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?u unit conditions
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Also these:
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p 5 bit shift count at 26 (to support the SHD instruction) encoded as
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@ -133,10 +148,6 @@ Also these:
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I Source Floating Point Operand Format Completer encoded 1 bits at 20
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(for 0xe format FP instructions)
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G Destination Floating Point Operand Format Completer encoded 2 bits at 18
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M Floating-Point Compare Conditions (encoded as 5 bits at 31)
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? non-negated/negated compare/subtract conditions.
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@ non-negated/negated add conditions.
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! non-negated add conditions.
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s 2 bit space specifier at 17.
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b register field at 10.
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@ -148,7 +159,6 @@ Also these:
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Q 5 bit immediate value at 10 (a bit position specified in
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the bb instruction. It's the same as r above, except the
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value is in a different location)
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| shift/extract/deposit conditions when used in a conditional branch
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And these (PJH) for PA-89 F.P. registers and instructions:
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@ -163,8 +173,7 @@ And these (PJH) for PA-89 F.P. registers and instructions:
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8 5 bit register field at 20 (used in 'fmpyadd' and 'fmpysub')
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9 5 bit register field at 25 (used in 'fmpyadd' and 'fmpysub')
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H Floating Point Operand Format at 26 for 'fmpyadd' and 'fmpysub'
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(very similar to 'F')
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*/
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(very similar to 'F') */
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/* List of characters not to put a space after. Note that
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@ -187,22 +196,22 @@ static const struct pa_opcode pa_opcodes[] =
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{ "b", 0xe8000000, 0xffe0e000, "nW", pa10}, /* bl foo,r0 */
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{ "ldi", 0x34000000, 0xffe0c000, "j,x", pa10}, /* ldo val(r0),r */
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{ "comib", 0x84000000, 0xfc000000, "?n5,b,w", pa10}, /* comib{tf}*/
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{ "comib", 0x84000000, 0xfc000000, "?nn5,b,w", pa10}, /* comib{tf}*/
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/* This entry is for the disassembler only. It will never be used by
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assembler. */
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{ "comib", 0x8c000000, 0xfc000000, "?n5,b,w", pa10}, /* comib{tf}*/
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{ "comb", 0x80000000, 0xfc000000, "?nx,b,w", pa10}, /* comb{tf} */
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{ "comib", 0x8c000000, 0xfc000000, "?nn5,b,w", pa10}, /* comib{tf}*/
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{ "comb", 0x80000000, 0xfc000000, "?nnx,b,w", pa10}, /* comb{tf} */
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/* This entry is for the disassembler only. It will never be used by
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assembler. */
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{ "comb", 0x88000000, 0xfc000000, "?nx,b,w", pa10}, /* comb{tf} */
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{ "addb", 0xa0000000, 0xfc000000, "@nx,b,w", pa10}, /* addb{tf} */
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{ "comb", 0x88000000, 0xfc000000, "?nnx,b,w", pa10}, /* comb{tf} */
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{ "addb", 0xa0000000, 0xfc000000, "?@nx,b,w", pa10}, /* addb{tf} */
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/* This entry is for the disassembler only. It will never be used by
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assembler. */
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{ "addb", 0xa8000000, 0xfc000000, "@nx,b,w", pa10},
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{ "addib", 0xa4000000, 0xfc000000, "@n5,b,w", pa10}, /* addib{tf}*/
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{ "addb", 0xa8000000, 0xfc000000, "?@nx,b,w", pa10},
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{ "addib", 0xa4000000, 0xfc000000, "?@n5,b,w", pa10}, /* addib{tf}*/
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/* This entry is for the disassembler only. It will never be used by
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assembler. */
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{ "addib", 0xac000000, 0xfc000000, "@n5,b,w", pa10}, /* addib{tf}*/
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{ "addib", 0xac000000, 0xfc000000, "?@n5,b,w", pa10}, /* addib{tf}*/
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{ "nop", 0x08000240, 0xffffffff, "", pa10}, /* or 0,0,0 */
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{ "copy", 0x08000240, 0xffe0ffe0, "x,t", pa10}, /* or r,0,t */
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{ "mtsar", 0x01601840, 0xffe0ffff, "x", pa10}, /* mtctl r,cr11 */
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@ -265,79 +274,79 @@ static const struct pa_opcode pa_opcodes[] =
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{ "bv", 0xe800c000, 0xfc00fffd, "n(b)", pa10},
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{ "be", 0xe0000000, 0xfc000000, "nz(S,b)", pa10},
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{ "ble", 0xe4000000, 0xfc000000, "nz(S,b)", pa10},
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{ "movb", 0xc8000000, 0xfc000000, "|nx,b,w", pa10},
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{ "movib", 0xcc000000, 0xfc000000, "|n5,b,w", pa10},
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{ "combt", 0x80000000, 0xfc000000, "<nx,b,w", pa10},
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{ "combf", 0x88000000, 0xfc000000, "<nx,b,w", pa10},
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{ "comibt", 0x84000000, 0xfc000000, "<n5,b,w", pa10},
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{ "comibf", 0x8c000000, 0xfc000000, "<n5,b,w", pa10},
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{ "addbt", 0xa0000000, 0xfc000000, "!nx,b,w", pa10},
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{ "addbf", 0xa8000000, 0xfc000000, "!nx,b,w", pa10},
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{ "addibt", 0xa4000000, 0xfc000000, "!n5,b,w", pa10},
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{ "addibf", 0xac000000, 0xfc000000, "!n5,b,w", pa10},
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{ "bb", 0xc4004000, 0xfc004000, "~nx,Q,w", pa10},
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{ "bvb", 0xc0004000, 0xffe04000, "~nx,w", pa10},
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{ "movb", 0xc8000000, 0xfc000000, "?ynx,b,w", pa10},
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{ "movib", 0xcc000000, 0xfc000000, "?yn5,b,w", pa10},
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{ "combt", 0x80000000, 0xfc000000, "?tnx,b,w", pa10},
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{ "combf", 0x88000000, 0xfc000000, "?tnx,b,w", pa10},
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{ "comibt", 0x84000000, 0xfc000000, "?tn5,b,w", pa10},
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{ "comibf", 0x8c000000, 0xfc000000, "?tn5,b,w", pa10},
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{ "addbt", 0xa0000000, 0xfc000000, "?dnx,b,w", pa10},
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{ "addbf", 0xa8000000, 0xfc000000, "?dnx,b,w", pa10},
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{ "addibt", 0xa4000000, 0xfc000000, "?dn5,b,w", pa10},
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{ "addibf", 0xac000000, 0xfc000000, "?dn5,b,w", pa10},
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{ "bb", 0xc4004000, 0xfc004000, "?bnx,Q,w", pa10},
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{ "bvb", 0xc0004000, 0xffe04000, "?bnx,w", pa10},
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{ "clrbts", 0xe8004005, 0xffffffff, "", pa20, FLAG_STRICT},
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{ "pushnom", 0xe8004001, 0xffffffff, "", pa20, FLAG_STRICT},
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{ "pushbts", 0xe8004001, 0xffe0ffff, "x", pa20, FLAG_STRICT},
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/* Computation Instructions */
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{ "comclr", 0x08000880, 0xfc000fe0, "ax,b,t", pa10},
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{ "or", 0x08000240, 0xfc000fe0, "&x,b,t", pa10},
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{ "xor", 0x08000280, 0xfc000fe0, "&x,b,t", pa10},
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{ "and", 0x08000200, 0xfc000fe0, "&x,b,t", pa10},
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{ "andcm", 0x08000000, 0xfc000fe0, "&x,b,t", pa10},
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{ "uxor", 0x08000380, 0xfc000fe0, "Ux,b,t", pa10},
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{ "uaddcm", 0x08000980, 0xfc000fe0, "Ux,b,t", pa10},
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{ "uaddcmt", 0x080009c0, 0xfc000fe0, "Ux,b,t", pa10},
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{ "dcor", 0x08000b80, 0xfc1f0fe0, "Ub,t", pa10},
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{ "idcor", 0x08000bc0, 0xfc1f0fe0, "Ub,t", pa10},
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{ "addi", 0xb4000000, 0xfc000800, "di,b,x", pa10},
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{ "addio", 0xb4000800, 0xfc000800, "di,b,x", pa10},
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{ "addit", 0xb0000000, 0xfc000800, "di,b,x", pa10},
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{ "addito", 0xb0000800, 0xfc000800, "di,b,x", pa10},
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{ "add", 0x08000600, 0xfc000fe0, "dx,b,t", pa10},
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{ "addl", 0x08000a00, 0xfc000fe0, "dx,b,t", pa10},
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{ "addo", 0x08000e00, 0xfc000fe0, "dx,b,t", pa10},
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{ "addc", 0x08000700, 0xfc000fe0, "dx,b,t", pa10},
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{ "addco", 0x08000f00, 0xfc000fe0, "dx,b,t", pa10},
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{ "sub", 0x08000400, 0xfc000fe0, "ax,b,t", pa10},
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{ "subo", 0x08000c00, 0xfc000fe0, "ax,b,t", pa10},
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{ "subb", 0x08000500, 0xfc000fe0, "ax,b,t", pa10},
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{ "subbo", 0x08000d00, 0xfc000fe0, "ax,b,t", pa10},
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{ "subt", 0x080004c0, 0xfc000fe0, "ax,b,t", pa10},
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{ "subto", 0x08000cc0, 0xfc000fe0, "ax,b,t", pa10},
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{ "ds", 0x08000440, 0xfc000fe0, "ax,b,t", pa10},
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{ "subi", 0x94000000, 0xfc000800, "ai,b,x", pa10},
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{ "subio", 0x94000800, 0xfc000800, "ai,b,x", pa10},
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{ "comiclr", 0x90000000, 0xfc000800, "ai,b,x", pa10},
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{ "sh1add", 0x08000640, 0xfc000fe0, "dx,b,t", pa10},
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{ "sh1addl", 0x08000a40, 0xfc000fe0, "dx,b,t", pa10},
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{ "sh1addo", 0x08000e40, 0xfc000fe0, "dx,b,t", pa10},
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{ "sh2add", 0x08000680, 0xfc000fe0, "dx,b,t", pa10},
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{ "sh2addl", 0x08000a80, 0xfc000fe0, "dx,b,t", pa10},
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{ "sh2addo", 0x08000e80, 0xfc000fe0, "dx,b,t", pa10},
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{ "sh3add", 0x080006c0, 0xfc000fe0, "dx,b,t", pa10},
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{ "sh3addl", 0x08000ac0, 0xfc000fe0, "dx,b,t", pa10},
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{ "sh3addo", 0x08000ec0, 0xfc000fe0, "dx,b,t", pa10},
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{ "comclr", 0x08000880, 0xfc000fe0, "?sx,b,t", pa10},
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{ "or", 0x08000240, 0xfc000fe0, "?lx,b,t", pa10},
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{ "xor", 0x08000280, 0xfc000fe0, "?lx,b,t", pa10},
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{ "and", 0x08000200, 0xfc000fe0, "?lx,b,t", pa10},
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{ "andcm", 0x08000000, 0xfc000fe0, "?lx,b,t", pa10},
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{ "uxor", 0x08000380, 0xfc000fe0, "?ux,b,t", pa10},
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{ "uaddcm", 0x08000980, 0xfc000fe0, "?ux,b,t", pa10},
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{ "uaddcmt", 0x080009c0, 0xfc000fe0, "?ux,b,t", pa10},
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{ "dcor", 0x08000b80, 0xfc1f0fe0, "?ub,t", pa10},
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{ "idcor", 0x08000bc0, 0xfc1f0fe0, "?ub,t", pa10},
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{ "addi", 0xb4000000, 0xfc000800, "?ai,b,x", pa10},
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{ "addio", 0xb4000800, 0xfc000800, "?ai,b,x", pa10},
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{ "addit", 0xb0000000, 0xfc000800, "?ai,b,x", pa10},
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{ "addito", 0xb0000800, 0xfc000800, "?ai,b,x", pa10},
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{ "add", 0x08000600, 0xfc000fe0, "?ax,b,t", pa10},
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{ "addl", 0x08000a00, 0xfc000fe0, "?ax,b,t", pa10},
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{ "addo", 0x08000e00, 0xfc000fe0, "?ax,b,t", pa10},
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{ "addc", 0x08000700, 0xfc000fe0, "?ax,b,t", pa10},
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{ "addco", 0x08000f00, 0xfc000fe0, "?ax,b,t", pa10},
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{ "sub", 0x08000400, 0xfc000fe0, "?sx,b,t", pa10},
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{ "subo", 0x08000c00, 0xfc000fe0, "?sx,b,t", pa10},
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{ "subb", 0x08000500, 0xfc000fe0, "?sx,b,t", pa10},
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{ "subbo", 0x08000d00, 0xfc000fe0, "?sx,b,t", pa10},
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{ "subt", 0x080004c0, 0xfc000fe0, "?sx,b,t", pa10},
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{ "subto", 0x08000cc0, 0xfc000fe0, "?sx,b,t", pa10},
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{ "ds", 0x08000440, 0xfc000fe0, "?sx,b,t", pa10},
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{ "subi", 0x94000000, 0xfc000800, "?si,b,x", pa10},
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{ "subio", 0x94000800, 0xfc000800, "?si,b,x", pa10},
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{ "comiclr", 0x90000000, 0xfc000800, "?si,b,x", pa10},
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{ "sh1add", 0x08000640, 0xfc000fe0, "?ax,b,t", pa10},
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{ "sh1addl", 0x08000a40, 0xfc000fe0, "?ax,b,t", pa10},
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{ "sh1addo", 0x08000e40, 0xfc000fe0, "?ax,b,t", pa10},
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{ "sh2add", 0x08000680, 0xfc000fe0, "?ax,b,t", pa10},
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{ "sh2addl", 0x08000a80, 0xfc000fe0, "?ax,b,t", pa10},
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{ "sh2addo", 0x08000e80, 0xfc000fe0, "?ax,b,t", pa10},
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{ "sh3add", 0x080006c0, 0xfc000fe0, "?ax,b,t", pa10},
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{ "sh3addl", 0x08000ac0, 0xfc000fe0, "?ax,b,t", pa10},
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{ "sh3addo", 0x08000ec0, 0xfc000fe0, "?ax,b,t", pa10},
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/* Extract and Deposit Instructions */
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{ "vshd", 0xd0000000, 0xfc001fe0, ">x,b,t", pa10},
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{ "shd", 0xd0000800, 0xfc001c00, ">x,b,p,t", pa10},
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{ "vextru", 0xd0001000, 0xfc001fe0, ">b,T,x", pa10},
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{ "vextrs", 0xd0001400, 0xfc001fe0, ">b,T,x", pa10},
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{ "extru", 0xd0001800, 0xfc001c00, ">b,P,T,x", pa10},
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{ "extrs", 0xd0001c00, 0xfc001c00, ">b,P,T,x", pa10},
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{ "zvdep", 0xd4000000, 0xfc001fe0, ">x,T,b", pa10},
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{ "vdep", 0xd4000400, 0xfc001fe0, ">x,T,b", pa10},
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{ "zdep", 0xd4000800, 0xfc001c00, ">x,p,T,b", pa10},
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{ "dep", 0xd4000c00, 0xfc001c00, ">x,p,T,b", pa10},
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{ "zvdepi", 0xd4001000, 0xfc001fe0, ">5,T,b", pa10},
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{ "vdepi", 0xd4001400, 0xfc001fe0, ">5,T,b", pa10},
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{ "zdepi", 0xd4001800, 0xfc001c00, ">5,p,T,b", pa10},
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{ "depi", 0xd4001c00, 0xfc001c00, ">5,p,T,b", pa10},
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{ "vshd", 0xd0000000, 0xfc001fe0, "?xx,b,t", pa10},
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{ "shd", 0xd0000800, 0xfc001c00, "?xx,b,p,t", pa10},
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{ "vextru", 0xd0001000, 0xfc001fe0, "?xb,T,x", pa10},
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{ "vextrs", 0xd0001400, 0xfc001fe0, "?xb,T,x", pa10},
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{ "extru", 0xd0001800, 0xfc001c00, "?xb,P,T,x", pa10},
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{ "extrs", 0xd0001c00, 0xfc001c00, "?xb,P,T,x", pa10},
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{ "zvdep", 0xd4000000, 0xfc001fe0, "?xx,T,b", pa10},
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{ "vdep", 0xd4000400, 0xfc001fe0, "?xx,T,b", pa10},
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{ "zdep", 0xd4000800, 0xfc001c00, "?xx,p,T,b", pa10},
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{ "dep", 0xd4000c00, 0xfc001c00, "?xx,p,T,b", pa10},
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{ "zvdepi", 0xd4001000, 0xfc001fe0, "?x5,T,b", pa10},
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{ "vdepi", 0xd4001400, 0xfc001fe0, "?x5,T,b", pa10},
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{ "zdepi", 0xd4001800, 0xfc001c00, "?x5,p,T,b", pa10},
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{ "depi", 0xd4001c00, 0xfc001c00, "?x5,p,T,b", pa10},
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/* System Control Instructions */
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@ -470,8 +479,8 @@ static const struct pa_opcode pa_opcodes[] =
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{ "fneg", 0x3800c000, 0xfc1fe720, "FJ,v", pa20, FLAG_STRICT},
|
||||
{ "fnegabs", 0x3000e000, 0xfc1fe7e0, "FE,v", pa20, FLAG_STRICT},
|
||||
{ "fnegabs", 0x3800e000, 0xfc1fe720, "FJ,v", pa20, FLAG_STRICT},
|
||||
{ "fcmp", 0x30000400, 0xfc00e7e0, "FME,X", pa10},
|
||||
{ "fcmp", 0x38000400, 0xfc00e720, "IMJ,K", pa10},
|
||||
{ "fcmp", 0x30000400, 0xfc00e7e0, "F?fE,X", pa10},
|
||||
{ "fcmp", 0x38000400, 0xfc00e720, "I?fJ,K", pa10},
|
||||
{ "xmpyu", 0x38004700, 0xfc00e720, "J,K,v", pa11},
|
||||
{ "fmpyadd", 0x18000000, 0xfc000000, "H4,6,7,9,8", pa11},
|
||||
{ "fmpysub", 0x98000000, 0xfc000000, "H4,6,7,9,8", pa11},
|
||||
|
|
|
|||
Loading…
Reference in New Issue