(BITOP): Dissallow operations on @aa:16 and @aa:32 except for the H8S.
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@ -1,3 +1,7 @@
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2004-01-09 Anil Paranjpe <anilp1@KPITCummins.com>
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* h8300.h (BITOP): Dissallow operations on @aa:16 and @aa:32
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except for the H8S.
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For older changes see ChangeLog-9103
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For older changes see ChangeLog-9103
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@ -1,5 +1,5 @@
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/* Opcode table for the H8/300
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/* Opcode table for the H8/300
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Copyright 1991, 1992, 1993, 1994, 1996, 1997, 1998, 2000, 2002, 2003
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Copyright 1991, 1992, 1993, 1994, 1996, 1997, 1998, 2000, 2002, 2003, 2004
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Free Software Foundation, Inc.
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Free Software Foundation, Inc.
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Written by Steve Chamberlain <sac@cygnus.com>.
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Written by Steve Chamberlain <sac@cygnus.com>.
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@ -26,7 +26,8 @@
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typedef int op_type;
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typedef int op_type;
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enum h8_flags {
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enum h8_flags
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{
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L_2 = 0x10,
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L_2 = 0x10,
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L_3 = 0x20,
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L_3 = 0x20,
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/* 3 bit constant, zero not accepted. */
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/* 3 bit constant, zero not accepted. */
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@ -225,7 +226,8 @@ enum h8_flags {
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#endif
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#endif
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};
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};
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enum ctrlreg {
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enum ctrlreg
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{
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C_CCR = 0,
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C_CCR = 0,
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C_EXR = 1,
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C_EXR = 1,
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C_MACH = 2,
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C_MACH = 2,
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@ -247,7 +249,8 @@ struct arg
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};
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};
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/* Availability of instructions on processor models. */
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/* Availability of instructions on processor models. */
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enum h8_model {
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enum h8_model
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{
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AV_H8,
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AV_H8,
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AV_H8H,
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AV_H8H,
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AV_H8S,
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AV_H8S,
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@ -304,7 +307,7 @@ struct h8_opcode
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#define A24LIST L_24, DATA5
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#define A24LIST L_24, DATA5
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#define A32LIST L_32, DATA7
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#define A32LIST L_32, DATA7
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/* Extended Operand Prefixes: */
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/* Extended Operand Prefixes: */
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#define PREFIX_010 0x0, 0x1, 0x0
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#define PREFIX_010 0x0, 0x1, 0x0
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#define PREFIX_015 0x0, 0x1, 0x5
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#define PREFIX_015 0x0, 0x1, 0x5
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@ -383,7 +386,7 @@ struct h8_opcode
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#define PREFIX_7A7C 0x7, 0xa, 0x7, 0xc
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#define PREFIX_7A7C 0x7, 0xa, 0x7, 0xc
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/* Source standard fragment: */
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/* Source standard fragment: */
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#define FROM_IND 0, RSIND
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#define FROM_IND 0, RSIND
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#define FROM_POSTINC 8, RSPOSTINC
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#define FROM_POSTINC 8, RSPOSTINC
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#define FROM_POSTDEC 10, RSPOSTDEC
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#define FROM_POSTDEC 10, RSPOSTDEC
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@ -401,7 +404,7 @@ struct h8_opcode
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#define FROM_ABS16 4, B30 | IGNORE
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#define FROM_ABS16 4, B30 | IGNORE
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#define FROM_ABS32 4, B31 | IGNORE
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#define FROM_ABS32 4, B31 | IGNORE
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/* Destination standard fragment: */
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/* Destination standard fragment: */
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#define TO_IND 0, RDIND
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#define TO_IND 0, RDIND
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#define TO_IND_MOV 0, RDIND | B30
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#define TO_IND_MOV 0, RDIND | B30
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#define TO_POSTINC 8, RDPOSTINC
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#define TO_POSTINC 8, RDPOSTINC
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@ -425,7 +428,7 @@ struct h8_opcode
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#define TO_ABS16 4, B30 | IGNORE
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#define TO_ABS16 4, B30 | IGNORE
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#define TO_ABS32 4, B31 | IGNORE
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#define TO_ABS32 4, B31 | IGNORE
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/* Source fragment for three-word instruction: */
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/* Source fragment for three-word instruction: */
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#define TFROM_IND 6, 9, B30 | RSIND, 12
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#define TFROM_IND 6, 9, B30 | RSIND, 12
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#define TFROM_DISP2 6, 9, B30 | DISPREG, 12
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#define TFROM_DISP2 6, 9, B30 | DISPREG, 12
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#define TFROM_ABS16 6, 11, B30 | B20 | B10 | IGNORE, 12, ABS16LIST
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#define TFROM_ABS16 6, 11, B30 | B20 | B10 | IGNORE, 12, ABS16LIST
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@ -445,7 +448,7 @@ struct h8_opcode
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#define TFROM_ABS16W 6, 11, 1, 12, ABS16LIST
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#define TFROM_ABS16W 6, 11, 1, 12, ABS16LIST
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#define TFROM_ABS32W 6, 11, 3, 12, ABS32LIST
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#define TFROM_ABS32W 6, 11, 3, 12, ABS32LIST
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/* Source fragment for three-word instruction: */
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/* Source fragment for three-word instruction: */
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#define TFROM_IND_B 6, 8, B30 | RSIND, 12
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#define TFROM_IND_B 6, 8, B30 | RSIND, 12
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#define TFROM_ABS16_B 6, 10, B30 | B20 | B10 | IGNORE, 12, ABS16LIST
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#define TFROM_ABS16_B 6, 10, B30 | B20 | B10 | IGNORE, 12, ABS16LIST
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#define TFROM_ABS32_B 6, 10, B30 | B20 | B11 | IGNORE, 12, ABS32LIST
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#define TFROM_ABS32_B 6, 10, B30 | B20 | B11 | IGNORE, 12, ABS32LIST
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@ -467,7 +470,7 @@ struct h8_opcode
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#define TFROM_ABS16W_B 6, 10, 1, 12, ABS16LIST
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#define TFROM_ABS16W_B 6, 10, 1, 12, ABS16LIST
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#define TFROM_ABS32W_B 6, 10, 3, 12, ABS32LIST
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#define TFROM_ABS32W_B 6, 10, 3, 12, ABS32LIST
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/* Extended Operand Class Expanders: */
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/* Extended Operand Class Expanders: */
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#define MOVFROM_STD(CODE, PREFIX, NAME, SRC, SRC_INFIX) \
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#define MOVFROM_STD(CODE, PREFIX, NAME, SRC, SRC_INFIX) \
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{CODE, AV_H8SX, 0, NAME, {{SRC, RDIND, E}}, {{PREFIX, SRC_INFIX, TO_IND_MOV, E}}}, \
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{CODE, AV_H8SX, 0, NAME, {{SRC, RDIND, E}}, {{PREFIX, SRC_INFIX, TO_IND_MOV, E}}}, \
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@ -577,9 +580,7 @@ struct h8_opcode
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{CODE, AV_H8, 4, NAME, {{ABS16SRC, DST, E}}, {{ 6, OP2, 0, DST, RELAX16 | ABS16LIST, E}}}, \
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{CODE, AV_H8, 4, NAME, {{ABS16SRC, DST, E}}, {{ 6, OP2, 0, DST, RELAX16 | ABS16LIST, E}}}, \
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{CODE, AV_H8, 6, NAME, {{ABS32SRC, DST, E}}, {{ 6, OP2, 2, DST, MEMRELAX | ABS32LIST, E}}}
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{CODE, AV_H8, 6, NAME, {{ABS32SRC, DST, E}}, {{ 6, OP2, 2, DST, MEMRELAX | ABS32LIST, E}}}
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/*
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/* Expansion macros for two-word (plus data) instructions. */
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* Expansion macros for two-word (plus data) instructions.
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*/
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/* Expansion from one source to "standard" destinations. */
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/* Expansion from one source to "standard" destinations. */
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#define EXPAND2_STD_SRC(CODE, WEIGHT, NAME, SRC, PREFIX, NIB1, NIB2) \
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#define EXPAND2_STD_SRC(CODE, WEIGHT, NAME, SRC, PREFIX, NIB1, NIB2) \
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@ -661,9 +662,7 @@ struct h8_opcode
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{CODE, AV_H8SX, 0, NAME, {{RSIND, INDEXW32D, E}}, {{0x7, 0xc, BIT | RSIND, 0x5, TO_DISP32W, OPCODE, IGNORE, DSTDISP32LIST, E}}}, \
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{CODE, AV_H8SX, 0, NAME, {{RSIND, INDEXW32D, E}}, {{0x7, 0xc, BIT | RSIND, 0x5, TO_DISP32W, OPCODE, IGNORE, DSTDISP32LIST, E}}}, \
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{CODE, AV_H8SX, 0, NAME, {{RSIND, INDEXL32D, E}}, {{0x7, 0xc, BIT | RSIND, 0x5, TO_DISP32L, OPCODE, IGNORE, DSTDISP32LIST, E}}}
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{CODE, AV_H8SX, 0, NAME, {{RSIND, INDEXL32D, E}}, {{0x7, 0xc, BIT | RSIND, 0x5, TO_DISP32L, OPCODE, IGNORE, DSTDISP32LIST, E}}}
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/*
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/* Expansion macros for three word (plus data) instructions. */
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* Expansion macros for three word (plus data) instructions.
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*/
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#define EXPAND3_STD_SRC(CODE, WEIGHT, NAME, SRC, PREFIX, INFIX, OPCODE) \
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#define EXPAND3_STD_SRC(CODE, WEIGHT, NAME, SRC, PREFIX, INFIX, OPCODE) \
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{CODE, AV_H8SX, 0, NAME, {{SRC, RDPOSTINC, E}}, {{PREFIX, INFIX, 8, RDPOSTINC, OPCODE, B30 | IGNORE, E}}}, \
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{CODE, AV_H8SX, 0, NAME, {{SRC, RDPOSTINC, E}}, {{PREFIX, INFIX, 8, RDPOSTINC, OPCODE, B30 | IGNORE, E}}}, \
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@ -749,9 +748,7 @@ struct h8_opcode
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EXPAND3_L_SRC (CODE, 4, NAME, INDEXL32, PREFIX_78R7W, TFROM_DISP32L_B, OPCODE)
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EXPAND3_L_SRC (CODE, 4, NAME, INDEXL32, PREFIX_78R7W, TFROM_DISP32L_B, OPCODE)
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/*
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/* Use the expansion macros to fill out the opcode table. */
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* Use the expansion macros to fill out the opcode table.
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*/
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#define EXPAND_FROM_REG8(CODE, NAME, OP1, OP2, OP3) \
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#define EXPAND_FROM_REG8(CODE, NAME, OP1, OP2, OP3) \
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{CODE, AV_H8SX, 0, NAME, {{RS8, RDIND, E}}, {{0x7, 0xd, B30 | RDIND, IGNORE, OP1, OP2, RS8, IGNORE, E}}}, \
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{CODE, AV_H8SX, 0, NAME, {{RS8, RDIND, E}}, {{0x7, 0xd, B30 | RDIND, IGNORE, OP1, OP2, RS8, IGNORE, E}}}, \
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@ -892,16 +889,14 @@ struct h8_opcode
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EXPAND_STD_MATRIX_L (CODE, NAME, OP1)
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EXPAND_STD_MATRIX_L (CODE, NAME, OP1)
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/*
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/* Old expanders: */
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* Old expanders:
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*/
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#define BITOP(code, imm, name, op00, op01, op10, op11, op20, op21, op30, op4) \
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#define BITOP(code, imm, name, op00, op01, op10, op11, op20, op21, op30, op4) \
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{code, AV_H8, 2, name, {{imm, RD8, E}}, {{op00, op01, imm, RD8, E}}}, \
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{code, AV_H8, 2, name, {{imm, RD8, E}}, {{op00, op01, imm, RD8, E}}}, \
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{code, AV_H8, 6, name, {{imm, RDIND, E}}, {{op10, op11, B30 | RDIND, 0, op00, op01, imm, 0, E}}}, \
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{code, AV_H8, 6, name, {{imm, RDIND, E}}, {{op10, op11, B30 | RDIND, 0, op00, op01, imm, 0, E}}}, \
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{code, AV_H8, 6, name, {{imm, ABS8DST, E}}, {{op20, op21, DSTABS8LIST, op00, op01, imm, 0, E}}}, \
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{code, AV_H8, 6, name, {{imm, ABS8DST, E}}, {{op20, op21, DSTABS8LIST, op00, op01, imm, 0, E}}}, \
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{code, AV_H8H, 6, name, {{imm, ABS16DST, E}}, {{0x6, 0xa, 0x1, op30, DST | ABS16LIST, op00, op01, imm, op4, E}}}, \
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{code, AV_H8S, 6, name, {{imm, ABS16DST, E}}, {{0x6, 0xa, 0x1, op30, DST | ABS16LIST, op00, op01, imm, op4, E}}}, \
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{code, AV_H8H, 6, name, {{imm, ABS32DST, E}}, {{0x6, 0xa, 0x3, op30, DST | ABS32LIST, op00, op01, imm, op4, E}}}
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{code, AV_H8S, 6, name, {{imm, ABS32DST, E}}, {{0x6, 0xa, 0x3, op30, DST | ABS32LIST, op00, op01, imm, op4, E}}}
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#define BITOP_B(code, imm, name, op00, op01, op10, op11, op20, op21, op30, op4) \
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#define BITOP_B(code, imm, name, op00, op01, op10, op11, op20, op21, op30, op4) \
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{code, AV_H8SX, 0, name, {{imm, RDIND, E}}, {{op10, op11, B30 | RDIND, 0, op00, op01, imm, op4, E}}}, \
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{code, AV_H8SX, 0, name, {{imm, RDIND, E}}, {{op10, op11, B30 | RDIND, 0, op00, op01, imm, op4, E}}}, \
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@ -1047,11 +1042,12 @@ struct h8_opcode
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#define PREFIXLDC 0x0, 0x1, 0x4, B30 | CCR_EXR | DST
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#define PREFIXLDC 0x0, 0x1, 0x4, B30 | CCR_EXR | DST
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#define PREFIXSTC 0x0, 0x1, 0x4, B30 | CCR_EXR | SRC
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#define PREFIXSTC 0x0, 0x1, 0x4, B30 | CCR_EXR | SRC
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#define O(op, size) (op*4+size)
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#define O(op, size) (op * 4 + size)
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#define OP_SIZE(HOW) (HOW % 4)
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#define OP_SIZE(HOW) (HOW % 4)
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#define OP_KIND(HOW) (HOW / 4)
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#define OP_KIND(HOW) (HOW / 4)
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enum h8_asm_codes {
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enum h8_asm_codes
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{
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O_RECOMPILE = 0,
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O_RECOMPILE = 0,
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O_ADD,
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O_ADD,
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O_ADDX,
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O_ADDX,
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/* End of System Call specific Changes. */
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/* End of System Call specific Changes. */
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};
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};
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enum h8_size {
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enum h8_size
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{
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SB = 0,
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SB = 0,
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SW = 1,
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SW = 1,
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SL = 2,
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SL = 2,
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