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2006-01-31 Paul Brook <paul@codesourcery.com> 

Richard Earnshaw <rearnsha@arm.com>

	* gas/config/tc-arm.c: Use arm_feature_set.
	(arm_ext_*, arm_arch_full, arm_arch_t2, arm_arch_none,
	arm_cext_iwmmxt, arm_cext_xscale, arm_cext_maverick, fpu_fpa_ext_v1,
	fpu_fpa_ext_v2, fpu_vfp_ext_v1xd, fpu_vfp_ext_v1, fpu_vfp_ext_v2):
	New variables.
	(insns): Use them.
	(md_atof, opcode_select, opcode_select, md_assemble, md_assemble,
	md_begin, arm_parse_extension, arm_parse_cpu, arm_parse_arch,
	arm_parse_fpu, arm_parse_float_abi, aeabi_set_public_attributes,
	s_arm_cpu, s_arm_arch, s_arm_fpu): Use macros for accessing CPU
	feature flags.
	(arm_legacy_option_table, arm_option_cpu_value_table): New types.
	(arm_opts): Move old cpu/arch options from here...
	(arm_legacy_opts): ... to here.
	(md_parse_option): Search arm_legacy_opts.
	(arm_cpus, arm_archs, arm_extensions, arm_fpus)
	(arm_float_abis, arm_eabis): Make const.

	* include/opcode/arm.h: Use ARM_CPU_FEATURE.
	(ARM_AEXT_*, FPU_ENDIAN_PURE, FPU_VFP_HARD): New.
	(arm_feature_set): Change to a structure.
	(ARM_CPU_HAS_FEATURE, ARM_MERGE_FEATURE_SETS, ARM_CLEAR_FEATURE,
	ARM_FEATURE): New macros.
This commit is contained in:
Paul Brook 2006-01-31 14:11:13 +00:00
parent 832dd7e69f
commit 82cac98f3e
2 changed files with 121 additions and 48 deletions
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9
include/opcode/ChangeLog
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@ -1,3 +1,12 @@
2006-01-31 Paul Brook <paul@codesourcery.com>
Richard Earnshaw <rearnsha@arm.com>
* arm.h: Use ARM_CPU_FEATURE.
(ARM_AEXT_*, FPU_ENDIAN_PURE, FPU_VFP_HARD): New.
(arm_feature_set): Change to a structure.
(ARM_CPU_HAS_FEATURE, ARM_MERGE_FEATURE_SETS, ARM_CLEAR_FEATURE,
ARM_FEATURE): New macros.
2005-12-07 Hans-Peter Nilsson <hp@axis.com> 2005-12-07 Hans-Peter Nilsson <hp@axis.com>
* cris.h (MOVE_M_TO_PREG_OPCODE, MOVE_M_TO_PREG_ZBITS) * cris.h (MOVE_M_TO_PREG_OPCODE, MOVE_M_TO_PREG_ZBITS)

160
include/opcode/arm.h
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@ -37,65 +37,129 @@
#define ARM_EXT_V6T2 0x00008000 /* Thumb-2. */ #define ARM_EXT_V6T2 0x00008000 /* Thumb-2. */
/* Co-processor space extensions. */ /* Co-processor space extensions. */
#define ARM_CEXT_XSCALE 0x00800000 /* Allow MIA etc. */ #define ARM_CEXT_XSCALE 0x00000001 /* Allow MIA etc. */
#define ARM_CEXT_MAVERICK 0x00400000 /* Use Cirrus/DSP coprocessor. */ #define ARM_CEXT_MAVERICK 0x00000002 /* Use Cirrus/DSP coprocessor. */
#define ARM_CEXT_IWMMXT 0x00200000 /* Intel Wireless MMX technology coprocessor. */ #define ARM_CEXT_IWMMXT 0x00000004 /* Intel Wireless MMX technology coprocessor. */
#define FPU_ENDIAN_PURE 0x80000000 /* Pure-endian doubles. */
#define FPU_ENDIAN_BIG 0 /* Double words-big-endian. */
#define FPU_FPA_EXT_V1 0x40000000 /* Base FPA instruction set. */
#define FPU_FPA_EXT_V2 0x20000000 /* LFM/SFM. */
#define FPU_MAVERICK 0x10000000 /* Cirrus Maverick. */
#define FPU_VFP_EXT_V1xD 0x08000000 /* Base VFP instruction set. */
#define FPU_VFP_EXT_V1 0x04000000 /* Double-precision insns. */
#define FPU_VFP_EXT_V2 0x02000000 /* ARM10E VFPr1. */
/* Architectures are the sum of the base and extensions. The ARM ARM (rev E) /* Architectures are the sum of the base and extensions. The ARM ARM (rev E)
defines the following: ARMv3, ARMv3M, ARMv4xM, ARMv4, ARMv4TxM, ARMv4T, defines the following: ARMv3, ARMv3M, ARMv4xM, ARMv4, ARMv4TxM, ARMv4T,
ARMv5xM, ARMv5, ARMv5TxM, ARMv5T, ARMv5TExP, ARMv5TE. To these we add ARMv5xM, ARMv5, ARMv5TxM, ARMv5T, ARMv5TExP, ARMv5TE. To these we add
three more to cover cores prior to ARM6. Finally, there are cores which three more to cover cores prior to ARM6. Finally, there are cores which
implement further extensions in the co-processor space. */ implement further extensions in the co-processor space. */
#define ARM_ARCH_V1 ARM_EXT_V1 #define ARM_AEXT_V1 ARM_EXT_V1
#define ARM_ARCH_V2 (ARM_ARCH_V1 | ARM_EXT_V2) #define ARM_AEXT_V2 (ARM_AEXT_V1 | ARM_EXT_V2)
#define ARM_ARCH_V2S (ARM_ARCH_V2 | ARM_EXT_V2S) #define ARM_AEXT_V2S (ARM_AEXT_V2 | ARM_EXT_V2S)
#define ARM_ARCH_V3 (ARM_ARCH_V2S | ARM_EXT_V3) #define ARM_AEXT_V3 (ARM_AEXT_V2S | ARM_EXT_V3)
#define ARM_ARCH_V3M (ARM_ARCH_V3 | ARM_EXT_V3M) #define ARM_AEXT_V3M (ARM_AEXT_V3 | ARM_EXT_V3M)
#define ARM_ARCH_V4xM (ARM_ARCH_V3 | ARM_EXT_V4) #define ARM_AEXT_V4xM (ARM_AEXT_V3 | ARM_EXT_V4)
#define ARM_ARCH_V4 (ARM_ARCH_V3M | ARM_EXT_V4) #define ARM_AEXT_V4 (ARM_AEXT_V3M | ARM_EXT_V4)
#define ARM_ARCH_V4TxM (ARM_ARCH_V4xM | ARM_EXT_V4T) #define ARM_AEXT_V4TxM (ARM_AEXT_V4xM | ARM_EXT_V4T)
#define ARM_ARCH_V4T (ARM_ARCH_V4 | ARM_EXT_V4T) #define ARM_AEXT_V4T (ARM_AEXT_V4 | ARM_EXT_V4T)
#define ARM_ARCH_V5xM (ARM_ARCH_V4xM | ARM_EXT_V5) #define ARM_AEXT_V5xM (ARM_AEXT_V4xM | ARM_EXT_V5)
#define ARM_ARCH_V5 (ARM_ARCH_V4 | ARM_EXT_V5) #define ARM_AEXT_V5 (ARM_AEXT_V4 | ARM_EXT_V5)
#define ARM_ARCH_V5TxM (ARM_ARCH_V5xM | ARM_EXT_V4T | ARM_EXT_V5T) #define ARM_AEXT_V5TxM (ARM_AEXT_V5xM | ARM_EXT_V4T | ARM_EXT_V5T)
#define ARM_ARCH_V5T (ARM_ARCH_V5 | ARM_EXT_V4T | ARM_EXT_V5T) #define ARM_AEXT_V5T (ARM_AEXT_V5 | ARM_EXT_V4T | ARM_EXT_V5T)
#define ARM_ARCH_V5TExP (ARM_ARCH_V5T | ARM_EXT_V5ExP) #define ARM_AEXT_V5TExP (ARM_AEXT_V5T | ARM_EXT_V5ExP)
#define ARM_ARCH_V5TE (ARM_ARCH_V5TExP | ARM_EXT_V5E) #define ARM_AEXT_V5TE (ARM_AEXT_V5TExP | ARM_EXT_V5E)
#define ARM_ARCH_V5TEJ (ARM_ARCH_V5TE | ARM_EXT_V5J) #define ARM_AEXT_V5TEJ (ARM_AEXT_V5TE | ARM_EXT_V5J)
#define ARM_ARCH_V6 (ARM_ARCH_V5TEJ | ARM_EXT_V6) #define ARM_AEXT_V6 (ARM_AEXT_V5TEJ | ARM_EXT_V6)
#define ARM_ARCH_V6K (ARM_ARCH_V6 | ARM_EXT_V6K) #define ARM_AEXT_V6K (ARM_AEXT_V6 | ARM_EXT_V6K)
#define ARM_ARCH_V6Z (ARM_ARCH_V6 | ARM_EXT_V6Z) #define ARM_AEXT_V6Z (ARM_AEXT_V6 | ARM_EXT_V6Z)
#define ARM_ARCH_V6ZK (ARM_ARCH_V6 | ARM_EXT_V6K | ARM_EXT_V6Z) #define ARM_AEXT_V6ZK (ARM_AEXT_V6 | ARM_EXT_V6K | ARM_EXT_V6Z)
#define ARM_ARCH_V6T2 (ARM_ARCH_V6 | ARM_EXT_V6T2) #define ARM_AEXT_V6T2 (ARM_AEXT_V6 | ARM_EXT_V6T2)
#define ARM_ARCH_V6KT2 (ARM_ARCH_V6 | ARM_EXT_V6T2 | ARM_EXT_V6K) #define ARM_AEXT_V6KT2 (ARM_AEXT_V6 | ARM_EXT_V6T2 | ARM_EXT_V6K)
#define ARM_ARCH_V6ZT2 (ARM_ARCH_V6 | ARM_EXT_V6T2 | ARM_EXT_V6Z) #define ARM_AEXT_V6ZT2 (ARM_AEXT_V6 | ARM_EXT_V6T2 | ARM_EXT_V6Z)
#define ARM_ARCH_V6ZKT2 (ARM_ARCH_V6 | ARM_EXT_V6T2 | ARM_EXT_V6K | ARM_EXT_V6Z) #define ARM_AEXT_V6ZKT2 (ARM_AEXT_V6 | ARM_EXT_V6T2 | ARM_EXT_V6K | ARM_EXT_V6Z)
/* Processors with specific extensions in the co-processor space. */ /* Processors with specific extensions in the co-processor space. */
#define ARM_ARCH_XSCALE (ARM_ARCH_V5TE | ARM_CEXT_XSCALE) #define ARM_ARCH_XSCALE ARM_FEATURE (ARM_AEXT_V5TE, ARM_CEXT_XSCALE)
#define ARM_ARCH_IWMMXT (ARM_ARCH_XSCALE | ARM_CEXT_IWMMXT) #define ARM_ARCH_IWMMXT \
ARM_FEATURE (ARM_AEXT_V5TE, ARM_CEXT_XSCALE | ARM_CEXT_IWMMXT)
#define FPU_FPA_EXT_V1 0x80000000 /* Base FPA instruction set. */ #define FPU_VFP_V1xD (FPU_VFP_EXT_V1xD | FPU_ENDIAN_PURE)
#define FPU_FPA_EXT_V2 0x40000000 /* LFM/SFM. */ #define FPU_VFP_V1 (FPU_VFP_V1xD | FPU_VFP_EXT_V1)
#define FPU_VFP_EXT_NONE 0x20000000 /* Use VFP word-ordering. */ #define FPU_VFP_V2 (FPU_VFP_V1 | FPU_VFP_EXT_V2)
#define FPU_VFP_EXT_V1xD 0x10000000 /* Base VFP instruction set. */ #define FPU_VFP_HARD (FPU_VFP_EXT_V1xD | FPU_VFP_EXT_V1 | FPU_VFP_EXT_V2)
#define FPU_VFP_EXT_V1 0x08000000 /* Double-precision insns. */ #define FPU_FPA (FPU_FPA_EXT_V1 | FPU_FPA_EXT_V2)
#define FPU_VFP_EXT_V2 0x04000000 /* ARM10E VFPr1. */
#define FPU_MAVERICK 0x02000000 /* Cirrus Maverick. */
#define FPU_NONE 0
#define FPU_ARCH_FPE FPU_FPA_EXT_V1 /* Deprecated */
#define FPU_ARCH_FPA (FPU_ARCH_FPE | FPU_FPA_EXT_V2) #define FPU_ARCH_VFP ARM_FEATURE (0, FPU_ENDIAN_PURE)
#define FPU_ARCH_VFP FPU_VFP_EXT_NONE #define FPU_ARCH_FPE ARM_FEATURE (0, FPU_FPA_EXT_V1)
#define FPU_ARCH_VFP_V1xD (FPU_VFP_EXT_V1xD | FPU_VFP_EXT_NONE) #define FPU_ARCH_FPA ARM_FEATURE (0, FPU_FPA)
#define FPU_ARCH_VFP_V1 (FPU_ARCH_VFP_V1xD | FPU_VFP_EXT_V1)
#define FPU_ARCH_VFP_V2 (FPU_ARCH_VFP_V1 | FPU_VFP_EXT_V2)
#define FPU_ARCH_MAVERICK FPU_MAVERICK #define FPU_ARCH_VFP_V1xD ARM_FEATURE (0, FPU_VFP_V1xD)
#define FPU_ARCH_VFP_V1 ARM_FEATURE (0, FPU_VFP_V1)
#define FPU_ARCH_VFP_V2 ARM_FEATURE (0, FPU_VFP_V2)
#define FPU_ARCH_VFP_HARD ARM_FEATURE (0, FPU_VFP_HARD)
#define FPU_ARCH_ENDIAN_PURE ARM_FEATURE (0, FPU_ENDIAN_PURE)
#define FPU_ARCH_MAVERICK ARM_FEATURE (0, FPU_MAVERICK)
#define ARM_ARCH_V1 ARM_FEATURE (ARM_AEXT_V1, 0)
#define ARM_ARCH_V2 ARM_FEATURE (ARM_AEXT_V2, 0)
#define ARM_ARCH_V2S ARM_FEATURE (ARM_AEXT_V2S, 0)
#define ARM_ARCH_V3 ARM_FEATURE (ARM_AEXT_V3, 0)
#define ARM_ARCH_V3M ARM_FEATURE (ARM_AEXT_V3M, 0)
#define ARM_ARCH_V4xM ARM_FEATURE (ARM_AEXT_V4xM, 0)
#define ARM_ARCH_V4 ARM_FEATURE (ARM_AEXT_V4, 0)
#define ARM_ARCH_V4TxM ARM_FEATURE (ARM_AEXT_V4TxM, 0)
#define ARM_ARCH_V4T ARM_FEATURE (ARM_AEXT_V4T, 0)
#define ARM_ARCH_V5xM ARM_FEATURE (ARM_AEXT_V5xM, 0)
#define ARM_ARCH_V5 ARM_FEATURE (ARM_AEXT_V5, 0)
#define ARM_ARCH_V5TxM ARM_FEATURE (ARM_AEXT_V5TxM, 0)
#define ARM_ARCH_V5T ARM_FEATURE (ARM_AEXT_V5T, 0)
#define ARM_ARCH_V5TExP ARM_FEATURE (ARM_AEXT_V5TExP, 0)
#define ARM_ARCH_V5TE ARM_FEATURE (ARM_AEXT_V5TE, 0)
#define ARM_ARCH_V5TEJ ARM_FEATURE (ARM_AEXT_V5TEJ, 0)
#define ARM_ARCH_V6 ARM_FEATURE (ARM_AEXT_V6, 0)
#define ARM_ARCH_V6K ARM_FEATURE (ARM_AEXT_V6K, 0)
#define ARM_ARCH_V6Z ARM_FEATURE (ARM_AEXT_V6Z, 0)
#define ARM_ARCH_V6ZK ARM_FEATURE (ARM_AEXT_V6ZK, 0)
#define ARM_ARCH_V6T2 ARM_FEATURE (ARM_AEXT_V6T2, 0)
#define ARM_ARCH_V6KT2 ARM_FEATURE (ARM_AEXT_V6KT2, 0)
#define ARM_ARCH_V6ZT2 ARM_FEATURE (ARM_AEXT_V6ZT2, 0)
#define ARM_ARCH_V6ZKT2 ARM_FEATURE (ARM_AEXT_V6ZKT2, 0)
/* Some useful combinations: */ /* Some useful combinations: */
#define ARM_ANY 0x0000ffff /* Any basic core. */ #define ARM_ARCH_NONE ARM_FEATURE (0, 0)
#define ARM_ALL 0x00ffffff /* Any core + co-processor */ #define FPU_NONE ARM_FEATURE (0, 0)
#define CPROC_ANY 0x00ff0000 /* Any co-processor */ #define ARM_ANY ARM_FEATURE (-1, 0) /* Any basic core. */
#define FPU_ANY 0xff000000 /* Note this is ~ARM_ALL. */ #define FPU_ANY_HARD ARM_FEATURE (0, FPU_FPA | FPU_VFP_HARD | FPU_MAVERICK)
#define ARM_ARCH_THUMB2 ARM_FEATURE (ARM_EXT_V6T2, 0)
/* There are too many feature bits to fit in a single word, so use a
structure. For simplicity we put all core features in one word and
everything else in the other. */
typedef struct
{
unsigned long core;
unsigned long coproc;
} arm_feature_set;
#define ARM_CPU_HAS_FEATURE(CPU,FEAT) \
(((CPU).core & (FEAT).core) != 0 || ((CPU).coproc & (FEAT).coproc) != 0)
#define ARM_MERGE_FEATURE_SETS(TARG,F1,F2) \
do { \
(TARG).core = (F1).core | (F2).core; \
(TARG).coproc = (F1).coproc | (F2).coproc; \
} while (0)
#define ARM_CLEAR_FEATURE(TARG,F1,F2) \
do { \
(TARG).core = (F1).core &~ (F2).core; \
(TARG).coproc = (F1).coproc &~ (F2).coproc; \
} while (0)
#define ARM_FEATURE(core, coproc) {(core), (coproc)}