2004-04-02 Chris Demetriou <cgd@broadcom.com>

* mips/regs.S (C0_COUNT): Fix comment that kept this from being
        defined.
        * mips/vr4300.S: Use C0_COUNT as appropriate instead of hardcoding $9.
        * mips/vr5xxx.S: Likewise.

libgloss/ChangeLog

@@ -1,3 +1,10 @@
+2004-04-02  Chris Demetriou  <cgd@broadcom.com>
+
+	* mips/regs.S (C0_COUNT): Fix comment that kept this from being
+	defined.
+	* mips/vr4300.S: Use C0_COUNT as appropriate instead of hardcoding $9.
+	* mips/vr5xxx.S: Likewise.
+
 2004-03-23  Eric Christopher  <echristo@redhat.com>
 
 	* frv/crt0.S: Fix comment.

libgloss/mips/regs.S

@@ -66,7 +66,7 @@
 
 #define PHYS_TO_K1(a)   ((unsigned)(a) | K1BASE)
 
-/* Standard Co-Processor 0 register numbers:
+/* Standard Co-Processor 0 registers */
 #define C0_COUNT	$9		/* Count Register */
 #define C0_SR		$12		/* Status Register */
 #define C0_CAUSE	$13		/* last exception description */

libgloss/mips/vr4300.S

@@ -47,7 +47,7 @@ __cpu_timer_poll:
 	j	ra
 	nop			#				{DELAY SLOT}
 1:
-	mfc0	v0, $9		# C0_COUNT:  get current counter value
+	mfc0	v0, C0_COUNT	# get current counter value
 	nop
 	nop
 	# We cannot just do the simple test, of adding our delta onto
@@ -66,7 +66,7 @@ __cpu_timer_poll:
 	# sign-extended to fill the 64bit register value).
 2:
 	# get current counter value:
-	mfc0	v0, $9	# C0_COUNT
+	mfc0	v0, C0_COUNT
 	nop
 	nop
 	# This is an unsigned 32bit subtraction:

libgloss/mips/vr5xxx.S

@@ -64,7 +64,7 @@ __cpu_timer_poll:
 	j	ra
 	nop			#				{DELAY SLOT}
 1:
-	mfc0	v0, $9		# C0_COUNT:  get current counter value
+	mfc0	v0, C0_COUNT	# get current counter value
 	nop
 	nop
 	# We cannot just do the simple test, of adding our delta onto
@@ -83,7 +83,7 @@ __cpu_timer_poll:
 	# sign-extended to fill the 64bit register value).
 2:
 	# get current counter value:
-	mfc0	v0, $9	# C0_COUNT
+	mfc0	v0, C0_COUNT
 	nop
 	nop
 	# This is an unsigned 32bit subtraction: