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Fix tic54x testsuite failures and Lmem disassembly bugs.
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7d9961e897
@ -1,3 +1,10 @@
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2001-11-11 Timothy Wall <twall@alum.mit.edu>
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* ti.h: Move arch-specific stuff from here...
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(COFF_ADJUST_SYM_IN/OUT): Optionally put page flag into symbol
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value.
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* tic54x.h: ...to here.
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2001-10-26 Christian Groessler <cpg@aladdin.de>
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2001-10-26 Christian Groessler <cpg@aladdin.de>
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* external.h (GET_LINENO_LNNO): Fix usage of H_GET_32/16.
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* external.h (GET_LINENO_LNNO): Fix usage of H_GET_32/16.
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@ -95,7 +95,7 @@ struct external_filehdr
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do \
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do \
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{ \
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{ \
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((struct internal_filehdr *)(dst))->f_target_id = \
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((struct internal_filehdr *)(dst))->f_target_id = \
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H_GET_16 (abfd, ((FILHDR *)(src))->f_target_id); \
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H_GET_16 (abfd, ((FILHDR *)(src))->f_target_id); \
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} \
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} \
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while (0)
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while (0)
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#endif
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#endif
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@ -260,27 +260,6 @@ struct external_scnhdr {
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} \
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} \
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while (0)
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while (0)
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/* Page macros
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The first GDB port requires flags in its remote memory access commands to
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distinguish between data/prog space. Hopefully we can make this go away
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eventually. Stuff the page in the upper bits of a 32-bit address, since
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the c5x family only uses 16 or 23 bits.
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c2x, c5x and most c54x devices have 16-bit addresses, but the c548 has
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23-bit program addresses. Make sure the page flags don't interfere.
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These flags are used by GDB to identify the destination page for
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addresses.
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*/
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/* recognized load pages */
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#define PG_PROG 0x0 /* PROG page */
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#define PG_DATA 0x1 /* DATA page */
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#define ADDR_MASK 0x00FFFFFF
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#define PG_TO_FLAG(p) (((unsigned long)(p) & 0xFF) << 24)
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#define FLAG_TO_PG(f) (((f) >> 24) & 0xFF)
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/*
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/*
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* names of "special" sections
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* names of "special" sections
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*/
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*/
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@ -411,13 +390,23 @@ union external_auxent {
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H_PUT_16 (abfd, ((class != C_FIELD) ? (in) * 8 : (in)), \
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H_PUT_16 (abfd, ((class != C_FIELD) ? (in) * 8 : (in)), \
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ext->x_sym.x_misc.x_lnsz.x_size)
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ext->x_sym.x_misc.x_lnsz.x_size)
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/* TI COFF stores offsets for MOS and MOU in bits; BFD expects bytes */
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/* TI COFF stores offsets for MOS and MOU in bits; BFD expects bytes
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Also put the load page flag of the section into the symbol value if it's an
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address. */
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#ifndef NEEDS_PAGE
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#define NEEDS_PAGE(X) 0
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#define PAGE_MASK 0
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#endif
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#define COFF_ADJUST_SYM_IN_POST(ABFD, EXT, INT) \
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#define COFF_ADJUST_SYM_IN_POST(ABFD, EXT, INT) \
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do \
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do \
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{ \
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{ \
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struct internal_syment *dst = (struct internal_syment *)(INT); \
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struct internal_syment *dst = (struct internal_syment *)(INT); \
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if (dst->n_sclass == C_MOS || dst->n_sclass == C_MOU) \
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if (dst->n_sclass == C_MOS || dst->n_sclass == C_MOU) \
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dst->n_value /= 8; \
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dst->n_value /= 8; \
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else if (NEEDS_PAGE (dst->n_sclass)) { \
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asection *scn = coff_section_from_bfd_index (abfd, dst->n_scnum); \
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dst->n_value |= (scn->lma & PAGE_MASK); \
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} \
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} \
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} \
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while (0)
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while (0)
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@ -428,6 +417,9 @@ union external_auxent {
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SYMENT *dst = (SYMENT *)(EXT); \
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SYMENT *dst = (SYMENT *)(EXT); \
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if (src->n_sclass == C_MOU || src->n_sclass == C_MOS) \
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if (src->n_sclass == C_MOU || src->n_sclass == C_MOS) \
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H_PUT_32 (abfd, src->n_value * 8, dst->e_value); \
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H_PUT_32 (abfd, src->n_value * 8, dst->e_value); \
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else if (NEEDS_PAGE (src->n_sclass)) { \
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H_PUT_32 (abfd, src->n_value &= ~PAGE_MASK, dst->e_value); \
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} \
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} \
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} \
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while (0)
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while (0)
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@ -18,8 +18,8 @@
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Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
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Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
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#ifndef COFF_TIC54X_H
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#ifndef COFF_TIC54X_H
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#define COFF_TIC54X_H
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#define COFF_TIC54X_H
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#define TIC54X_TARGET_ID 0x98
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#define TIC54X_TARGET_ID 0x98
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#define TIC54XALGMAGIC 0x009B /* c54x algebraic assembler output */
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#define TIC54XALGMAGIC 0x009B /* c54x algebraic assembler output */
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#define TIC5X_TARGET_ID 0x92
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#define TIC5X_TARGET_ID 0x92
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@ -29,6 +29,31 @@
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#define TICOFF_TARGET_ARCH bfd_arch_tic54x
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#define TICOFF_TARGET_ARCH bfd_arch_tic54x
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#define TICOFF_DEFAULT_MAGIC TICOFF1MAGIC /* we use COFF1 for compatibility */
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#define TICOFF_DEFAULT_MAGIC TICOFF1MAGIC /* we use COFF1 for compatibility */
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/* Page macros
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The first GDB port requires flags in its remote memory access commands to
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distinguish between data/prog space. Hopefully we can make this go away
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eventually. Stuff the page in the upper bits of a 32-bit address, since
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the c5x family only uses 16 or 23 bits.
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c2x, c5x and most c54x devices have 16-bit addresses, but the c548 has
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23-bit program addresses. Make sure the page flags don't interfere.
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These flags are used by GDB to identify the destination page for
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addresses.
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*/
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/* Recognized load pages (by common convention). */
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#define PG_PROG 0x0 /* PROG page */
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#define PG_DATA 0x1 /* DATA page */
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#define PG_IO 0x2 /* I/O page */
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/** Indicate whether the given storage class requires a page flag. */
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#define NEEDS_PAGE(X) ((X)==C_EXT)
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#define PAGE_MASK 0xFF000000
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#define ADDR_MASK 0x00FFFFFF
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#define PG_TO_FLAG(p) (((unsigned long)(p) & 0xFF) << 24)
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#define FLAG_TO_PG(f) (((f) >> 24) & 0xFF)
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#include "coff/ti.h"
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#include "coff/ti.h"
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#endif /* COFF_TIC54X_H */
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#endif /* COFF_TIC54X_H */
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@ -1,3 +1,8 @@
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2001-11-11 Timothy Wall <twall@alum.mit.edu>
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* tic54x.h: Revise opcode layout; don't really need a separate
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structure for parallel opcodes.
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2001-11-13 Zack Weinberg <zack@codesourcery.com>
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2001-11-13 Zack Weinberg <zack@codesourcery.com>
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Alan Modra <amodra@bigpond.net.au>
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Alan Modra <amodra@bigpond.net.au>
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@ -19,8 +19,8 @@ along with this file; see the file COPYING. If not, write to the Free
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Software Foundation, 59 Temple Place - Suite 330, Boston, MA
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Software Foundation, 59 Temple Place - Suite 330, Boston, MA
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02111-1307, USA. */
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02111-1307, USA. */
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#ifndef _TIC54X_H_
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#ifndef _opcode_tic54x_h_
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#define _TIC54X_H_
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#define _opcode_tic54x_h_
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typedef struct _symbol
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typedef struct _symbol
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{
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{
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@ -86,7 +86,6 @@ typedef struct _template
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{
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{
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/* The opcode mnemonic */
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/* The opcode mnemonic */
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const char *name;
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const char *name;
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unsigned int words; /* insn size in words */
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unsigned int words; /* insn size in words */
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int minops, maxops; /* min/max operand count */
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int minops, maxops; /* min/max operand count */
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/* The significant bits in the opcode. Other bits are zero.
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/* The significant bits in the opcode. Other bits are zero.
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@ -141,27 +140,24 @@ typedef struct _template
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#define FL_NR 0x100 /* no repeat allowed */
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#define FL_NR 0x100 /* no repeat allowed */
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#define FL_SMR 0x200 /* Smem read (for flagging write-only *+ARx */
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#define FL_SMR 0x200 /* Smem read (for flagging write-only *+ARx */
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#define FL_PAR 0x400 /* Parallel instruction. */
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unsigned short opcode2, mask2; /* some insns have an extended opcode */
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unsigned short opcode2, mask2; /* some insns have an extended opcode */
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const char* parname;
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enum optype paroperand_types[MAX_OPERANDS];
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} template;
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} template;
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typedef struct _partemplate {
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char *name;
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char *parname;
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unsigned int words; /* length in words */
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int minops, maxops; /* min/max operand count for 2nd part of insn */
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unsigned short opcode;
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unsigned short mask;
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enum optype operand_types[MAX_OPERANDS];
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enum optype paroperand_types[MAX_OPERANDS];
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} partemplate;
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extern const template tic54x_unknown_opcode;
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extern const template tic54x_unknown_opcode;
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extern const template tic54x_optab[];
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extern const template tic54x_optab[];
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extern const partemplate tic54x_paroptab[];
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extern const template tic54x_paroptab[];
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extern const symbol mmregs[], regs[];
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extern const symbol mmregs[], regs[];
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extern const symbol condition_codes[], cc2_codes[], status_bits[];
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extern const symbol condition_codes[], cc2_codes[], status_bits[];
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extern const symbol cc3_codes[];
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extern const symbol cc3_codes[];
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extern const char *misc_symbols[];
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extern const char *misc_symbols[];
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struct disassemble_info;
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extern const template* tic54x_get_insn (struct disassemble_info *,
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bfd_vma, unsigned short, int *);
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#endif /* TIC54X_H */
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#endif /* _opcode_tic54x_h_ */
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