AArch32: Add support for HLT to Mixed Mode models
The Semihosting v2 protocol requires us to output the Armv8-a HLT instruction
when in mixed mode (SEMIHOST_V2_MIXED_MODE), however it also requires this to
be done for Armv7-a and earlier architectures.
The HLT instruction is defined in the undefined encoding space for older
architectures but simulators such as QEMU already trap on it [1] for all
architectures and is a requirement for semihosting v2 [2].
Unfortunately the GAS restricts the use of HLT to Armv8-a which requires us to
use the instruction encodings we want directly in crt0.
This patch does this, I have not updated newlib/libc/* as that is quite out of
date already. A proper sync is needed in order to get things back in sync.
A different patch for this would be best.
[1] 19a6e31c9d
[2] https://developer.arm.com/docs/100863/latest/the-semihosting-interface
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@ -116,10 +116,10 @@
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bkpt AngelSWI
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#elif defined(__thumb2__)
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/* We are in thumb mode for startup on armv7 architectures. */
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AngelSWIAsm AngelSWI
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AngelSWIAsm (AngelSWI)
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#else
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/* We are always in ARM mode for startup on pre armv7 archs. */
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AngelSWIAsm AngelSWI_ARM
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AngelSWIAsm (AngelSWI_ARM)
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#endif
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ldr r0, .LC0 /* point at values read */
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@ -297,7 +297,7 @@ __change_mode:
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#else
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movs r0, #AngelSWI_Reason_GetCmdLine
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ldr r1, .LC30 /* Space for command line */
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AngelSWIAsm AngelSWI
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AngelSWIAsm (AngelSWI)
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ldr r1, .LC30
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ldr r1, [r1]
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#endif
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@ -31,9 +31,9 @@
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/* Now the SWI numbers and reason codes for RDI (Angel) monitors. */
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#if defined (SEMIHOST_V2) && defined (SEMIHOST_V2_MIXED_MODE)
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#define AngelSWI_ARM 0xF000 /* HLT A32. */
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#define AngelSWI_ARM 0xE10F0070 /* HLT #0xF000 A32. */
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#ifdef __thumb__
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#define AngelSWI 0x3C /* HLT T32. */
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#define AngelSWI 0xBABC /* HLT #0x3c T32. */
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#else /* __thumb__. */
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#define AngelSWI AngelSWI_ARM
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#endif /* __thumb__. */
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@ -49,10 +49,16 @@
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/* For thumb only architectures use the BKPT instruction instead of SWI. */
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#ifdef THUMB_VXM
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#define AngelSWIInsn "bkpt"
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#define AngelSWIAsm bkpt
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#define AngelSWIAsm(IMM) bkpt IMM
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#elif defined (SEMIHOST_V2) && defined (SEMIHOST_V2_MIXED_MODE)
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/* This is actually encoding the HLT instruction, however we don't have
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support for this in older assemblers. So we have to encode the
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instruction manually. */
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#define AngelSWIInsn ".inst"
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#define AngelSWIAsm(IMM) .inst IMM
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#else
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#define AngelSWIInsn "swi"
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#define AngelSWIAsm swi
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#define AngelSWIAsm(IMM) swi IMM
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#endif
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/* The reason codes: */
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