* mips.h (INSN_CHIP_MASK): Update according to INSN_LOONGSON_3A.
(INSN_LOONGSON_3A): Clear bit 31. * elfxx-mips.c (mips_set_isa_flags): Move bfd_mach_loongson_3a after bfd_mach_mips_sb1. * config/tc-mips.c (mips_cpu_info_table): Move loongson3a after sb1.
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@ -1,3 +1,8 @@
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2010-11-23 Maciej W. Rozycki <macro@linux-mips.org>
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* mips.h (INSN_CHIP_MASK): Update according to INSN_LOONGSON_3A.
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(INSN_LOONGSON_3A): Clear bit 31.
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2010-11-15 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
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2010-11-15 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
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PR gas/12198
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PR gas/12198
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@ -544,7 +544,7 @@ static const unsigned int mips_isa_table[] =
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{ 0x0001, 0x0003, 0x0607, 0x1e0f, 0x3e1f, 0x0a23, 0x3e63, 0x3ebf, 0x3fff };
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{ 0x0001, 0x0003, 0x0607, 0x1e0f, 0x3e1f, 0x0a23, 0x3e63, 0x3ebf, 0x3fff };
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/* Masks used for Chip specific instructions. */
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/* Masks used for Chip specific instructions. */
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#define INSN_CHIP_MASK 0xc3ff0820
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#define INSN_CHIP_MASK 0xc3ff0c20
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/* Cavium Networks Octeon instructions. */
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/* Cavium Networks Octeon instructions. */
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#define INSN_OCTEON 0x00000800
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#define INSN_OCTEON 0x00000800
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@ -593,7 +593,7 @@ static const unsigned int mips_isa_table[] =
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/* ST Microelectronics Loongson 2E. */
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/* ST Microelectronics Loongson 2E. */
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#define INSN_LOONGSON_2E 0x40000000
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#define INSN_LOONGSON_2E 0x40000000
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/* ST Microelectronics Loongson 2F. */
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/* ST Microelectronics Loongson 2F. */
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#define INSN_LOONGSON_2F 0x80000000
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#define INSN_LOONGSON_3A 0x00000400
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/* Loongson 3A. */
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/* Loongson 3A. */
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#define INSN_LOONGSON_3A 0x80000400
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#define INSN_LOONGSON_3A 0x80000400
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/* RMI Xlr instruction */
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/* RMI Xlr instruction */
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