Apply Dmitry Diky's patches to add relaxation to msp430.
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Nick Clifton
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b8a6a751f4
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3029be00db
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@ -1,3 +1,7 @@
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2004-08-25 Dmitry Diky <diwil@spec.ru>
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* msp430.h: Add new relocs.
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2004-08-12 H.J. Lu <hongjiu.lu@intel.com>
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* i386.h (R_386_USED_BY_INTEL_200): New.
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@ -1,5 +1,5 @@
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/* MSP430 ELF support for BFD.
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Copyright (C) 2002 Free Software Foundation, Inc.
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Copyright (C) 2002, 2004 Free Software Foundation, Inc.
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Contributed by Dmitry Diky <diwil@mail.ru>
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This file is part of BFD, the Binary File Descriptor library.
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@ -50,6 +50,8 @@ START_RELOC_NUMBERS (elf_msp430_reloc_type)
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RELOC_NUMBER (R_MSP430_16_PCREL, 4)
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RELOC_NUMBER (R_MSP430_16_BYTE, 5)
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RELOC_NUMBER (R_MSP430_16_PCREL_BYTE, 6)
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RELOC_NUMBER (R_MSP430_2X_PCREL, 7)
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RELOC_NUMBER (R_MSP430_RL_PCREL, 8)
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END_RELOC_NUMBERS (R_MSP430_max)
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@ -1,3 +1,9 @@
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2004-08-24 Dmitry Diky <diwil@spec.ru>
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* msp430.h (msp430_opc): Add new instructions.
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(msp430_rcodes): Declare new instructions.
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(msp430_hcodes): Likewise..
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2004-08-13 Nick Clifton <nickc@redhat.com>
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PR/301
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@ -1,6 +1,6 @@
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/* Opcode table for the TI MSP430 microcontrollers
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Copyright 2002 Free Software Foundation, Inc.
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Copyright 2002, 2004 Free Software Foundation, Inc.
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Contributed by Dmitry Diky <diwil@mail.ru>
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This program is free software; you can redistribute it and/or modify
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@ -103,9 +103,114 @@ static struct msp430_opcode_s msp430_opcodes[] =
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MSP_INSN (rra, 2, 1, 0x1100, 0xff80),
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MSP_INSN (swpb, 2, 1, 0x1080, 0xffc0),
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MSP_INSN (rrc, 2, 1, 0x1000, 0xff80),
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/* Simple polymorphs. */
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MSP_INSN (beq, 4, 0, 0, 0xffff),
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MSP_INSN (bne, 4, 1, 0, 0xffff),
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MSP_INSN (blt, 4, 2, 0, 0xffff),
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MSP_INSN (bltu, 4, 3, 0, 0xffff),
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MSP_INSN (bge, 4, 4, 0, 0xffff),
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MSP_INSN (bgeu, 4, 5, 0, 0xffff),
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MSP_INSN (bltn, 4, 6, 0, 0xffff),
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MSP_INSN (jump, 4, 7, 0, 0xffff),
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/* Long polymorphs. */
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MSP_INSN (bgt, 5, 0, 0, 0xffff),
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MSP_INSN (bgtu, 5, 1, 0, 0xffff),
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MSP_INSN (bleu, 5, 2, 0, 0xffff),
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MSP_INSN (ble, 5, 3, 0, 0xffff),
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/* End of instruction set. */
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{ NULL, 0, 0, 0, 0 }
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};
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/* GCC uses the some condition codes which we'll
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implement as new polymorph instructions.
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COND EXPL SHORT JUMP LONG JUMP
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===============================================
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eq == jeq jne +4; br lab
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ne != jne jeq +4; br lab
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ltn honours no-overflow flag
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ltn < jn jn +2; jmp +4; br lab
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lt < jl jge +4; br lab
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ltu < jlo lhs +4; br lab
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le <= see below
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leu <= see below
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gt > see below
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gtu > see below
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ge >= jge jl +4; br lab
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geu >= jhs jlo +4; br lab
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===============================================
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Therefore, new opcodes are (BranchEQ -> beq; and so on...)
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beq,bne,blt,bltn,bltu,bge,bgeu
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'u' means unsigned compares
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Also, we add 'jump' instruction:
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jump UNCOND -> jmp br lab
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They will have fmt == 4, and insn_opnumb == number of instruction. */
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struct rcodes_s
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{
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char * name;
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int index; /* Corresponding insn_opnumb. */
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int sop; /* Opcode if jump length is short. */
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long lpos; /* Label position. */
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long lop0; /* Opcode 1 _word_ (16 bits). */
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long lop1; /* Opcode second word. */
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long lop2; /* Opcode third word. */
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};
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#define MSP430_RLC(n,i,sop,o1) \
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{#n, i, sop, 2, (o1 + 2), 0x4010, 0}
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static struct rcodes_s msp430_rcodes[] =
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{
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MSP430_RLC (beq, 0, 0x2400, 0x2000),
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MSP430_RLC (bne, 1, 0x2000, 0x2400),
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MSP430_RLC (blt, 2, 0x3800, 0x3400),
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MSP430_RLC (bltu, 3, 0x2800, 0x2c00),
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MSP430_RLC (bge, 4, 0x3400, 0x3800),
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MSP430_RLC (bgeu, 5, 0x2c00, 0x2800),
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{"bltn", 6, 0x3000, 3, 0x3000 + 1, 0x3c00 + 2,0x4010},
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{"jump", 7, 0x3c00, 1, 0x4010, 0, 0},
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{0,0,0,0,0,0,0}
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};
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#undef MSP430_RLC
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/* More difficult than above and they have format 5.
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COND EXPL SHORT LONG
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=================================================================
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gt > jeq +2; jge label jeq +6; jl +4; br label
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gtu > jeq +2; jhs label jeq +6; jlo +4; br label
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leu <= jeq label; jlo label jeq +2; jhs +4; br label
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le <= jeq label; jl label jeq +2; jge +4; br label
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================================================================= */
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struct hcodes_s
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{
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char * name;
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int index; /* Corresponding insn_opnumb. */
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int tlab; /* Number of labels in short mode. */
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int op0; /* Opcode for first word of short jump. */
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int op1; /* Opcode for second word of short jump. */
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int lop0; /* Opcodes for long jump mode. */
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int lop1;
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int lop2;
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};
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static struct hcodes_s msp430_hcodes[] =
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{
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{"bgt", 0, 1, 0x2401, 0x3400, 0x2403, 0x3802, 0x4010 },
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{"bgtu", 1, 1, 0x2401, 0x2c00, 0x2403, 0x2802, 0x4010 },
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{"bleu", 2, 2, 0x2400, 0x2800, 0x2401, 0x2c02, 0x4010 },
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{"ble", 3, 2, 0x2400, 0x3800, 0x2401, 0x3402, 0x4010 },
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{0,0,0,0,0,0,0,0}
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};
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#endif
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