fhandler_proc.cc(format_proc_cpuinfo): add tsxldtrk, sev_es flags
Add linux-next cpuinfo flags for Intel TSX suspend load address tracking instructions and AMD Secure Encrypted Virtualization with Encrypted State.
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2ed80d04f4
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@ -1376,6 +1376,7 @@ format_proc_cpuinfo (void *, char *&destbuf)
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cpuid (&features2, &unused, &unused, &unused, 0x8000001f);
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cpuid (&features2, &unused, &unused, &unused, 0x8000001f);
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ftcprint (features2, 1, "sev"); /* secure encrypted virt */
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ftcprint (features2, 1, "sev"); /* secure encrypted virt */
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/*ftcprint (features2, 3, "sev_es"); - print below */
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}
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}
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/* cpuid 0x80000008 ebx */
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/* cpuid 0x80000008 ebx */
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if (maxe >= 0x80000008)
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if (maxe >= 0x80000008)
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@ -1400,6 +1401,12 @@ format_proc_cpuinfo (void *, char *&destbuf)
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/* ftcprint (features1, 26, "ssb_no"); *//* ssb fixed in hardware */
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/* ftcprint (features1, 26, "ssb_no"); *//* ssb fixed in hardware */
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}
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}
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/* cpuid 0x8000001f eax - set above */
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if (maxe >= 0x8000001f)
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{
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ftcprint (features2, 3, "sev_es"); /* AMD SEV encrypted state */
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}
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/* cpuid 0x00000007 ebx */
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/* cpuid 0x00000007 ebx */
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if (maxf >= 0x00000007)
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if (maxf >= 0x00000007)
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{
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{
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@ -1579,6 +1586,7 @@ format_proc_cpuinfo (void *, char *&destbuf)
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ftcprint (features1, 8, "avx512_vp2intersect"); /* vec intcpt d/q */
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ftcprint (features1, 8, "avx512_vp2intersect"); /* vec intcpt d/q */
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ftcprint (features1, 10, "md_clear"); /* verw clear buf */
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ftcprint (features1, 10, "md_clear"); /* verw clear buf */
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ftcprint (features1, 14, "serialize"); /* SERIALIZE instruction */
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ftcprint (features1, 14, "serialize"); /* SERIALIZE instruction */
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ftcprint (features1, 16, "tsxldtrk"); /* TSX Susp Ld Addr Track */
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ftcprint (features1, 18, "pconfig"); /* platform config */
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ftcprint (features1, 18, "pconfig"); /* platform config */
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ftcprint (features1, 19, "arch_lbr"); /* last branch records */
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ftcprint (features1, 19, "arch_lbr"); /* last branch records */
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ftcprint (features1, 28, "flush_l1d"); /* flush l1d cache */
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ftcprint (features1, 28, "flush_l1d"); /* flush l1d cache */
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