For include/opcode:
* mips.h (INSN_ISA5): New. For opcodes: * mips-opc.c (I5): New. (abs.ps,add.ps,alnv.ps,c.COND.ps,cvt.s.pl,cvt.s.pu,cvt.ps.s madd.ps,movf.ps,movt.ps,mul.ps,net.ps,nmadd.ps,nmsub.ps, pll.ps,plu.ps,pul.ps,puu.ps,sub.ps,suxc1,luxc1): New.
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@ -1,3 +1,7 @@
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1999-11-18 Gavin Romig-Koch <gavin@cygnus.com>
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* mips.h (INSN_ISA5): New.
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1999-11-01 Gavin Romig-Koch <gavin@cygnus.com>
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* mips.h (OPCODE_IS_MEMBER): New.
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@ -308,6 +308,7 @@ struct mips_opcode
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#define INSN_ISA3 0x00000003
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/* MIPS ISA 4 instruction (R8000). */
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#define INSN_ISA4 0x00000004
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#define INSN_ISA5 0x00000005
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/* Chip specific instructions. These are bitmasks. */
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/* MIPS R4650 instruction. */
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