2013-06-17 Catherine Moore <clm@codesourcery.com>
Maciej W. Rozycki <macro@codesourcery.com> Chao-Ying Fu <fu@mips.com> gas/testsuite/ * gas/mips/mips.exp: Run new tests. * gas/mips/eva.d: New. * gas/mips/eva.s: New. * gas/mips/micromips@eva.d: New. gas/ * config/tc-mips.c (mips_set_options): Add ase_eva. (mips_set_options mips_opts): Add ase_eva. (file_ase_eva): Declare. (ISA_SUPPORTS_EVA_ASE): Define. (IS_SEXT_9BIT_NUM): Define. (MIPS_CPU_ASE_EVA): Define. (is_opcode_valid): Add support for ase_eva. (macro_build): Likewise. (macro): Likewise. (validate_mips_insn): Likewise. (validate_micromips_insn): Likewise. (mips_ip): Likewise. (options): Add OPTION_EVA and OPTION_NO_EVA. (md_longopts): Add -meva and -mno-eva. (md_parse_option): Process new options. (mips_after_parse_args): Check for valid EVA combinations. (s_mipsset): Likewise. include/ * opcode/mips.h (OP_SH_EVAOFFSET): Define. (OP_MASK_EVAOFFSET): Define. (INSN_ASE_MASK): Delete. (ASE_EVA): Define. (M_CACHEE_AB, M_CACHEE_OB): New. (M_LBE_OB, M_LBE_AB): New. (M_LBUE_OB, M_LBUE_AB): New. (M_LHE_OB, M_LHE_AB): New. (M_LHUE_OB, M_LHUE_AB): New. (M_LLE_AB, M_LLE_OB): New. (M_LWE_OB, M_LWE_AB): New. (M_LWLE_AB, M_LWLE_OB): New. (M_LWRE_AB, M_LWRE_OB): New. (M_PREFE_AB, M_PREFE_OB): New. (M_SCE_AB, M_SCE_OB): New. (M_SBE_OB, M_SBE_AB): New. (M_SHE_OB, M_SHE_AB): New. (M_SWE_OB, M_SWE_AB): New. (M_SWLE_AB, M_SWLE_OB): New. (M_SWRE_AB, M_SWRE_OB): New. (MICROMIPSOP_SH_EVAOFFSET): Define. (MICROMIPSOP_MASK_EVAOFFSET): Define. opcodes/ * micromips-opc.c (EVA): Define. (TLBINV): Define. (micromips_opcodes): Add EVA opcodes. * mips-dis.c (mips_arch_choices): Update for ASE_EVA. (print_insn_args): Handle EVA offsets. (print_insn_micromips): Likewise. * mips-opc.c (EVA): Define. (TLBINV): Define. (mips_builtin_opcodes): Add EVA opcodes.
This commit is contained in:
Catherine Moore
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2566c2e600
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0b527c249c
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@ -1,3 +1,30 @@
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2013-06-17 Catherine Moore <clm@codesourcery.com>
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Maciej W. Rozycki <macro@codesourcery.com>
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Chao-Ying Fu <fu@mips.com>
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* mips.h (OP_SH_EVAOFFSET): Define.
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(OP_MASK_EVAOFFSET): Define.
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(INSN_ASE_MASK): Delete.
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(ASE_EVA): Define.
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(M_CACHEE_AB, M_CACHEE_OB): New.
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(M_LBE_OB, M_LBE_AB): New.
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(M_LBUE_OB, M_LBUE_AB): New.
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(M_LHE_OB, M_LHE_AB): New.
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(M_LHUE_OB, M_LHUE_AB): New.
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(M_LLE_AB, M_LLE_OB): New.
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(M_LWE_OB, M_LWE_AB): New.
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(M_LWLE_AB, M_LWLE_OB): New.
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(M_LWRE_AB, M_LWRE_OB): New.
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(M_PREFE_AB, M_PREFE_OB): New.
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(M_SCE_AB, M_SCE_OB): New.
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(M_SBE_OB, M_SBE_AB): New.
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(M_SHE_OB, M_SHE_AB): New.
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(M_SWE_OB, M_SWE_AB): New.
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(M_SWLE_AB, M_SWLE_OB): New.
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(M_SWRE_AB, M_SWRE_OB): New.
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(MICROMIPSOP_SH_EVAOFFSET): Define.
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(MICROMIPSOP_MASK_EVAOFFSET): Define.
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2013-06-12 Sandra Loosemore <sandra@codesourcery.com>
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* nios2.h (OP_MATCH_ERET): Correct eret encoding.
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@ -330,6 +330,10 @@
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#define OP_MASK_IMMY 0
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#define OP_SH_IMMY 0
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/* Enhanced VA Scheme */
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#define OP_SH_EVAOFFSET 7
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#define OP_MASK_EVAOFFSET 0x1ff
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/* This structure holds information for a particular instruction. */
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struct mips_opcode
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@ -521,6 +525,9 @@ struct mips_opcode
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"+z" 5-bit rz register (OP_*_RZ)
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"+Z" 5-bit fz register (OP_*_FZ)
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Enhanced VA Scheme:
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"+j" 9-bit signed offset in bit 7 (OP_*_EVAOFFSET)
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Other:
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"()" parens surrounding optional value
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"," separates operands
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@ -537,7 +544,7 @@ struct mips_opcode
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following), for quick reference when adding more:
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"1234"
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"ABCDEFGHIJPQSTXZ"
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"abcpstxz"
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"abcjpstxz"
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*/
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/* These are the bits which may be set in the pinfo field of an
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@ -733,9 +740,6 @@ static const unsigned int mips_isa_table[] =
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#define INSN_OCTEONP 0x00000200
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#define INSN_OCTEON2 0x00000100
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/* Masks used for MIPS-defined ASEs. */
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#define INSN_ASE_MASK 0x3c00f0d0
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/* MIPS R5900 instruction */
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#define INSN_5900 0x00004000
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@ -774,6 +778,8 @@ static const unsigned int mips_isa_table[] =
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#define ASE_DSP64 0x00000002
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/* DSP R2 ASE */
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#define ASE_DSPR2 0x00000004
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/* Enhanced VA Scheme */
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#define ASE_EVA 0x00000008
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/* MCU (MicroController) ASE */
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#define ASE_MCU 0x00000010
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/* MDMX ASE */
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@ -1020,6 +1026,8 @@ enum
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M_BNEL_I,
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M_CACHE_AB,
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M_CACHE_OB,
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M_CACHEE_AB,
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M_CACHEE_OB,
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M_DABS,
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M_DADD_I,
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M_DADDU_I,
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@ -1061,8 +1069,12 @@ enum
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M_LA_AB,
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M_LB_A,
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M_LB_AB,
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M_LBE_OB,
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M_LBE_AB,
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M_LBU_A,
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M_LBU_AB,
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M_LBUE_OB,
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M_LBUE_AB,
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M_LCA_AB,
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M_LD_A,
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M_LD_OB,
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@ -1082,8 +1094,12 @@ enum
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M_LDR_OB,
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M_LH_A,
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M_LH_AB,
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M_LHE_OB,
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M_LHE_AB,
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M_LHU_A,
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M_LHU_AB,
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M_LHUE_OB,
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M_LHUE_AB,
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M_LI,
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M_LI_D,
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M_LI_DD,
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@ -1093,10 +1109,14 @@ enum
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M_LL_OB,
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M_LLD_AB,
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M_LLD_OB,
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M_LLE_AB,
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M_LLE_OB,
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M_LQ_AB,
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M_LS_A,
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M_LW_A,
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M_LW_AB,
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M_LWE_OB,
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M_LWE_AB,
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M_LWC0_A,
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M_LWC0_AB,
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M_LWC1_A,
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@ -1109,6 +1129,8 @@ enum
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M_LWL_A,
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M_LWL_AB,
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M_LWL_OB,
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M_LWLE_AB,
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M_LWLE_OB,
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M_LWM_AB,
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M_LWM_OB,
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M_LWP_AB,
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@ -1116,6 +1138,8 @@ enum
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M_LWR_A,
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M_LWR_AB,
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M_LWR_OB,
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M_LWRE_AB,
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M_LWRE_OB,
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M_LWU_AB,
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M_LWU_OB,
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M_MSGSND,
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@ -1134,6 +1158,8 @@ enum
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M_OR_I,
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M_PREF_AB,
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M_PREF_OB,
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M_PREFE_AB,
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M_PREFE_OB,
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M_REM_3,
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M_REM_3I,
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M_REMU_3,
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@ -1158,6 +1184,8 @@ enum
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M_SC_OB,
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M_SCD_AB,
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M_SCD_OB,
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M_SCE_AB,
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M_SCE_OB,
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M_SD_A,
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M_SD_OB,
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M_SD_AB,
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@ -1194,11 +1222,17 @@ enum
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M_SNE_I,
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M_SB_A,
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M_SB_AB,
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M_SBE_OB,
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M_SBE_AB,
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M_SH_A,
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M_SH_AB,
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M_SHE_OB,
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M_SHE_AB,
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M_SQ_AB,
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M_SW_A,
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M_SW_AB,
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M_SWE_OB,
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M_SWE_AB,
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M_SWC0_A,
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M_SWC0_AB,
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M_SWC1_A,
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@ -1211,6 +1245,8 @@ enum
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M_SWL_A,
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M_SWL_AB,
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M_SWL_OB,
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M_SWLE_AB,
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M_SWLE_OB,
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M_SWM_AB,
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M_SWM_OB,
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M_SWP_AB,
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@ -1218,6 +1254,8 @@ enum
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M_SWR_A,
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M_SWR_AB,
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M_SWR_OB,
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M_SWRE_AB,
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M_SWRE_OB,
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M_SUB_I,
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M_SUBU_I,
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M_SUBU_I_2,
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@ -1638,6 +1676,10 @@ extern const int bfd_mips16_num_opcodes;
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#define MICROMIPSOP_SH_FZ 0
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#define MICROMIPSOP_MASK_FZ 0
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/* microMIPS Enhanced VA Scheme */
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#define MICROMIPSOP_SH_EVAOFFSET 0
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#define MICROMIPSOP_MASK_EVAOFFSET 0x1ff
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/* These are the characters which may appears in the args field of a microMIPS
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instruction. They appear in the order in which the fields appear
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when the instruction is used. Commas and parentheses in the args
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@ -1795,6 +1837,9 @@ extern const int bfd_mips16_num_opcodes;
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"@" 10-bit signed immediate (MICROMIPSOP_*_IMM10)
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"^" 5-bit unsigned immediate (MICROMIPSOP_*_RD)
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microMIPS Enhanced VA Scheme:
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"+j" 9-bit signed offset in bit 0 (OP_*_EVAOFFSET)
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Other:
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"()" parens surrounding optional value
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"," separates operands
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@ -1809,7 +1854,7 @@ extern const int bfd_mips16_num_opcodes;
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Extension character sequences used so far ("+" followed by the
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following), for quick reference when adding more:
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""
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"j"
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""
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"ABCDEFGHI"
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""
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